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Full text of "Linear Technologies-1990 Linear Applications Handbook OCR"

TECHNOLOGY 




ELECTRD 
SOURCE 




/ A -\ C \ t7C A Ann 

(41b) 075-4490 




230 Galaxy Boulevard 




Rexdale, Ontario M9W 5R8 




Fax: (416) 675-6871 





1994 Linear Databook 
Volume III 




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Note: All products in BOLD are in this Databook, others appear in LTC's 1990 and 1992 Databooks ('90DB = LTC's 1990 Databook and '92DB = LTC's 1992 Databook Supplement). 
Quick Reference Index continued on inside back page. 



QUICK R€f €R€flC€ lflD€X 



LT1256 2-219 

LTC1257 6-210 

LT1259 2-256 

LT1260 2-256 

LTC1262 13-35 

LTC1264 8-100 

LTC1 264-7 8-115 

LT1268 4-466 

LT1269 4-474 

LT1270 4-470 

LT1271 4-474 

LTC1272 '920B 6-6 

LTC1273 6-58 

LTC1275 6-58 

LTC1276 6-58 

LTC1278 6-80 

LT1280 SeeLT1280A 

LT1280A 5-41 

LT1281 SeeLTI 281 A 

LT1281A 5-41 

LTC1282 6-95 

LTC1283 6-117 

LTC1285 13-39 

LTC1286 6-140 

LTC1287 '92DB 6-25 

LTC1288 13-39 

LTC1289 '92 DB 6-40 

LTC1290 '92DB 6-67 

LTC1291 6-163 

LTC1292 6-182 

LTC1293 '92 DB 6-113 

LTC1294 '92DB 6-113 

LTC1296 '92DB 6-113 

LTC1297 6-182 

LTC1298 6-140 

LT1300 4-478 

LT1301 4-486 

LT1302 13-47 

LT1 302-5 13-47 

LT1303 13-51 

LT1 303-5 13-51 

LT1309 13-55 

LT1312 13-59 

LT1313 13-71 

LTC1318 13-79 



LTC1320 5-178 

LTC1321 5-198 

LTC1322 5-198 

LTC1323 13-85 

LTC1325 13-94 

LTC1327 5-48 

LT1330 5-54 

LT1331 5-61 

LT1332 5-68 

LTC1335 5-198 

LTC1337 5-76 

LTC1338 5-82 

LT1341 5-88 

LT1342 5-95 

LTC1347 5-102 

LTC1348 13-116 

LTC1349 5-108 

LTC1350 5-114 

LT1354 2-267 

LT1355 2-278 

LT1356 2-278 

LT1357 2-289 

LT1358 2-300 

LT1359 2-300 

LT1360 2-311 

LT1361 2-322 

LT1362 2-322 

LT1363 2-333 

LT1364 2-344 

LT1365 2-344 

LT1372 13-120 

LT1376 13-121 

LT1381 5-120 

LTC1382 5-127 

LTC1383 5-133 

LTC1384 5-139 

LTC1385 5-145 

LTC1386 5-151 

LT1413 2-68 

LT1431 '92DB 7-13 

LT1432 '92DB 4-145 

LT1457 2-76 

LTC1481 13-122 

LTC1483 13-129 

LTC1485 5-166 



LT1524 '90DB 5-85 

LT1525A '90DB 5-97 

LT1526 '90DB 5-105 

LT1527A '90DB 5-97 

LT1585 13-136 

LT1846 '90DB 5-113 

LT1847 '90DB 5-113 

LT3524 '90DB 5-85 

LT3525A '90DB 5-97 

LT3526 '90DB 5-105 

LT3527A '90DB 5-97 

LT3846 '90DB 5-113 

LT3847 '90DB 5-113 

LTC7652 '90DB 2-197 

LTC7660 '90DB 5-9 

LTK001 '90DB 11-3 

LTZ1000 '90DB 3-9 

LTZ1000A '90DB 3-9 

OP-05 '90DB 2-321 

OP-07 '90DB 2-329 

OP-07CS8 '90DB 2-337 

OP-15 '90DB 2-341 

OP-16 '90DB 2-341 

OP-27 '90DB 2-345 

OP-37 '90DB 2-345 

OP-215 '90DB 2-275 

OP-227 '90DB 2-357 

OP-237 '90DB 2-357 

OP-270 '92DB 2-120 

OP-470 '92DB 2-120 

REF-01 '90DB 3-125 

REF-02 '90DB 3-125 

SG1524 '90DB 5-85 

SG1525A '90DB 5-97 

SG1527A "90DB 5-97 

SG3524 '90DB 5-85 

SG3524S '90DB 5-93 

SG3525A '90DB 5-97 

SG3527A '90DB 5-97 



Note: All products in BOLD are in this Databook. others appear in LTC's 1990 and 1992 Databooks ('90DB = LTC's 1990 Databook and '92D8 = LTC's 1992 Databook Supplement). 



FROfTI VOUR miRD TO VOUR fTMRK€T... RflD 
€V€RVTHinG Ifl B€TW€€n" 



The founding theme of Linear Technology Corporation was to create a company capable of leading 
and directing linear circuit technology and design concepts of the future and thus become the linear 
market specialist. 

Significant changes in the role of suppliers in the marketplace have evolved since the Company's founding in 
1981. Shortened end produ st life cycles, sharply increased integrated circuit complexity and a large increase 
of new products have combined to present a potentially overwhelming burden on the system designer. 

Suppliers must be thoroughly conversant in end equipment system requirements to participate in their design 
at varying levels. L TC makes expert knowledge available to its customers in the form of system expertise, cost 
effective board level solutions and design engineering consultation. This can help expedite turn around time 
and optimize value, from initial design to production shipments. 

This databookalong with ourfirstand second volumes, contains the solutions needed to facilitate your system 
design. We describe the circuit, give specific applications information and explain how to use the part 
effectively and efficiently. 

LTCnow offers approximately 5000 pages of product and applications information for approximately 3000 
individual products, presented in a three volume set ofdatabooks. The first volume issued in 1990, contains 
products which were introduced in the first 8 years of the Company's history. The second volume issued in 
1992, showcases the products introduced in the next three years and this 1994 databook is the third, which 
presents the latest two years of L TC products. 



The Table of Contents and the alphanumeric index in this volume provide guides to locate each L TC product 
within the three volume set. Be sure to use one of these guides to find the correct page in the appropriate 



LTC offers the latest in high performance wafer processing including bipolar, LTCMOS, micropower, high 
speed, complementary bipolar and BiCMOS technologies. These processes are used in LTC's two wafer fab 
facilities located in Mi I pitas, California. These facilities are certified to ISO 900 1 byTUV Rheinland and certified 
by DESC for JAN B and JANS level microcircuits. These certifications are part of LTC's Quality and Reliability 
program in support of military/aerospace and radiation hardened requirements. 

Linear Technology Corporation appreciates our customers continued support and the opportunity to provide 
the highest quality product, applications expertise and cost effective design assistance. 



volume. 




1 



NOTES 



XTU0S1 



Linear Technology Corporation 

1994 Linear Databook 
Volume III 



Note: The 1994 Linear Databook is the third volume in our series of databooks to date totaling approximately 5000 pages 
of product and applications information for approximately 3000 individual products, presented in a three volume set of 
databooks. The 1990 Linear Databook when reprinted will be entitled Volume I; the 1992 Linear Databook Supplement when 
reprinted will become Volume II. The 1994 Linear Databook Volume III Table of Contents references device types included 
in both the 1990 Volume I and 1992 Volume II databooks. 



LT, LTC, and XT are trademarks of Linear Technology Corporation. 



LIFE SUPPORT POLICY 

LINEAR'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT 
THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF LINEAR TECHNOLOGY CORPORATION. As used herein: 

a. Life support devices or systems are devices or systems which (1)are intended for surgical implant into the body, or (2) support or sustain 
life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably 
expected to result in a significant injury to the user. 

b. A critical component is any component in a life support device or system whose failure to perform can be reasonably expected to cause the 
failure of the life support device or system or to affect its safety or effectiveness. 

Information furnished herein by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed 
for its use. Linear Technology Corporation makes no representation thatthe interconnection of its circuits, as described herein, will not infringe 
on existing patent rights. 



Linear Technology Corporation • 1 630 McCarthy Blvd. • Milpitas, CA 95035 • (408) 432-1 900 © Linear Technology Corporation 1 992 Printed in USA 



3 



1994 
Linear 
Databook 
Volume III 



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15 





5 



TABLE OF CONTENTS 



SECTION 1— GENERAL INFORMATION 

INDEX 1-2 

GENERAL ORDERING INFORMATION 1-3 

ALTERNATE SOURCE CROSS REFERENCE GUIDE 1-4 

SECTION 2— AMPLIFIERS 

INDEX 2-2 

SELECTION GUIDES 2-3 

PROPRIETARY PRODUCTS 

PRECISION OPERATIONAL AMPLIFIERS 2-11 

LT1001, Precision Op Amp '90DB 2-1 1 

LT1001CS8, Precision Op Amp '90DB 2-23 

LT1002, Dual, Matched Precision Op Amp '90DB 2-25 

LT1006, Precision, Single Supply Op Amp '900B 2-41 

L T1006S8, Precision, Single Supply Op Amp '90DB 2-53 

L T1007, Low Noise, High Speed Precision Op Amp '90DB 2-57 

LT1007CS/LT1037CS, Low Noise, High Speed Precision Op Amps '90DB 2-69 

LT1007CS8/LT1037CS8, LowNoise, High Speed Precision Operational Amplifiers '92DB 2-16 

L T1008, Picoamp Input Current, Microvolt Offset, Low Noise Op Amp '90DB 2-73 

LT1010, Fast±150mA Power Buffer '90DB 2-85 

LT1012, Picoamp Input Current, Microvolt Offset, Low Noise Op Amp '90DB 2-1 05 

LT1012S8, Picoamp Input Current, Microvolt Offset, Low Noise Op Amp '90DB 2-117 

L T1013/L T1014, Dual/Quad Precision Operational Amplifiers '92DB 2-19 

LT1022, Highspeed, Precision JFET Input Op Amp '90DB 2-145 

LT1024, Dual, Matched Picoampere, Microvolt Input, Low Noise Op Amp '90DB 2-1 53 

LT1028, Ultra-Low Noise Precision High Speed Op Amp 2-12 

LT1037, Low Noise, High Speed Precision Op Amp '90DB 2-57 

LT1055, Precision, High Speed, JFET Input Op Amp '90DB 2-219 

LT1056, Precision, Highspeed, JFET Input Op Amp '90DB 2-219 

LT1055S8/LT1056S8, Precision, High Speed, JFET Input Op Amps '90DB 2-231 

LT1057, Dual JFET Input Precision, High Speed Op Amp '90DB 2-235 

LT1057S/LT1057IS,LT1058S/LT1058IS, Dual/Quad JFET Input Precision High Speed Op Amps '92DB 2-41 

L T1057S8/L T1057IS8, Dual JFET Input Precision High Speed Op Amps '92DB 2-44 

LT1058, Quad JFET Input Precision, High Speed Op Amp '90DB 2-235 

LT1077, Micropower, Single Supply, Precision Operational Amplifier '92DB 2-45 

LT1078/LT1079, Micropower, Dual/Quad, Single Supply, Precision Operational Amplifiers '92DB 2-56 

L T1097, Low Cost, Low Power Precision Operational Amplifier '92DB 2-74 

LT1112/LT1114, Dual/Quad Low Power Precision, Picoamp Input Op Amps 2-29 

LT1113, Dual Low Noise, Precision, JFET Input Op Amps 2-40 

LT1115, Ultra-Low Noise, Low Distortion, Audio Operational Amplifier '92DB 2-82 

LT1124/LT1125, Dual/Quad Low Noise, High Speed Precision Operational Amplifiers '92DB 2-94 

L T1 126/L T1 127, Dual/Quad Decompensated Low Noise, High Speed Precision Operational Amplifiers '92DB 2-1 05 

LT1128, Unity Gain Stable Ultra-Low Noise Precision High Speed Op Amp 2-12 

LT1169, Dual Low Noise, Picoampere Bias Current, JFET Input Op Amp 2-55 



Note: All products in BOLD are in this Oatabook, others appear in LTC's 1990 and 1992 Databooks ('900B = LTC's 1990 Oatabook and '92DB = LTC's 1992 Databook Supplement). 



xtthbb 



7 



TABLE OF CONTENTS 



LT1178/LT1179, 17 pA Max, Dual/Quad, Single Supply, Precision Operational Amplifiers '92DB 2-112 

i T1178S8, 20,uA Max, Dual SO-8 Package, Single Supply Precision Op Amp 2-67 

L T1413, Single Supply, Dual Precision Op Amp 2-68 

LT1457, Dual, Precision JFET Input Op Amp 2-76 

PRECISION OPERATIONAL AMPLIFIERS, ENHANCED MID SECOND SOURCE 

LF155/LF355, JFET Input Op Amp, Low Supply Current '90DB 2-271 

LF155A/LF355A, JFET Input Op Amp, Low Supply Current '90DB 2-271 

LF156/LF356, JFET Input Op Amp, High Speed '90DB 2-271 

LF1 56A/LF356A, JFET Input Op Amp, High Speed '90DB 2-271 

LF412A, Dual Precision JFET Input Op Amp '90DB 2-275 

LH21 08A, Dual LM108 Op Amp '90DB 2-279 

LM10/B(L)/C(L), Low Power Op Amp and Reference '90DB 2-281 

LM101A/LM301A, Uncompensated General Purpose Op Amp '90DB 2-297 

LM107/LM307, Compensated General Purpose Op Amp '90DB 2-297 

LM1 08/LM308, Super Gain Op Amp '90DB 2-303 

LM108A/LM308A, Super Gain Op Amp '90DB 2-303 

LM1 1 8/LM31 8, High Slew Rate Op Amp '90DB 2-31 1 

LM318S8, High Speed Op Amp '90DB 2-319 

LT118A/LT318A, Improved LM1 18 Op Amp '90DB 2-311 

OP-05, Internally Compensated Op Amp '90DB 2-321 

OP-07, Precision Op Amp '90DB 2-329 

OP-07CS8, Precision Op Amp '90DB 2-337 

OP-15, Precision, High Speed JFET Input Op Amp '90DB 2-341 

OP-16, Precision, High Speed JFET Input Op Amp '90DB 2-341 

OP-27, Low Noise, Precision Op Amp '90DB 2-345 

OP-37, Low Noise, High Speed Op Amp '90DB 2-345 

OP-21 5, Dual Precision JFET Input Op Amp '90DB 2-275 

OP-227, Dual Matched, Low Noise Op Amp '90DB 2-357 

OP-237, Dual High Speed, Low Noise Op Amp '90DB 2-357 

OP-270/OP-470, Dual/Quad Low Noise, Precision Operational Amplifiers '92DB 2-120 

HIGHSPEED AMPLIFIERS 2-83 

LT1122, Fast Settling, JFET Input Operational Amplifier 2-84 

LT1187, Low Power Video Difference Amplifier 2-92 

LT1189, Low Power Video Difference Amplifier 2-104 

LT1190, Ultra High Speed Operational Amplifier (Av> 1) '92DB 2-126 

LT1191, Ultra High Speed Operational Amplifier (Av> 1) '92DB 2-137 

L 71 192, Ultra High Speed Operational Amplifier (Av>5) '92DB 2-1 48 

L T1 193, Video Difference Amplifier, Adjustable Gain '92DB 2-1 59 

LT1 194, Video Difference Amplifier, Gain of 10 '92DB 2-171 

LT1195, Low Power, High Speed Operational Amplifier 2-116 

LT1200, Low Power High Speed Operational Amplifier '92DB 2-182 

L T1201/L T1202, Dual and Quad 1mA, 12MHz, 58V/ps Op Amps 2-1 27 

LT1206, 250mA/60MHz Current Feedback Amplifier 2-137 

LT1208/LT1209, Dual and 0uad45MHz, 400V/us Op Amps 2-150 

LT1211/LT1212, 14MHz, 7V/ps, Single Supply Dual and Quad Precision Op Amps 2-160 

Note: All products in BOLD are in this Databook, others appear in LTC's 1990 and 1992 Databoofcs ('90DB = LTC's 1990 Databook and '92DB = LTC's 1992 Databook Supplement). 



XT 



TABLE OF CONTENTS 



LT1213A11214, 28MHz. 12V/[is, Single Supply Dual and Quad Precision Op Amps 2-176 

L11215A11216, 23MHz, 50V/ps, Single Supply Dual and Quad Precision Op Amps 2-192 

U1217. Low Power High Speed Current Feedback Amplifier '92DB 2-190 

L T1220, Very High Speed Operational Amplifier (Av>1) '92DB 2-1 98 

L T1221, Very High Speed Operational Amplifier (Av>4) '92DB 2-21 

LT1222, Low Noise, Very High Speed Operational Amplifier (Av > 10) '92DB 2-218 

LT1223, 100MHz Current Feedback Amplifier '92DB 2-226 

LT1224, Very High Speed Operational Amplifier (Av>1) '92DB 2-237 

LT1225, Very High Speed Operational Amplifier (Av > 5) '92DB 2-245 

LT1226, LowNoise Very High Speed Operational Amplifier (Av > 25) '92DB 2-253 

LT1227, 140MHz Video Current Feedback Amplifier 2-208 

L 11228, 100MHz Current Feedback Amplifier with DC Gain Control '92DB 2-261 

L T1229/L 11230, Dual and Quad 100MHz Current Feedback Amplifiers '92DB 2-280 

L T1251/L 11255, 40MHz Video Fader and DC Gain Controlled Amplifiers 2-21 9 

L11252, Low Cost Video Amplifier 2-242 

L 11253/L 11254, Low Cost Dual and Quad Video Amplifiers 2-249 

L 11259A 11260, Low Cost Dual and Iriple 130MHz Current Feedback Amplifiers with Shutdown 2-256 

L11354, 12MHz, 400V, us Op Amp 2-267 

L11355/L11356, Dual and Quad 12MHz, 400V/us Op Amps 2-278 

L11357, 25MHz, 600V//JS Op Amp 2-289 

L11358/L11359, Dual and Quad 25MHz, SOOVfrs Op Amps 2-300 

L11360, 50MHz, 800V/psOpAmp 2-311 

L11361A11362, Dual and Quad 50MHz, 800V/fis Op Amps 2-322 

L11363, 70MHz, 1000V /ps Op Amp 2-333 

L11364/L11365, Dual and Quad 70MHz, WOOVfrs Op Amps 2-344 

ZERO DRIFT OPERATIONAL AMPLIFIERS 2-355 

L1C1047, Dual Micropower Zero Drift Operational Amplifier with Internal Capacitors '92DB 2-292 

L 1C1049, Low Power Zero Drift Operational Amplifier with Internal Capacitors '92DB 2-299 

L1C1050, Precision Zero Drift Op Amp with Internal Capacitors '90DB 2-1 81 

L1C1051/L1C1053, Dual/Quad Precision Zero Drift Operational Amplifiers with Internal Capacitors '92DB 2-306 

LIC1052, Zero Drift Op Amp '90DB 2-1 97 

L1C1052CS, Zero Drift Op Amp '90DB 2-217 

L1C1 150, ±15V Zero-Drift Operational Amplifier with Internal Capacitors '92DB 2-321 

L1C1151, Dual ±15V Zero-Drift Operational Amplifier 2-356 

L1C1152, Rail-to-Rail Input Rail-lo-Hail Output Zero-Drift Op Amp 13-7 

L1C1250, Very Low Noise Zen-Drift Bridge Amplifier 2-364 

ZERO DRIFT OPERATIONAL AMPLIFIERS, ENHANCED AND SECOND SOURCE 
L TC7652, Chopper Stabilized Op Amp '90DB 2-1 97 

MULTIPLEXERS 2-373 

L11203A11205, 150MHz Video Multiplexers 2-374 

LT1204, 4-lnput Video Multiplexer with 75MHz Current Feedback Amplifier 2-389 



Mote: All products in BOLD are in this Databook, others appear in LTC's 1990 and 1992 Databooks ('90DB = LTC's 1990 Databook and '92DB = LTC's 1992 Databook Supplement). 



9 



TABLE OF CONTENTS 



SECTION 3— INSTRUMENTATION AMPLIFIERS 

INDEX 3-2 

SELECTION GUIDE 3-3 

PROPRIETARY PRODUCTS 

L TC1043, Dual Instrumentation Switched Capacitor Building Block '90DB 11-15 

L TC1 100, Precision, Zero Drift Instrumentation Amplifier '92DB 3-4 

L T1 W1, Precision, Micropower, Single Supply Instrumentation Amplifier (Fixed Gain = 10 or 100) '92DB 3-11 

LT1102, High Speed, Precision, JFET Input Instrumentation Amplifier (Fixed Gain = 10 or 100) '92DB 3-23 

L T1 193, Video Difference Amplifier, Adjustable Gain '92DB 2-1 59 

LT1194, Video Difference Amplifier, Gain of 10 '92DB 2-171 

SECTION 4— POWER PRODUCTS 

INDEX 4-2 

SELECTION GUIDES 4-4 

PROPRIETARY PRODUCTS 

INDUCTORLESS DC TO DC CONVERTERS 4-15 

L T1026, Voltage Converter '90DB 5-3 

L TC1044/7660, Switched Capacitor Voltage Converter '90DB 5-9 

LTC1044A. 12V CMOS Voltage Converter 4-16 

LTC1044CS8, Switched Capacitor Voltage Converter '90DB 5-21 

LTC1046, 50mA Switched Capacitor Voltage Converter '92DB 4-16 

LT1054, Switched-Capacitor Voltage Converter with Regulator 4-26 

LTC1144, Switched-Capacitor Wide Input Range Voltage Converter with Shutdown 4-38 

HIGH SIDE SWITCHES '92DB 4-25 

LT1089, High Side Switch '90DB 11-45 

LTC1 155, Dual High Side Micropower N-Channel MOSFET Driver with Internal Charge Pump '92DB 4-26 

LTC1156, Quad High Side Micropower N-Channel MOSFET Driver with Internal Charge Pump '92DB 4-41 

LT1188, 1.5A High Side Switch '92DB 4-48 

LINEAR REGULATORS 4-47 

L T1003, 5 Volt, 5 Amp Voltage Regulator '90DB 4-9 

L T1005, Logic Controlled Regulator '90DB 4-1 7 

L T1020, Micropower Regulator and Comparator '90DB 4-29 

L T1020CS, Micropower Regulator and Comparator '90DB 4-45 

L T1033, 3A Negative Adjustable Regulator '90DB 4-49 

L T1035, Logic Controlled Regulator '90DB 4-57 

LT1036, Logic Controlled Regulator '90DB 4-69 

LT1038, 10 Amp Positive Adjustable Voltage Regulator '90DB 4-77 

LT1083/LT1084/LT1085, 7.5A, 5A, 3A Low Dropout Positive Adjustable Regulators 4-48 

LT1083/LT1084/LT1085, 7.5A, 5A, 3A Low Dropout Positive Fixed Output Regulators 4-61 

LT1 086 Series, 1.5A Low Dropout Positive Regulators Adjustable and 2.85V, 3.3V, 3.6V, 5V, 12V 4-72 

LT1087, Adjustable Low Dropout Regulator with Kelvin-Sense Inputs '92DB 4-56 

LT1117AT1117-2.85/LT1117-3.3/LT1117-5, 800mA Low Dropout Positive Regulators Adjustable and 

Fixed 2.85V, 3.3V, 5V 4-85 

LT1120, Micropower Regulator with Comparator and Shutdown 4-96 

L T1 120A, Micropower Regulator with Comparator and Shutdown 4-1 07 

Note: All products in BOLD are in this Databook, others appear in LTC's 1990 and 1992 Databooks ('90DB = LTC's 1990 Databook and '92DB = ITC's 1992 Databook Supplement). 



10 



XTUIKS 



TABLE OF CONTENTS 



LT1121/LT1121-3.3/LT1121-5, Micropower Low Dropout Regulators with Shutdown 4-114 

LT1123, 5V Low Dropout Regulator Driver '92DB 4-75 

L T1 129/L T1 129-3. 3/L T1 129-5, Micropower Low Dropout Regulators with Shutdown 4-125 

LT1185, Low Dropout Regulator with Adjustable Current Limit '92DB 4-86 

LT1585, 4A Low Dropout Fast Response Positive Regulator Adjustable and Fixed Outputs 13-136 

LINEAR REGULATORS, ENHANCED AND SECOND SOURCE 

LM1 1 7/LM31 7, Positive Adjustable Regulator '90DB 4-1 37 

LT117A/LT317A, Improved LM1 17 '90DB 4-137 

LM1 1 7HV/ LM31 7HV, High Voltage Positive Adjustable Regulator '90DB 4-1 45 

LTI 17AHV/1 T317AHV, Improved LM117HV '90DB 4-145 

LM123/LM323, 5 Volt, 3 Amp Regulator '90DB 4-149 

LT123A/LT323A, Improved LM 123 '90DB 4-149 

LM1 37/LM337, Negative Adjustable Regulator '90DB 4-1 57 

L 1137A./L T337A, Improved LM137 '90DB 4-157 

LM137HV/LM337HV, High Voltage Negative Adjustable Regulator '90DB 4-165 

L T137AHV/L T337AHV, Improved LM137HV '90DB 4-165 

LM1 38/LM338, 5 Amp Positive Adjustable Regulator "90DB 4-1 69 

LT138A/LT338A, Improved LM1 38 '90DB 4-169 

LM150/LM350, 3 Amp Positive Adjustable Regulator '90DB 4-1 77 

LT150A/LT350A, Improved I M 150 '90DB 4-177 

POWER AND MOTOR CONTROL 4-137 

LTC1153, Auto-Reset Electronic Circuit Breaker 4-138 

LTC1154, High-Side Micropower MOSFET Driver 4-152 

LTC1157, 3.3V Dual Micropower High-Side/Low-Side MOSFET Driver 4-1 67 

L 11 158, Half Bridge N-Channel Power MOSFET Driver '92DB 4-1 02 

LT11B1, Quad Protected High-Side MOSFET Driver 4-175 

LTC11B3/LTC1165, Triple 1.8V to 6V High-Side MOSFET Drivers 4-186 

LT1241-45, High Speed Current Mode Pulse Width Modulators '92DB 4-122 

LT1246, 1 MHz Off-Line Current Mode PWM '92DB 4-134 

LT1248, Power Factor Controller 4-194 

LT1249, Power Factor Controller 4-205 

L 11432, 5V High Efficiency Step-Down Switching Regulator Controller '92DB 4-1 45 

LTC1255, Dual 24V High-Side MOSFET Driver 4-215 

POWER AND MOTOR CONTROL, ENHANCED AND SECOND SOURCE 

SG1 524/SG3524, Regulating Pulse Width Modulators '90DB 5-85 

SG3524S, Regulating Pulse Width Modulator '90DB 5-93 

LT1524/LT3524, Regulating Pulse Width Modulators '90DB 5-85 

SG1525A/SG3525A, Regulating Pulse Width Modulators '90DB 5-97 

LT1525A/L13525A, Regulating Pulse Width Modulators '90DB 5-97 

L11526/L13526, Regulating Pulse Width Modulators '90DB 5-105 

SG1527A/SG3527A, Regulating Pulse Width Modulators '90DB 5-97 

L 11527 A/L 13527 A, Regulating Pulse Width Modulators '90DB 5-97 

1 11846/L 11847, Current Mode PWM Controller '90DB 5-113 

L 13846/L 13847, Current Mode PWM Controller '90DB 5-1 1 3 



Note: All products in BOLD are in this Databook, others appear in LTC's 1990 and 1992 Databooks ('90OB = LTC's 1990 Databook and '92DB = LTC's 1992 Oatabook Supplement). 



11 



T ABLE OF CONTENTS 

SWITCHING REGULATORS 4-231 

i 77070, 5A High Efficiency Switching Regulator '90DB 5-37 

LT1071, 2.5A High Efficiency Switching Regulator • j .'90DB 5-37 

LT1072, 1.25A High Efficiency Switching Regulator 4-232 

LT1073, Micropower DC-DC Converter Adjustable and Fixed 5V, 12V '92DB 4-174 

LT1074AT1076, Step-Down Switching Regulator 4-243 

L T1 076-5, 5V Step-Down Switching Regulator '92DB 4-208 

LT1082, 1A High Voltage, High Efficiency Switching Voltage Regulator 4-257 

LT1103/LT1105, Offline Switching Regulator 4-267 

LT1W7, Micropower DC/DC Converter Adjustable and Fixed 5V, 12V 4-294 

LT1108, Micropower DC/DC Converter Adjustable and Fixed 5V, 12V 4-306 

LT1109, Micropower Low Cost DC/DC Converter Adjustable and Fixed 5V, 12V 4-318 

LT1109A, Micropower DC/DC Converter Flash Memory VPP Generator Adjustable and Fixed 5V. 12V 4-325 

LT1 1 10, Micropower DC-DC Converter Adjustable and Fixed 5V, 12V, High Frequency '92DB 4-245 

111111, Micropower DC/DC Converter Adjustable and Fixed 5V, 12V 4-331 

LT1111, Micropower DC-to-DC Converter Adjustable and Fixed 5V, 12V, High Frequency '92DB 4-260 

LTC1142/LTC1142-ADJ, Dual High Efficiency Synchronous Step-Down Switching Regulators 4-346 

LTC1143, Dual High Efficiency Step-Down Switching Regulator Controller 4-365 

LTC1147-3.3ATC1147-5, High Efficiency Step-Down Switching Regulator Controllers 4-380 

LTC1 1 48 ATC1 148-3. 3 ATC1 148-5, High Efficiency Synchronous Step-Down Switching Regulators 4-395 

LTC1149/LTC1149-3.3/LTC1149-5, High Efficiency Synchronous Step-Down Switching Regulators 4-414 

LTC1159/LTC1159-3.3/LTC1159-5, High Efficiency Synchronous Step-Down Switching Regulators 13-11 

LT1170AT1171/LT1172, 100kHz, 5A, 2.5A, and 1.25A High Efficiency Switching Regulators 4-433 

LT1173, Micropower DC-DC Converter Adjustable and Fixed 5V, 12V '92DB 4-275 

LTC1174/LTC1174-3.3/LTC1174-5, High Efficiency Step-Down and Inverting DC/DC Converter 4-447 

LT1176/LT1176-5, Step-Down Switching Regulator 4-462 

L T1 182/L T1 183, CCFL/LCD Contrast Dual Switching Regulator 1 3-27 

LT1268B/LT1268, 7.5A, 150kHz Switching Regulators 4-466 

LT1270AT1270A, 8A and 10 A High Efficiency Switching Regulators 4-470 

LT1271AT12B9, 4 A High Efficiency Switching Regulators 4-474 

LT1300, Micropower High Efficiency 3. 3/5V Step-Up DC/DC Converter 4-478 

L 11301, Micropower High Efficiency 5V12V Step-Up DC/DC Converter with Flash Memory 4-486 

L T1302A T1 302-5, Micropower High Output Current Step-Up Adjustable and Fixed 5V DC/DC Converter 1 3-47 

L T1303A T1 303-5, Micropower High Efficiency DC/DC Converter with Low-Battery Detector Adjustable and 

Fixed 51/ 13-51 

LT1309, 500kHz Micropower DC/DC Converter for Flash Memory 13-55 

LT1372, 500kHz High Efficiency 1.5A Step-Up Switching Regulator 13-120 

LT137B, 1.5A, 500kHz Step-Down Switching Regulator 13-121 

PCMCIA HOST AND CARD POWER MANAGEMENT DEVICES 4-497 

177700, Micropower Step-Up DC/DC Converter for PCMCIA Card Flash Memory 13-3 

L TC1262, 12V, 30mA Inductor! ess Flash Memory Programming Supply 1 3-35 

LT1312, Single PCMCIA VPP Driver/Regulator 13-59 

LT1313, Dual PCMCIA VPP Driver/Regulator 13-71 

BATTERY MANAGEMENT CIRCUITS 4-499 

LTC1325, Microprocessor-Controlled Battery Charger 13-94 



Note: All products in BOLD are in this Databook, ot hers appear in LTC's 1990 and 1992 Databooks ('90DB = LTC's 1990 Databook and '92DB • LTC's 1992 Databook Supplement). 



12 



TABLE OF CONTENTS 



SECTION 5— INTERFACE 

INDEX 5-2 

SELECTION GUIDES , 5-3 

PROPRIETARY PRODUCTS 

RS232/562 5-9 

L T1030, Quad Low Power Line Driver '90DB 1 0-5 

L T1030CS, Quad Low Power Line Driver '90DB 1 0-9 

L 11032, Quad Low Power Line Driver '90DB 10-11 

L T1039, RS232 Driver/Receiver with Shutdown '90DB 1 0-1 9 

L T1080, Advanced Low Power 5V RS232 Dual Driver/Receiver '90DB 1 0-43 

L T1081, Advanced Low Power 5V RS232 Dual Driver/Receiver '90DB 1 0-43 

LT1080CS/LT1081CS, 5V Powered RS232 Driver/Receiver with Shutdown '90DB 10-51 

LT1130A, Advanced 5-Driver/5-Receiver RS232 Transceiver 5-10 

L T1 131 A, Advanced 5-Driver/4-Receiver RS232 Transceiver with Shutdown 5-10 

LT1132A, Advanced 5-Driver/3-Reeeiver RS232 Transceiver 5-10 

LT1133A, Advanced 3-Driver/5-Receiver RS232 Transceiver 5-10 

LT1134A, Advanced 4-Driver/4-Receiver RS232 Transceiver 5-10 

L T1 135A, Advanced 5-Driver/3-Receiver RS232 Transceiver without Charge Pump 5-10 

LT1136A, Advanced 4-Driver/5-Receiver RS232 Transceiver with Shutdown 5-10 

L T1 137 A, Advanced Low Power 5V RS232 Transceiver with Small Capacitors 5-20 

LT1138A, Advanced 5-Driver/3-Receiver RS232 Transceiver with Shutdown 5-10 

L T1 139A, Advanced 4-Driver/4-Receiver RS232 Transceiver with Shutdown 5-10 

L T1 140A, Advanced 5-Oriver/3-Receiver RS232 Transceiver without Charge Pump 5-10 

L T1141A, Advanced 3-Driver/5-Receiver RS232 Transceiver without Charge Pump 5-10 

LT1180A, Low Power 5V RS232 Dual Driver/Receiver with 0.1/jF Capacitors 5-27 

LT1181A, Low Power 5VRS232 Dual Driver/Receiver with 0.1/uF Capacitors 5-27 

LT1237, 5VRS232 Transceiver with Advanced Power Management and One Receiver Active in SHUTDOWN 5-34 

LT1280A, Low Power 5V RS232 Dual Driver/Receiver with 0.1^F Capacitors 5-41 

LT1281A, Low Power 5VRS232 Dual Driver/Receiver with 0.1/aF Capacitors 5-41 

LTC1327, 3.3V Micropower EIA/TIA-562 Transceiver 5-48 

LT1330, 5VRS232 Transceiver with 3V Logic Interlace and One Receiver Active In SHUTDOWN 5-54 

L T1331, 3V RS232 or 5V/3V RS232 Transceiver with One Receiver Active in SHUTDOWN 5-61 

LT1332, Wide Supply Range Low Power RS232 Transceiver with 12V VPP Output for Flash Memory 5-68 

LTC1337, 5V Low Power RS232 3-Driver/5-Receiver Transceiver 5-76 

LTC1338, 5V Low Power RS232 5-Driver/3-Receiver Transceiver 5-82 

L T1341, 5V RS232 Transceiver with One Receiver Active in SHUTDOWN 5-88 

LT1342, SVRS232 Transceiver with 3V Logic Interface 5-95 

L TC1347, 5V Low Power RS232 3-Driver/5-Recelver Transceiver with 5 Receivers Active in SHUTDOWN 5-1 02 

LTC1348, 3.3V Low Power RS232 3-Driver/5-Recelver Transceiver 13-116 

L TC1349, 5V Low Power RS232 3-Driver/5-Receiver Transceiver with 2 Receivers Active in SHUTDOWN 5-1 08 

LTC13S0, 3.3V Low Power EIA/TIA-562 3-Driver/5-Receiver Transceiver 5-114 

LT1381, Low Power 5VRS232 Dual Driver/Receiver with 0. 1\iF Capacitors 5-120 

L TC1382, 5V Low Power RS232 Transceiver with Shutdown 5-1 27 

LTC1383, 5V Low Power RS232 Transceiver 5-133 



Mole: All products in BOLD are in this Databook, others appear in ITC's 1990 and 1992 Databooks ('90DB = LTC's 1990 Databook and '92DB = LTC's 1992 Databook Supplement). 



13 



TABLE OF CONTENTS 



LTC1384, 5V Low Power RS232 Transceiver with 2 Receivers Active in SHUTDOWN 5-139 

LTC1385, 3.3V Low Power EIA/TIA-562 Transceiver 5-145 

LTC1386, 3.3V Low Power EIA/TIA-562 Transceiver 5-151 

RS485 5-157 

LTC485, Low Power RS485 Interface Transceiver '92DB 5-6 

L TC486, Quad Low Power RS485 Driver '92DB 5-16 

I TC487, Quad Low Power RS485 Driver '92DB 5-24 

LTC488/LTC489, Quad RS485 Line Receiver 5-158 

L TC490, Low Power RS485 Interface Transceiver '92DB 5-32 

L TC491, Low Power RS485 Interface Transceiver '92DB 5-40 

LTC1481, Ultra-Low Power RS485 Transceiver with Shutdown 13-122 

LTC1483, Ultra-Low Power RS485 Low EMI Transceiver with Shutdown 13-129 

LTC1485, Differential Bus Transceiver 5-166 

AppleTalk® 5-177 

LTC1318, Single 5V RS232/RS422/AppleTalk® Transceiver 13-79 

LTC1320, AppleTalk® Transceiver 5-178 

LTC1323, Single 5V AppleTalk® Transceiver 13-85 

DIGITAL ISOLATORS 5-185 

LTC1145ATC1146, Low Power Digital Isolator 5-186 

MIXED PROTOCOL 5-197 

LTC1321/LTC1322/LTC1335, RS232/EIA562/RS485 Transceivers 5-198 

LEVEL TRANSLATOR '90DB 10-27 

LTC1045, Programmable Micropower Hex Level Translator/Receiver/Driver '90DB 10-27 

SECTION 6— DATA CONVERSION 

INDEX 6-2 

SELECTION GUIDES 6-3 

PROPRIETARY PRODUCTS 

ANALOG TO DIGITAL CONVERTERS 6-7 

LTC1090, Single Chip 10-Bit Data Acquisition System '90DB 9-5 

LTC1091, 1-Channel, 10-Bit Serial I/O Data Acquisition System '90DB 9-29 

L TC1092, 2-Channel, 10-Bit Serial I/O Data Acquisition System '90DB 9-29 

LTC1093, 6-Channel, 10-Bit Serial I/O Data Acquisition System '90DB 9-29 

L TC1094, 8-Channel, 10-Bit Serial I/O Data Acquisition System '90DB 9-29 

LTC1095, Complete 1 0-Bit Data Acquisition System with On Board Reference '90DB 9-57 

L TC109B/L TC1098, Micropower Sampling 8-Bit Serial I/O A/D Converters 6-8 

LTC1099, High Speed 8-Bit A/D Converter with Built-in Sample-and-Hold '90DB 9-81 

LTC1196/LTC1198, 8-Bit, SO-8, 1MSPS ADCs with Auto-Shutdown Options 6-32 

LTC1272, 12-Bit, 3/JS, 250kHz Sampling A/D Converter '92DB 6-6 

LTC1273/LTC1275ATC1276, 12-Bit, 300ksps Sampling A/D Converters with Reference 6-58 

LTC1278, 12-Bit, 500ksps Samplng A/D Converter with Shutdown 6-80 

LTC1282, 3V UBksps 12-Bit Sampling A/D Converter with Reference 6-95 

LTC1283, 3V Single Chip 19-Bit Data Acquisition System 6-117 

LTC1285/LTC1288, 3V Micropower 12-Bit A/D Converters in SO-8 Packages 13-39 



Note: All products in BOLD are in this Databook, others appear in LTC's 1990 and 1992 Databooks ('90DB = LTC's 1990 Databook and '92DB = LTC's 1992 Databook Supplement) 



14 



TABLE OF CONTENTS 



LTC1286/LTC1298, Micropower Sampling 12-Bit A/D Converters in SO-8 Packages 6-140 

LTC1287, 3V Single Chip 12-Bit Data Acquisition System '92DB 6-25 

L TC1289, 3V Single Chip 12-Bit Data Acquisition System '92DB 6-40 

L TC1290, Single Chip 12-Bit Data Acquisition System '92DB 6-67 

LTC1291, Single Chip 12-Bit Data Acquisition System 6-1 63 

LTC1292/LTC1297, Single Chip 12-Bit Data Acquisition Systems 6-182 

LTC1293/LTC1294/LTC1296, Single Chip 12-Bit Data Acquisition System '92DB 6-113 

ANALOG TO DIGITAL CONVERTERS, ENHANCED SECOND SOURCE 
LT574A, Complete 12-Bit A/D Converter 6-205 

DIGITAL TO ANALOG CONVERTERS 6-209 

LTC1257, Complete Single Supply 12-Bit Voltage Output DAC in SO-8 6-210 

SECOND SOURCE PRODUCTS (SAMPLE/HOLD CIRCUITS) 

LF1 98A/LF398A, Precision Sample and Hold Amplifier '90DB 9-97 

LF1 98/LF398, Precision Sample and Hold Amplifier '90DB 9-97 

LF398S8, Precision Sample and Hold Amplifier '90DB 9-113 

SECTION 7— VOLTAGE REFERENCES 

INDEX 7-2 

SELECTION GUIDES 7-3 

PROPRIETARY PRODUCTS 

L TZ1000, Ultra Precision Reference '90DB 3-9 

L TZ1000A, Ultra Precision Reference '90DB 3-9 

L T1004, Micropower Voltage Reference '90DB 3-1 7 

LT1004CS8-1 .2/LT1004CS8-2.5, Micropower Voltage References '90DB 3-25 

LT1009 Series, 2.5 Volt Reference '90DB 3-27 

L T1009S8, 2.5 Volt Reference '90DB 3-31 

LT1019, 2.5V, 4.5V, 5.0V, 10.0V, Precision References '90DB 3-33 

LT1021, 5.0V, 7.0V, 10.0V, Precision References '90DB 3-41 

LT1021DCS8, 5.0V, 7.0V, 10.0V, Precision References '90DB 3-57 

L 71027, Precision 5V Reference '92DB 7-6 

LT1029, 5VBandgap Reference '90DB 3-61 

L T1031, Precision 10V Reference , '90DB 3-65 

LT1034-1.2/LT1034-2.5, Micropower Dual Reference 7-5 

LT1431, Programmable Reference '92DB 7-1 3 

SECOND SOURCE PRODUCTS 

LH0070, Precision 1 0V Reference '90DB 3-65 

LM1 29/LM329, 6.9V Precision Voltage Reference '90DB 3-83 

LM1 34 Series, Constant Current Source and Temperature Sensor '90DB 3-87 

LM334S8, Constant Current Source and Temperature Sensor '90DB 3-99 

LM136-2.5/LM336-2.5, 2.5 Volt Reference '90DB 3-101 

LM1 85-1 .2/LM385-1 .2, Micropower Voltage Reference '90DB 3-1 05 

LM1 85-2.5/LM385-2.5, Micropower Voltage Reference '90DB 3-1 09 

LM385S8-1.2/LM385S8-2.5, Micropower Voltage Reference '90DB 3-113 

LM199/LM399/LM199A/LM399A, Precision Reference '90DB 3-115 



Mote: All products in BOLD are in this Databook, others appear in LTC's 1990 and 1992 Databooks ('9QDB = LTC's 199D Databook and '92DB = LTC's 1992 Databook Supplement). 



15 



TABLE OF CONTENTS 



LT580, Precision Reference '90DB 3-1 21 

LT581, Precision Reference • t.... • '90DB 3-121 

REF-01/REF-02, Precision Voltage References '90DB 3-125 



SECTION 8— MONOLITHIC FILTERS 

INDEX 8-2 

SELECTION GUIDES 8-3 

PROPRIETARY PRODUCTS 

L TC1059, High Peformance Switched Capacitor Universal Filter '90DB 7-3 

L TC1059CS, High Performance Switched Capacitor Universal Filter '90DB 7-11 

L TC1060, Universal Dual Filter Building Block '90DB 7-1 5 

L TC1060CS, Universal Dual Filter Building Block '90DB 7-35 

LTC1061, High Performance Triple Universal Filter Building Block '90DB 7-39 

LTC1061CS, High Performance Triple Universal Filter Building Block '90DB 7-55 

LTC1062, 5th Order Lowpass Filter 8-5 

LTC1063, DC Accurate, Clock-Tunable 5th Order Butterworth Lowpass Filter 8-16 

LTC1064, Low Noise, Fast, Quad Universal Filter Building Block '90DB 7-73 

L TC1064- 1, Low Noise, 8th Order, Clock Sweepable Elliptic Lowpass Filter '90DB 7-89 

LTC1064-2, Low Noise, High Frequency, 8th Order Butterworth Lowpass Filter '92DB 8-5 

L TCI 064-3, Low Noise, High Frequency, 8th Order Linear Phase Lowpass Filter '92DB 8-1 3 

L TC1 064-4, Low Noise, 8th Order, Clock Sweepable Cauer Lowpass Filter '92DB 8-21 

LTC1064-7, Linear Phase, 8th Order Lowpass Filter 8-28 

LTC1065, DCAccurale, Clock-Tunable Linear Phase 5th Order Bessel Lowpass Filter 8-39 

LTC1066-1, 14-Bit DC Accurate Clock-Tunable, 8th Order Elliptic or Linear Phase Lowpass Filter 8-51 

L TC1 164, Low Power, Low Noise, Quad Universal Filter Building Block '92DB 8-29 

LTC1164-5, Low Power 8th Order Pin Selectable Butterworth or Bessel Lowpass Filter 8-67 

LTC1 164-6, Low Power 8th Order Pin Selectable Elliptic or Linear Phase Lowpass Filter 8-78 

LTC1164-7, LowPower, Linear Phase 8th Order Lowpass Filter 8-89 

LTC1264, High Speed, Quad Universal Filter Building Block 8-100 

L TCI 264-7, Linear Phase, Group Delay Equalized, 8th Order Lowpass Filter 8-115 



SECTION 9— MICROPROCESSOR SUPERVISORY CIRCUITS 

INDEX 9-2 



SELECTION GUIDE 9-3 

PROPRIETARY PRODUCTS 

LTC690/LTC691/LTC694/LTC695, Microprocessor Supervisory Circuits '92DB 9-4 

LTC692/LTC693, Microprocessor Supervisory Circuits 9-4 

LTC694-3.3/LTC695-3.3, 3.3V Microprocessor Supervisory Circuits 9-19 

LTC699, Microprocessor Supervisory Circuit '92DB 9-18 

L TC1232, Microprocessor Supervisory Circuit '92DB 9-22 

LTC1235, Microprocessor Supervisory Circuit with Conditional Battery Backup '92DB 9-29 



Note: All products in BOLD are in this Databook, others appear in LTCs 1 



Databooks ('90DB = LTCs 1990 Databook and '92DB, = LTCs 1992 Databook Supplement). 



16 



TABLE OF CONTENTS 



SECTION 10— COMPARATORS 

INDEX 10-2 

SELECTION GUIDES 10-3 

PROPRIETARY PRODUCTS 

LT101 1, Voltage Comparator '90DB 6-9 

LT1015, High Speed Dual Line Receiver '92DB 10-4 

LT1016, Ultra Fast Precision Comparator '90DB 6-25 

LT1016CS8, Ultra Fast Precision Comparator '90DB 6-41 

LT1017/LT1018, Micropower Dual Comparator 10-4 

LTC1040, Dual Micropower Comparator '90DB 6-57 

LTC1041, BANG-BANG Controller '90DB 6-69 

LTC1042, Window Comparator '90DB 6-77 

LT1 1 16, 12ns, Single Supply Ground-Sensing Comparator '92DB 1 0-7 

ENHANCED AND SECOND SOURCE PRODUCTS 

LM111/LM311, Voltage Comparator '90DB 6-85 

LT111A/LT311A, Improved LM111 '90DB 6-85 

LM119/LM319, Dual Comparator '90DB 6-93 

LT119A/LT319A, Improved LM119 '90DB 6-93 

LT685, High Speed Comparator '90DB 6-5 

SECTION 11— SPECIAL FUNCTION 

INDEX 11-2 

SELECTION GUIDE 11-3 

PROPRIETARY PRODUCTS 

LTK001, Thermocouple Cold Junction Compensator and Matched Amplifier '90DB 11-3 

L TC201A/L TC202/L TC203, Micropower, Low Charge Injection, Quad CMOS Analog Switches '92DB 11-4 

LTC221/LTC222, Micropower, Low Charge Injection, Quad CMOS Analog Switches with Data Latches '92DB 11-15 

L T1025, Micropower Thermocouple Cold Junction Compensator '90DB 1 1 -7 

LTC1043, Dual Precision Instrumentation Switched Capacitor Building Block '90DB 11-15 

L TC1043CS, Dual Precision Instrumentation Switched Capacitor Building Block '90DB 11-31 

LT1088, Wideband RMS-DC Converter Building Block '90DB 11-33 

SECTION 12— MILITARY PRODUCTS 

INDEX 12-2 

Military Products/Programs 12-3 

JAN 12-3 

MIL-M-38510 Class B Flow (Figure 1) 12-4 

MIL-M-38510 Class S Flow (Figure 2) 12-5 

Standard Military Drawings 12-4 

SMD Preparation Flowchart (Figure 3) 12-6 

SMDs Get a New Part Numbering System 12-6 

MIL-STD-883 Product 12-7 

883 Group A Sampling Plan (Table 1) 12-7 

Hi-Rel (SCDs) 12-7 



Note: All products in BOLD are in this Databook, others appear in LTC's 1990 and 1992 Da tabooks ('90DB = LTC's 1990 Oatabook and 92DB = LTC's 1992 Databook Supplement). 



17 



TABLE OF CONTENTS 



Radiation Hardness Program 12-7 

Military Market Commitment 12-7 

883 Certificate of Conformance 12-8 

MIL-STD-883 Test Methods 12-9 

Military Parts List 12-13 

SECTION 13— NEW PRODUCTS 

INDEX 13-2 

PROPRIETARY PRODUCTS 

LT1106, Micropower Step-Up DC/DC Converter for PCMCIA Card Flash Memory 13-3 

LTC1152, Rail-to-Rail Input Rail-toRail Output Zero-Drift Op Amp 13-7 

LTC1159/LTC1159-3.3ATC1159-5, High Efficiency Synchronous Step-Down Switching Regulators 13-11 

LT1182AT1183, CCFL/LCD Contrast Dual Switching Regulator 13-27 

LTC1262, 12V, 30mA Inductor I ess Flash Memory Programming Supply 13-35 

LTC1285/LTC1288, 3V Micropower 12-Bit A/D Converters in SO-8 Packages 13-39 

L T1302A T1 302-5, Micropower High Output Current Step-Up Adjustable and Fixed 5V DC/DC Converter 1 3-47 

LT1303/LT1303-5, Micropower High Efficiency DC/DC Converter with Low-Battery Detector Adjustable 

and Fixed 5V 13-51 

LT1309, 500kHz Micropower DC/DC Converter for Flash Memory 13-55 

LT1312, Single PCMCIA VPP Driver/Regulator 13-59 

LT1313, Dual PCMCIA VPP Driver/Regulator 13-71 

LTC1318, Single 5V RS232/RS422/AppleTalk® Transceiver 13-79 

LTC1323, Single 5V AppleTalk® Transceiver 13-85 

LTC1325, Microprocessor-Controlled Battery Charger 13-94 

LTC1348, 3.3V Low Power RS232 3-Driver/5-Receiver Transceiver 13-116 

LT1372, 500kHz High Efficiency 1.5A Switching Regulator 13-120 

LT137B, 1.5A, 500kHz Step-Down Switching Regulator 13-121 

LTC1481, Ultra-Low Power RS485 Transceiver with Shutdown 13-122 

LTC1483, Ultra-Low Power RS485 Low EMI Transceiver with Shutdown 13-129 

LT1585, 4A Low Dropout Fast Response Posilive Regulator Adjustable and Fixed Outputs 13-136 

SECTION 14— PACKAGE DIMENSIONS 

INDEX 14-2 

PACKAGE CROSS REFERENCE 14-3 

PACKAGE DIMENSIONS 14-5 

SECTION 15— APPENDICES 

INDEX 15-2 

Introduction to Quality and Reliability Assurance Programs 15-3 

Reliability Assurance Program 15-4 

Quality Assurance Program 15-20 

Wafer Fabrication Flowchart 15-26 

Assembly Flowchart 15-30 

Test and End of Line Flowchart 15-33 

R-Flow 15-34 

Note^nwlijct^r^OUUr^^ 

18 



TABLE OF CONTENTS 



ESD Protection Program 15-35 

Statistical Process Control 15-46 

Surface Mount Products 15-49 

Dice Products 15-62 

Design Tools 15-64 

Application Notes 15-64 

Design Notes 15-68 

Applications on Disk 15-69 

Technical Publications 15-70 



Note: All products in BOLD are in this Databook, others appear in LTC's 1990 and 1992 Databooks ('90DB = LTC's 1990 Dalabook and '92DB = LTC's 1992 Databook Supplement). 



XTUflB* 



19 



NOTES 



20 



jjritm 



ALPHANUMERIC INDEX 



Extended Temperature Range-200°C Products '90DB 1 3-74 

LF155, JFET Input Op Amp, Low Supply Current '90DB 2-271 

LF1 55A, JFET Input Op Amp, Low Supply Current '90DB 2-271 

LF156, JFET Input Op Amp, High Speed '90DB 2-271 

LF1 56A, JFET Input Op Amp, High Speed '90DB 2-271 

LF1 98, Precision Sample and Hold Amplifier '90DB 9-97 

LF198A, Precision Sample and Hold Amplifier '90DB 9-97 

LF355, JFET Input Op Amp, Low Supply Current '90DB 2-271 

LF355A, JFET Input Op Amp, Low Supply Current '90DB 2-271 

LF356, JFET Input Op Amp, High Speed '90DB 2-271 

LF356A, JFET Input Op Amp, High Speed '90DB 2-271 

LF398, Precision Sample and Hold Amplifier '90DB 9-97 

LF398A, Precision Sample and Hold Amplifier '90DB 9-97 

LF398S8, Precision Sample and Hold Amplifier '90DB 9-113 

LF412A, Dual Precision JFET Input Op Amp '90DB 2-275 

LH0070, Precision 1 0V Reference '90DB 3-65 

LH21 08A, Dual LM1 08 Op Amp '90DB 2-279 

LM10, Low Power Op Amp and Reference '90DB 2-281 

LM10B, Low Power Op Amp and Reference '90DB 2-281 

LM1 OBL, Low Power Op Amp and Reference '90DB 2-281 

LM10C, Low Power Op Amp and Reference '90DB 2-281 

LM10CL, Low Power Op Amp and Reference '90DB 2-281 

LM101A, Uncompensated General Purpose Op Amp '90DB 2-297 

LM107, Compensated General Purpose Op Amp '90DB 2-297 

LM1 08, Super Gain Op Amp '90DB 2-303 

LM108A, Super Gain Op Amp '90DB 2-303 

LM111, Voltage Comparator '90DB 6-85 

LM117, Positive Adjustable Regulator '90DB 4-137 

LM117HV, High Voltage Positive Adjustable Regulator '90DB 4-145 

LM118, High Slew Rate Op Amp '90DB 2-31 1 

LM119, Dual Comparator '90DB 6-93 

LM123, 5 Volt, 3 Amp Regulator '90DB 4-1 49 

LM1 29, 6.9V Precision Voltage Reference '90DB 3-83 

LM134 Series, Constant Current Source and Temperature Sensor '90DB 3-87 

LM136-2.5, 2.5 Volt Reference '90DB 3-101 

LM1 37, Negative Adjustable Regulator '90DB 4-1 57 

LM137HV, High Voltage Negative Adjustable Regulator '90DB 4-165 

LM1 38, 5 Amp Positive Adjustable Regulator '90DB 4-1 69 

LM1 50, 3 Amp Positive Adjustable Regulator '90DB 4-1 77 

LM185-1.2, Micropower Voltage Reference '90DB 3-105 

LM1 85-2.5, Micropower Voltage Reference '90DB 3-109 

LM1 99, Precision Reference '90DB 3-1 1 5 

LM199A, Precision Reference '90DB 3-115 

LM301 A, Uncompensated General Purpose Op Amp '90DB 2-297 

LM307, Compensated General Purpose Op Amp '90DB 2-297 

Note: All products in BOLD are in this Databook, others appear in LTCs 1990 and 1992 Databooks ('90DB = LTC's 1990 Databook and '92DB = LTCs 1992 Databook Supplement). 

£T\m 21 



ALPHANUMERIC INDEX 



LM308, Super Gain Op Amp '90DB 2-303 

LM308A, Super Gain Op Amp '90DB 2-303 

LM31 1 , Voltage Comparator '90DB 6-85 

LM317, Positive Adjustable Regulator '90DB 4-137 

LM317HV, High Voltage Positive Adjustable Regulator '90DB 4-145 

LM31 8, High Slew Rate Op Amp '90DB 2-31 1 

LM318S8, High Speed Op Amp '90DB 2-319 

LM31 9, Dual Comparator '90DB 6-93 

LM323, 5 Volt, 3 Amp Regulator '90DB 4-149 

LM329, 6.9V Precision Voltage Reference '90DB 3-83 

LM334S8, Constant Current Source and Temperature Sensor '90DB 3-99 

LM336-2.5, 2.5 Volt Reference '90DB 3-101 

LM337, Negative Adjustable Regulator '90DB 4-157 

LM337HV, High Voltage Negative Adjustable Regulator '90DB 4-165 

LM338, 5 Amp Positive Adjustable Regulator '90DB 4-169 

LM350, 3 Amp Positive Adjustable Regulator '90DB 4-177 

LM385-1.2, Micropower Voltage Reference '90DB 3-105 

LM385-2.5, Micropower Voltage Reference '90DB 3-109 

LM385S8-1 .2, Micropower Voltage Reference '90DB 3-1 1 3 

LM385S8-2.5, Micropower Voltage Reference '90DB 3-113 

LM399, Precision Reference '90DB 3-115 

LM399A, Precision Reference '90DB 3-115 

LT1 1 1A, Improved LM1 1 1 '90DB 6-85 

LT117A, Improved LM117 '90DB 4-137 

LT117AHV, Improved LM117HV '90DB 4-145 

L T1 18A, Improved LM1 18 Op Amp '90DB 2-31 1 

LT119A, Improved LM1 19 '90DB 6-93 

L T123A, Improved LM123 '90DB 4-1 49 

LT137A, Improved LM1 37 '90DB 4-157 

LT137AHV, Improved LM137HV '90DB 4-165 

LT138A, Improved LM1 38 '90DB 4-169 

L T150A, Improved LM150 '90DB 4-1 77 

L TC201A, Micropower, Low Charge Injection, Quad CMOS Analog Switch '92DB 1 1 -4 

L TC202, Micropower, Low Charge Injection, Quad CMOS Analog Switch '92DB 1 1 -4 

L TC203, Micropower, Low Charge Injection, Quad CMOS Analog Switch '92DB 11-4 

LTC221, Micropower, Low Charge Injection, Quad CMOS Analog Switch with Data Latches '92DB 11-15 

LTC222, Micropower, Low Charge Injection, Quad CMOS Analog Switch with Data Latches '92DB 11-15 

LT311A, Improved LM1 1 1 '90DB 6-85 

LT317A, Improved LM1 17 '90DB 4-137 

LT317AHV, Improved LM117HV '90DB 4-145 

L T318A, Improved LM118 0p Amp '90DB 2-31 1 

L T319A, Improved LM1 19 '90DB 6-93 

L T323A, Improved LM123 '90DB 4-1 49 

LT337A, Improved LM137 '90DB 4-157 

LT337AHV, Improved LM137HV '90DB 4-165 



Note: All products in BOLD are in this Databook, others appear in LTC's 1990 and 1992 Databooks ('90DB = LTCs 1990 Databook and '92DB = LTC's 1992 Databook Supplement). 



22 



ALPHANUMERIC INDEX 



LT338A, Improved LM138 '90DB 4-169 

LT350A, Improved LM1 50 '90DB 4-177 

L TC485, Low Power RS485 Interface Transceiver '920B 5-6 

LTC486, Quad Low Power RS485 Driver '92DB 5-16 

L TC487, Quad Low Power RS485 Driver '92DB 5-24 

LTC488, Quad RS485 Line Receiver 5-158 

LTC489, Quad RS485 Line Receiver 5-158 

L TC490, Low Power RS485 Interface Transceiver '92DB 5-32 

L TC491, Low Power RS485 Interface Transceiver '92DB 5-40 

LT574A, Complete 12-Bit A/D Converter 6-205 

LT580, Precision Reference '90DB 3-121 

LT581, Precision Reference '90DB 3-121 

LT685, High Speed Comparator '90DB 6-5 

L TC690, Microprocessor Supervisory Circuit '92DB 9-4 

LTC691. Microprocessor Supervisory Circuit '92DB 9-4 

LTC692, Microprocessor Supervisory Circuit 9-4 

LTC693, Microprocessor Supervisory Circuit 9-4 

LTC694, Microprocessor Supervisory Circuit '92DB 9-4 

LTCB94-3.3, 3.3V Microprocessor Supervisory Circuit 9-19 

LTC695, Microprocessor Supervisory Circuit '92DB 9-4 

LTC695-3.3, 3.3V Microprocessor Supervisory Circuit 9-19 

L TC699, Microprocessor Supervisory Circuit '92DB 9-18 

L T1001, Precision Op Amp '90DB 2-11 

LT1001CS8, Precision Op Amp '90DB 2-23 

L T1002, Dual, Matched Precision Op Amp '90DB 2-25 

L T1003, 5 Volt, 5 Amp Voltage Regulator '900B 4-9 

L T1004, Micropower Voltage Reference '90DB 3-17 

L T1004CS8-1.2, Micropower Voltage Reference '90DB 3-25 

L T1004CS8-2.5, Micropower Voltage Reference '90DB 3-25 

L T1005, Logic Controlled Regulator '90DB 4-1 7 

L T1006, Precision, Single Supply Op Amp '90DB 2-41 

L T1006S8, Precision, Single Supply Op Amp '90DB 2-53 

LT1007, Low Noise, High Speed Precision Op Amp '90DB 2-57 

L T1007CS, Low Noise, High Speed Precision Op Amp '90DB 2-69 

L T1007CS8, Low Noise, High Speed Precision Operational Amplifier '92DB 2-16 

L T1008, Picoamp Input Current, Microvolt Offset, Low Noise Op Amp '90DB 2-73 

LT1009 Series, 2.5 Volt Reference '90DB 3-27 

LT1009S8, 2.5 Volt Reference '90DB 3-31 

L T1010, Fast ±150mA Power Buffer '90DB 2-85 

LT1011, Voltage Comparator '90DB 6-9 

L T1012, Picoamp Input Current, Microvolt Offset, Low Noise Op Amp '90DB 2-1 05 

L T1012S8, Picoamp Input Current, Microvolt Offset, Low Noise Op Amp '90DB 2-117 

LT1013,Dual Precision Operational Amplifier '92DB 2-19 

L T1014, Quad Precision Operational Amplifier '92DB 2-19 

L T1015, High Speed Dual Line Receiver '92DB 1 0-4 



Note: All products in BOLD are in this Databook, others appear in LTC's 1990 and 1992 Databooks ('90DB = LTC's 1990 Databook and '92DB = LTC's 1992 Databook Supplement). 



23 



L T1016, Ultra Fast Precision Comparator '90DB 6-25 

LT1016CS8, Ultra Fast Precision Comparator '90DB 6-41 

£77077, Micropower Dual Comparator • > > ■ 10-4 

L 7101 8, Micropower Dual Comparator 10-4 

LT1019, 2.5V, 4.5V, 5.0V, 10.0V, Precision References '90DB 3-33 

LT1020, Micropower Regulator and Comparator '90DB 4-29 

LT1020CS, Micropower Regulator and Comparator '90DB 4-45 

171021, 5.0V, 7.0V, 10.0V, Precision References '90DB 3-41 

L71021DCS8, 5.0V, 7.0V, 10.0V, Precision References '90DB 3-57 

L71022, Highspeed, Precision JFE7 Input Op Amp '90DB 2-145 

L71024, Dual, Matched Picoampere, Microvolt Input, Low Noise Op Amp '90DB 2-153 

L 71025, Micropower 7hermocouple Cold Junction Compensator '90DB 1 1 -7 

L 71026, Voltage Converter '90DB 5-3 

L71027, Precision 5V Reference '92DB 7-6 

L71028, Ultra-Low Noise Precision High Speed Op Amp 2-12 

L71029, 5V Bandgap Reference '90DB 3-61 

L71030, Quad Low Power Line Driver '90DB 10-5 

L71030CS, Quad Low Power Line Driver '90DB 10-9 

L71031, Precision 10V Reference '90DB 3-65 

L 71032, Quad Low Power Line Driver '90DB 1 0-1 1 

L 71033, 3A Negative Adjustable Regulator '90DB 4-49 

L71034-1.2, Micropower Dual Reference 7-5 

171034-2.5, Micropower Dual Reference 7-5 

L 71035, Logic Controlled Regulator '90DB 4-57 

L 71036, Logic Controlled Regulator '90DB 4-69 

L71037 Low Noise, High Speed Precision Op Amp '90DB 2-57 

L 71037CS, Low Noise, High Speed Precision Op Amp '90DB 2-69 

L 7W37CS8, Low Noise, High Speed Precision Operational Amplifier '92DB 2-16 

L 71038, 10 Amp Positive Adjustable Voltage Regulator '90DB 4-77 

L 71039, RS232 Driver/Receiver with Shutdown '90DB 1 0-1 9 

L7C1040, Dual Micropower Comparator '90DB 6-57 

L7C1041, BANG-BANG Controller '90DB 6-69 

L7C1042, Window Comparator '90DB 6-77 

L 7C1043, Dual Precision Instrumentation Switched Capacitor Building Block '90DB 11-15 

L 7C1043CS, Dual Precision Instrumentation Switched Capacitor Building Block '90DB 11-31 

L 7C1044, Switched Capacitor Voltage Converter '90DB 5-9 

L7C1044A, 12V CMOS Voltage Converter 4-16 

L 7C1044CS8, Switched Capacitor Voltage Converter '90DB 5-21 

L 7C1045, Programmable Micropower Hex 7ranslator/Receiver/Driver '90DB 1 0-27 

L 7C1046, 50mA Switched Capacitor Voltage Converter '92DB 4-1 6 

L7C1047, Dual Micropower Zero Drift Operational Amplifier with Internal Capacitors '92DB 2-292 

L 7C1049, Low Power Zero Drift Operational Amplifier with Internal Capacitors '92DB 2-299 

L 7C1050, Precision Zero Drift Op Amp with Internal Capacitors '90DB 2-1 81 

L7C105 1, Dual Precision Zero Drift Operational Amplifier with Internal Capacitors '92DB 2-306 

L 7C1052, Zero Drift Op Amp '90DB 2-1 97 



Note: All products in BOLD are in this Databook, others appear in LTC's 1990 and 1992 Databooks ('90DB = LTC's 1990 Databook and '92DB = LTC's 1992 Databook Supplement). 



24 



ALPHANUMERIC INDEX 



LTC1052CS, Zero Drift Op Amp '90DB 2-21 7 

L TC1053, Quad Precision Zero Drift Operational Amplifier with Internal Capacitors '92DB 2-306 

LT1054, SwitchedCapacitor Voltage Converter with Regulator 4-26 

LT1055, Precision, High Speed, JFET Input Op Amp '90DB 2-21 9 

LT1055S8, Precision, High Speed, JFET Input Op Amp '90DB 2-231 

L T1056, Precision, High Speed, JFET Input Op Amp '90DB 2-21 9 

LT1056S8, Precision, High Speed, JFET Input Op Amp '90DB 2-231 

LT1057, Dual JFET Input Precision, High Speed Op Amp '90DB 2-235 

L T1057IS, Dual JFET Input Precision High Speed Op Amp '92DB 2-41 

LT1057IS8, Dual JFET Input Precision High Speed Op Amp '92DB 2-44 

L T1057S, Dual JFET Input Precision High Speed Op Amp '92DB 2-41 

L T1057S8, Dual JFET Input Precision High Speed Op Amp '92DB 2-44 

L T1058, Quad JFET Input Precision, High Speed Op Amp '90DB 2-235 

LT1058IS, Quad JFET Input Precision High Speed Op Amp '92DB 2-41 

LT1058S, Quad JFET Input Precision High Speed Op Amp '92DB 2-41 

LTC1059, High Peformance Switched Capacitor Universal Filter '90DB 7-3 

LTC1059CS, High Performance Switched Capacitor Universal Filter '90DB 7-1 1 

L TC1060, Universal Dual Filter Building Block '90DB 7-1 5 

LTC1060CS, Universal Dual Filter Building Block '90DB 7-35 

LTC1061, High Performance Triple Universal Filter Building Block '90DB 7-39 

LTC1061CS, High Performance Triple Universal Filter Building Block '90DB 7-55 

LTC1062, 5th Order Lowpass Filter 8-5 

LTC1063, DC Accurate, Clock-Tunable 5th Order Buttemorth Lowpass Filter 8-16 

L TC1064, Low Noise, Fast, Quad Universal Filter Building Block '90DB 7-73 

LTC1064-1, Low Noise, 8th Order, Clock Sweepable Elliptic Lowpass Filter '90DB 7-89 

/ TC1 064-2, Low Noise, High Frequency, 8th Order Butterworth Lowpass Filter '92DB 8-5 

LTC1064-3, Low Noise, High Frequency, 8th Order Linear Phase Lowpass Filter '92DB 8-1 3 

LTC1064-4, Low Noise, 8th Order, Clock Sweepable Cauer Lowpass Filter '92DB 8-21 

LTC1064-7, Linear Phase, 8th Order Lowpass Filter 8-28 

LTC1065, DC Accurate, Clock-Tunable Linear Phase 5th Order Bessel Lowpass Filter 8-39 

LTC1 066-1, 14-Bit DC Accurate Clock-Tunable, 8th Order Elliptic or Linear Phase Lowpass Filter 8-51 

L T1070, 5A High Efficiency Switching Regulator '90DB 5-37 

L T1071, 2.5A High Efficiency Switching Regulator '90DB 5-37 

LT1072, 1.25A High Efficiency Switching Regulator 4-232 

L T1073, Micropower DC-DC Converter Adjustable and Fixed 5V, 12V '92DB 4-1 74 

LT1074, Step-Down Switching Regulator 4-243 

LT1076, Step-Down Switching Regulator 4-243 

L T1 076-5, 5V Step-Down Switching Regulator '92DB 4-208 

LT1077, Micropower, Single Supply, Precision Operational Amplifier '92DB 2-45 

LT1078, Micropower, Dual, Single Supply, Precision Operational Amplifier '92DB 2-56 

LT1079, Micropower, Quad, Single Supply, Precision Operational Amplifier '92DB 2-56 

L T1080, Advanced Low Power 5V RS232 Dual Driver/Receiver '90DB 1 0-43 

L T1080CS, 5V Powered RS232 Driver/Receiver with Shutdown '90DB 1 0-51 

L T1081, Advanced Low Power 5V RS232 Dual Driver/Receiver '90DB 1 0-43 

L T1081CS, 5V Powered RS232 Driver/Receiver with Shutdown '90DB 1 0-51 



Note: All products in BOLD are in this Databook, others appear in LTC's 1990 and 1992 Databooks ('90DB = LTC's 1990 Databook and '920B = LTC's 1992 Databook Supplement). 



XT 



25 



ALPHANUMERIC INDEX 



LT1082, 1A High Voltage, High Efficiency Switching Voltage Regulator 4-257 

LT1083, 7.5A Low Dropout Positive Adjustable Regulator 4-48 

LT1083, 7.5A Low Dropout Positive Fixed Output Regulator 4-61 

LT1084, SA Low Dropout Positive Adjustable Regulator 4-48 

L T1084, 5 A Low Dropout Positive Fixed Output Regulator 4-61 

LT1085, 3A Low Dropout Positive Adjustable Regulator 4-48 

LT1085, 3A Low Dropout Positive Fixed Output Regulator 4-61 

LT1 086 Series, 1.5A Low Dropout Positive 2.85V, 3.3V, 3.6V, 5V, 12V and Adjustable Regulators 4-72 

LT1087, Adjustable Low Dropout Regulator with Kelvin-Sense Inputs '92DB 4-56 

L T1088, Wideband RMS-DC Converter Building Block '90DB 1 1 -33 

L T1089, High Side Switch '90DB 1 1 -45 

LTC1090, Single Chip 10-Bit Data Acquisition System '90DB 9-5 

LTC1091, 1-Channel, 10-Bit Serial I/O Data Acquisition System '90DB 9-29 

LTC1092, 2-Channel, 10-Bit Serial I/O Data Acquisition System '90DB 9-29 

LTC1093, 6-Channel, 10-Bit Serial I/O Data Acquisition System '90DB 9-29 

LTC1094, 8-Channel, 10-Bit Serial I/O Data Acquisition System '90DB 9-29 

L TC1095, Complete 10-Bit Data Acquisition System with On Board Reference '90DB 9-57 

LTC1096, Micropower Sampling 8-Bit Serial I/O A/D Converter 6-8 

L T1097, Low Cost, Low Power Precision Operational Amplifier '92DB 2-74 

LTC1098, Micropower Sampling 8-Bit Serial I/O A/D Converter 6-8 

LTC1099, High Speed 8-Bit A/D Converter with Built-in Sample-and-Hold '90DB 9-81 

LTC1 100, Precision, Zero Drift Instrumentation Amplifier '92DB 3-4 

LT1101, Precision, Micropower, Single Supply Instrumentation Amplifier (Fixed Gain = 10 or 100) '92DB 3-11 

LT1102, High Speed, Precision, JFET Input Instrumentation Amplifier (Fixed Gain = 10 or 100) '92DB 3-23 

LT1103, Offline Switching Regulator 4-267 

LT1105, Offline Switching Regulator 4-267 

LT1106, Micropower Step-Up DC/DC Converter for PCMCIA Card Flash Memory 13-3 

LT1107, Micropower DC/DC Converter Adjustable and Fixed 5V, 12V 4-294 

L T1 108, Micropower DC/DC Converter Adjustable and Fixed 5V,12V 4-386 

i T1 109, Micropower Low Cost DC/DC Converter Adjustable and Fixed 5V, 12V 4-31 8 

LT1109A, Micropower DC/DC Converter Flash Memory VPP Generator Adjustable and Fixed 5V, 12V 4-325 

LT1110, Micropower DC-DC Converter Adjustable and Fixed 5V, 12V, High Frequency '92DB 4-245 

LT1111, Micropower DC/DC Converter Adjustable and Fixed 5V, 12V 4-331 

LT1112, Dual Low Power Precision, Picoamp Input Op Amp 2-29 

LT1113, Dual Low Noise, Precision, JFET Input Op Amps 2-40 

LT1114, Quad Low Power Precision, Picoamp Input Op Amp 2-29 

LT1115, Ultra-Low Noise, Low Distortion, Audio Operational Amplifier '92DB 2-82 

LT1116, 12ns, Single Supply Ground-Sensing Comparator '92DB 10-7 

LT1117, 800mA Low Dropout Positive Regulator Adjustable and Fixed 2.85V, 3.3V, 5V 4-85 

LT1120, Micropower Regulator with Comparator and Shutdown 4-96 

LT1120A, Micropower Regulator with Comparator and Shutdown 4-107 

LT1121, Micropower Low Dropout Regulator with Shutdown 4-114 

LT1121-3.3, Micropower Low Dropout Regulator with Shutdown 4-114 

L 11 121-5, Micropower Low Dropout Regulator with Shutdown 4-114 

LT1122, Fast Settling, JFET Input Operational Amplifier 2-84 

Note: All products in BOLD are in this Databook, others appear in LTC's 1990 and 1992 Databooks ('90DB = LTC's 1990 Databook and '92DB = LTC's 1992 Databook Supplement). 

26 xry 



ALPHANUMERIC INDEX 



LT1123, 5V Low Dropout Regulator Driver '92DB 4-75 

LT1 124, Dual Low Noise, High Speed Precision Operational Amplifier '92DB 2-94 

LT1125, Quad Low Noise, High Speed Precision Operational Amplifier '92DB 2-94 

LT1126, Dual Decompensated Low Noise, High Speed Precision Operational Amplifier '92DB 2-105 

LT1127, Quad Decompensated Low Noise, High Speed Precision Operational Amplifier '92DB 2-105 

LT1128, Unity Gain Stable Ultra-Low Noise Precision High Speed Op Amp 2-12 

L T1 129, Micropower Low Dropout Regulator with Shutdown 4-1 25 

LT1129-3.3, Micropower Low Dropout Regulator with Shutdown 4-125 

LT1129-5, Micropower Low Dropout Regulator with Shutdown 4-125 

LT1130, 5-Driver/5-Receiver RS232 Transceiver Refer to LT1130A 

LT1130A, Advanced 5-Driver/5-Receiver RS232 Transceiver 5-10 

LT1 131, 5-Driver/4-Receiver RS232 Transceiver with Shutdown Refer to LT1 1 31 A 

LT1131A, Advanced 5-Driver/4-Receiver RS232 Transceiver with Shutdown 5-10 

LT1132, 5-Driver/3-Receiver RS232 Transceiver Refer to LT1132A 

LT1132A, Advanced 5-Driver/3-Receiver RS232 Transceiver 5-10 

LT1133, 3-Driver/5-Receiver RS232 Transceiver Refer to LT1133A 

LT1133A, Advanced 3-Driver/5-Receiver RS232 Transceiver 5-10 

LT1134, 4-Driver/4-Receiver RS232 Transceiver Refer to LT1134A 

LT1134A, Advanced 4-Driver/4-Receiver RS232 Transceiver 5-10 

LT1135, 5-Driver/3-Receiver RS232 Transceiver without Charge Pump Refer to LT1135A 

L T1 135A, Advanced 5-Driver/3-Receiver RS232 Transceiver without Charge Pump 5-10 

LT1136, 4-Driver/5-Receiver RS232 Transceiver with Shutdown Refer to LT1136A 

L T1136A, Advanced 4-Driver/5-Receiver RS232 Transceiver with Shutdown 5-10 

LT1137, 3-Driver/5-Receiver RS232 Transceiver with Shutdown Refer to LT1137A 

LT1137A, Advanced 3-Driver/5-Receiver Low Power 5V RS232 Transceiver with Small Capacitors 5-20 

LT1138, 5-Driver/3-Receiver RS232 Transceiver with Shutdown Refer to LT1138A 

LT1138A, Advanced 5-Driver/3-Receiver RS232 Transceiver with Shutdown 5-10 

L T1 139, 4-Driver/4-Receiver RS232 Transceiver with Shutdown Refer to LT1 1 39A 

LT1139A, Advanced 4-Driver/4-Receiver RS232 Transceiver with Shutdown 5-10 

LT1140, 5-Driver/3-Receiver RS232 Transceiver without Charge Pump Refer to LT1140A 

LT1140A, Advanced 5-Driver/3-Receiver RS232 Transceiver without Charge Pump 5-10 

LT1141, 3-Driver/5-Receiver RS232 Transceiver without Charge Pump Refer to LT1141A 

LT1141A, Advanced 3-Driver/5-Receiver RS232 Transceiver without Charge Pump 5-10 

L TC1142, Dual High Efficiency Synchronous Step-Down Switching Regulator 4-346 

LTC1142-ADJ, Dual High Efficiency Synchronous Step-Down Switching Regulator 4-346 

L TC1 143, Dual High Efficiency Step-Down Switching Regulator Controller 4-365 

LTC1144, Switched-Capacitor Wide Input Range Voltage Converter with Shutdown 4-38 

LTC1145, Low Power Digital Isolater 5-186 

LTC114B, Low Power Digital Isolater 5-186 

LTC11 47-3.3, High Efficiency Step-Down Switching Regulator Controller 4-380 

LTC1147-5, High Efficiency Step-Down Switching Regulator Controller 4-380 

LTC1148, High Efficiency Synchronous Step-Down Switching Regulator 4-395 

LTC1148-3.3, High Efficiency Synchronous Step-Down Switching Regulator 4-395 

L TC1148-5, High Efficiency Synchronous Step-Down Switching Regulator 4-395 

LTC1149, High Efficiency Synchronous Step-Down Switching Regulator 4-414 

Note: All products in BOLD are in this Dalabook, others appear in LTC's 1990 and 1992 Databooks ('90PB = LTC's 1990 Databook and '92DB = LTC's 1992 Databook Supplement). 



ALPHANUMERIC INDEX 



LTC1149-3.3, High Efficiency Synchronous Step-Down Switching Regulator 4-414 

LTC1149-5, High Efficiency Synchronous Step-Down Switching Regulator 4-414 

L TC1 150, MSV Zero Drift Operational Amplifier with Internal Capacitors '92DB 2-321 

LTC1151, Dual ±15V Zero-Drift Operational Amplifier 2-356 

LTC1152, Rail-to-Rail Input Rail-to-Rail Output Zero-Drift Op Amp 13-7 

LTC1 153, Auto-Reset Electronic Circuit Breaker 4-1 38 

LTC1154, High-Side Micropower MOSFET Driver 4-152 

L TC1155, Dual High Side Micropower N-Channel MOSFET Driver with Internal Charge Pump '92DB 4-26 

LTC1156, Quad High Side Micropower N-Channel MOSFET Driver with Internal Charge Pump '92DB 4-41 

L TC1 157, 3.3V Dual Micropower High-Side/LowSide MOSFET Driver 4-1 67 

L T1 158, Half Bridge N-Channel Power MOSFET Driver '92DB 4-1 02 

LTC1159, High Efficiency Synchronous Step-Down Switching Regulator 13-11 

LTC1159-3.3, High Efficiency Synchronous Step-Down Switching Regulator 13-11 

LTC1 159-5, High Efficiency Synchronous Step-Down Switching Regulator 13-11 

LT1161, Quad Protected High-Side MOSFET Driver 4-175 

LTC1163, Triple 1.8V to BV High-Side MOSFET Driver 4-186 

LTC1 164, Low Power, Low Noise, Quad Universal Filter Building Block '92DB 8-29 

LTC11B4-5, Low Power 8th Order Pin Selectable Butterworth or Bessel Lowpass Filter 8-67 

L TC1 164-6, Low Power 8th Order Pin Selectable Elliptic or Linear Phase Lowpass Filter 8-78 

LTC1164-7, LowPower, Linear Phase 8th Order Lowpass Filter 8-89 

LTC1165, Triple 1.8V to 6V High-Side MOSFET Driver 4-186 

LT1169, Dual Low Noise, Picoampere Bias Current, JFET Input Op Amp 2-55 

LT1170, 100kHz, 5A High Efficiency Switching Regulator 4-433 

LT1171, 100kHz, 2.5A High Efficiency Switching Regulator 4-433 

LT1172, 100kHz, 1 .25A High Efficiency Switching Regulator 4-433 

LT1173, Micropower DC-DC Converter Adjustable and Fixed 5V, 12V '92DB 4-275 

LTC1174, High Efficiency Step-Down and Inverting DC/DC Converter 4-447 

LTC1174-3.3, High Efficiency Step-Down and Inverting DC/DC Converter 4-447 

LTC1174-5, High Efficiency Step-Down and Inverting DC/DC Converter 4-447 

LT1176, Step-Down Switching Regulator 4-462 

LT1176-5, Step-Down Switching Regulator 4-462 

LT1178, 17pA Max, Dual, Single Supply, Precision Operational Amplifier '92DB 2-112 

LT1178S8, 20/uA Max, Dual SO-8 Package, Single Supply Precision Op Amp 2-67 

LT1179, 17^A Max, Quad, Single Supply, Precision Operational Amplifier '92DB 2-112 

L T1 180, Advanced Low Power 5V RS232 Dual Driver/Receiver with Small Capacitors Refer to LT1 1 80A 

L T1 180A, Low Power 5V RS232 Dual Driver/Receiver with 0. 1^iF Capacitors 5-27 

L T1 181, Advanced Low Power 5V RS232 Dual Driver/Receiver with Small Capacitors Refer to LT1 1 81 A 

L T1 181 A, Low Power 5V RS232 Dual Driver/Receiver with 0. 1fjF Capacitors 5-27 

LT1182, CCFULCD Contrast Dual Switching Regulator 13-27 

LT1183, CCFL/LCD Contrast Dual Switching Regulator 13-27 

LT1 185, Low Dropout Regulator with Adjustable Current Limit '92DB 4-86 

LT1187, LowPower Video Difference Amplifier 2-92 

LT1 188, 1.5A High Side Switch '92DB 4-48 

LT1189, Low Power Video Difference Amplifier 2-104 

LT1190, Ultra High Speed Operational Amplifier (Av > 1) '92DB 2-126 



Note: All products in BOLD are in this Databook, others appear in LTC's 1990 and 1992 Dalabooks ('90DB = LTC's 1990 Databook and '92DB = LTC's 1992 Databook Supplement). 



28 



xrunas 



ALPHANUMERIC INDEX 



LT1191, Ultra High Speed Operational Amplifier (Av > 1) '92DB 2-137 

LTim. Ultra High Speed Operational Amplifier (Av> 5) '92DB 2-148 

L T1 193, Video Difference Amplifier, Adjustable Gain '92DB 2-1 59 

LT1194, Video Difference Amplifier, Gain of 10 '92DB 2-171 

LT1195, Low Power, High Speed Operational Amplifier 2-116 

LTC1196, 8-Bit, SO-8, WSPS ADCs with Auto-Shutdown Options ■ 6-32 

LTC1198, 8-Bit, SO-8, 750ksps ADCs with Auto-Shutdown Options 6-32 

111200, Low Power High Speed Operational Amplifier '92DB 2-182 

LT1201, Dual 1mA, 12MHz, 50V/us Op Amp 2-127 

1X1202, Quad 1mA, 12MHz, 50V/ps Op Amp 2-127 

LT1203, 150MHz Video Multiplexer 2-374 

L 11201, 4-lnput Video Multiplexer with 75MHz Current Feedback Amplifier 2-389 

L11205, 150MHz Video Multiplexer 2-374 

L11206, 250mA/60MHz Current Feedback Amplifier 2-137 

L11208, Dual 45MHz, 400V/ps Op Amp 2-150 

L 11209, Quad 45MHz, 400V/us Op Amp 2-1 50 

L11211, 14MHz, 7V/ps, Single Supply Dual Precision Op Amp 2-160 

L11212, 14MHz, 7V/ps, Single Supply Quad Precision Op Amp 2-160 

L 11213, 28MHz, 12Vlps, Single Supply Dual Precision Op Amp 2-176 

L11214, 28MHz, 12V lys, Single Supply Quad Precision Op Amp 2-176 

L11215, 23MHz, 50V/ps, Single Supply Dual Precision Op Amp 2-192 

LT1216, 23MHz, 50V/ys, Single Supply Quad Precision Op Amp 2-192 

L11217, Low Power High Speed Current Feedback Amplifier '92DB 2-190 

L11220, Very High Speed Operational Amplifier (Av > 1) '92DB 2-198 

L11221, Very High Speed Operational Amplifier (Av > 4) '92DB 2-210 

L 11222, Low Noise, Very High Speed Operational Amplifier (Av> 10) '92DB 2-218 

L11223, 100MHz Current Feedback Amplifier '92DB 2-226 

L11224, Very High Speed Operational Amplifier (Av > 1) '92DB 2-237 

L11225, Very High Speed Operational Amplifier (Av > 5) '92DB 2-245 

L 11226, Low Noise Very High Speed Operational Amplifier (Av> 25) '92DB 2-253 

L11227, 140MHz Video Current Feedback Amplifier 2-208 

L 11228, 100MHz Current Feedback Amplifier with DC Gain Control '92DB 2-261 

L 11229, Dual 100MHz Current Feedback Amplifier '92DB 2-280 

L 11230, Quad 100MHz Current Feedback Amplifier '92DB 2-280 

L 1C1232, Microprocessor Supervisory Circuit '92DB 9-22 

L1C1235, Microprocessor Supervisory Circuit with Conditional Battery Backup '92DB 9-29 

L11237, 5VRS232 Iransceiver with Advanced Power Management and One Receiver Active in SHUIOOWN 5-34 

L11241, High Speed Current Mode Pulse Width Modulator '92DB 4-122 

L11242, High Speed Current Mode Pulse Width Modulator '92DB 4-1 22 

L 11243, High Speed Current Mode Pulse Width Modulator '92DB 4-1 22 

L 11244, High Speed Current Mode Pulse Width Modulator '92DB 4-1 22 

L 11245, High Speed Current Mode Pulse Width Modulator '92DB 4-1 22 

L 11246, 1MHz Off-Line Current Mode PWM '92DB 4-1 34 

L11248, Power Factor Controller 4-194 



Note: All products in BOLD are in this Databook, others appear in LTC's 1990 and 1992 Databooks ('90DB = LTC's 1990 Databookand '92DB = LTC's 1992 Databopk Su pplement). 

29 



ALPHANUMERIC INDEX 



LT1249, Power Factor Controller 4-205 

LTC1250, Very Low Noise Zero-Drift Bridge Amplifier 2-364 

LT1251, 40MHz Video Fader 2-219 

LT1252, Low Cost Video Amplifier 2-242 

LT1253, Low Cost Dual Video Amplifier 2-249 

LT1254, Low Cost Quad Video Amplifier 2-249 

LTC1255, Dual 24V High-Side MOSFET Driver 4-215 

LT125B, 40MHz DC Gain Controlled Amplifier 2-219 

L TC1257, Complete Single Supply 12-Bit Voltage Output D AC in SO -8 6-210 

L T1259, Low Cost Dual 130MHz Current Feedback Amplifier with Shutdown 2-256 

LT1260, Low Cost Triple 130MHz Current Feedback Amplifier with Shutdown 2-256 

LTC1262, 12V, 30mA Inductor less Flash Memory Programming Supply 13-35 

LTC12B4, High Speed, Quad Universal Filter Building Block 8-100 

LTC12B4-7, LinearPhase, Group Delay Equalized, 8th Order Lowpass Filter 8-115 

LT12B8, 7. 5 A, 150kHz Switching Regulator 4-466 

LT1268B, 7.5A, 150kHz Switching Regulator 4-466 

LT12B9, 4A High Efficiency Switching Regulator 4-474 

LT1270, 8A High Efficiency Switching Regulator 4-470 

LT1270A, 10A High Efficiency Switching Regulator 4-470 

LT1271, 4A High Efficiency Switching Regulator 4-474 

L TC1272, 12-Bit, 3ps, 250kHz Sampling A/D Converter '92DB 6-6 

LTC1273, 12-Bit, 300ksps Sampling A/D Converter with Reference 6-58 

LTC1275, 12-Bit, 300ksps Sampling A/D Converter with Reference 6-58 

LTC1276, 12-Bit, 300ksps Sampling A/D Converter with Reference 6-58 

LTC1278, 12-Bit, 500ksps Samplng A/D Converter with Shutdown 6-80 

LT1280, Advanced Low Power 51/ RS232 Dual Driver/Receiver Refer to LT1 280A 

LT1280A, Low Power 5VRS232 Dual Driver/Receiver with 0. 1fjF Capacitors 5-41 

LT1281, Advanced Low Power 5V RS232 Dual Driver/Receiver Refer to LT1281A 

LT1281A, Low Power 5VRS232 Dual Driver/Receiver with 0. 1pF Capacitors 5-41 

LTC1282, 3V UOksps 12-Bit Sampling A/D Converter with Reference 6-95 

LTC1283, 3V Single Chip 10-Bit Data Acquisition System 6-117 

LTC1285, 3V Micropower 12-Bit A/D Converter in SO-8 Package 13-39 

LTC1286, Micropower Sampling 12-Bit A/D Converter in SO-8 Package 6-140 

LTC1287, 3V Single Chip 12-Bit Data Acquisition System '92DB 6-25 

LTC1288, 3V Micropower 12-Bit A/D Converter in SO-8 Package 13-39 

L TC1289, 3V Single Chip 12-Bit Data Acquisition System '92DB 6-40 

LTC1290, Single Chip 12-Bit Data Acquisition System '92DB 6-67 

LTC1291, Single Chip 12-Bit Data Acquisition System 6-163 

LTC1292, Single Chip 12-Bit Data Acquisition System 6-182 

L TC1293, Single Chip 12-Bit Data Acquisition System '92DB 6-1 1 3 

L TC1294, Single Chip 12-Bit Data Acquisition System '92DB 6-1 1 3 

L TC1296, Single Chip 12-Bit Data Acquisition System '92DB 6-1 1 3 

LTC1297, Single Chip 12-Bit Data Acquisition System 6-182 

L TC1298, Micropower Sampling 12-Bit A/D Converter in SO-8 Package 6-1 40 



Note: All products in BOLD are in this Databook, others appear in LTC's 1990 and 1992 Databooks 



. LTC's 1990 



Databook and 



'92DB = LTC's 1992 Databook Supplement). 



30 



ALPHANUMERIC INDEX 



LT1300, Micropower High Efficiency 3.3/5V Step-Up DC/DC Converter 4-478 

LT1301, Micropower High Efficiency 5V12V Step-Up DC/DC Converter with Flash Memory 4-486 

L T1302, Micropower High Output Current Step-Up Adjustable and Fixed 5V DC/DC Converter 1 3-47 

L T1302-5, Micropower High Output Current Step-Up Adjustable and Fixed 5V DC/DC Converter 1 3-47 

LT1303, Micropower High Efficiency DC/DC Converter with Low-Battery Detector Adjustable and Fixed 5V 13-51 

L T1 303-5, Micropower High Efficiency DC/DC Converter with Low-Battery Detector Adjustable and Fixed 5V 1 3-51 

L T1309, 500kHz Micropower DC/DC Converter for Flash Memory 1 3-55 

LT1312, Single PCMCIA VPP Driver/Regulator 13-59 

LT1313, Dual PCMCIA VPP Driver/Regulator 13-71 

LTC1318, Single 5V RS232/RS422/AppleTalk® Transceiver 13-79 

LTC1320, AppleTalk® Transceiver • . 5-178 

LTC1321, 2-EIA562/RS232 Transceivers/2-RS485 Transceivers 5-198 

LTC1322, 4-EIA562/RS232 Transceivers/2-RS485 Transceivers 5-198 

LTC1323, Single 5V AppleTalk® Transceiver 13-85 

LTC1325, Microprocessor-Controlled Battery Charger 13-94 

LTC1327, 3.3V Micropower EIA/TIA-562 Transceiver 5-48 

LT1330, 5VRS232 Transceiver with 3V Logic Interface and One Receiver Active in SHUTDOWN 5-54 

LT1331, 3VRS232or5V/3VRS232 Transceiver with One Receiver Active in SHUTDOWN 5-61 

LT1332, Wide Supply Range Low Power RS232 Transceiver with 12V VPP Output for Flash Memory 5-68 

LTC1335, 4-EIA562 Transceivers/2-RS485 Transceivers withOE 5-198 

LTC1337, 5V Low Power RS232 3-Driver/5-Receiver Transceiver 5-76 

LTC1338, 5V Low Power RS232 5-Driver/3-Receiver Transceiver 5-82 

LT1341, 5VRS232 Transceiver with One Receiver Active in SHUTDOWN 5-88 

LT1342, 5V RS232 Transceiver with 3V Logic Interface 5-95 

L TC1347, 5V Low Power RS232 3-Driver/5-Receiver Transceiver with 5 Receivers Active in SHUTDOWN 5-102 

LTC1348, 3.3V Low Power RS232 3-Driver/5-Receiver Transceiver 13-116 

L TC1349, 5V Low Power RS232 3-Driver/5-Receiver Transceiver with 2 Receivers Active in SHUTDOWN 5-1 08 

LTC1350, 3.3V Low Power EIA/TIA-562 3-Driver/5-Receiver Transceiver 5-114 

LT1354, 12MHz, 400V/psOpAmp 2-267 

LT1355, Dual 12MHz, 400V/ t is Op Amp 2-278 

LT135B, Quad 12MHz, 400V /ps Op Amp 2-278 

LT1357, 25MHz, 600V/ps Op Amp 2-289 

LT1358, Dual 25MHz, BOOV/us Op Amp 2-300 

LT1359, Quad 25MHz, 600V /ys Op Amp 2-300 

LT13B0, 50MHz, 800V/ps Op Amp 2-311 

LT1361, Dual 50MHz, 800V ..s Op Amp 2-322 

LT1362, Quad 50MHz, 800V/us Op Amp 2-322 

LT13B3, 70MHz, 1000V//JS Op Amp 2-333 

LT13B4, Dual 70MHz, WOOV/ps Op Amp 2-344 

LT13B5, Quad 70MHz, 1000V//jsOpAmp 2-344 

LT1372, 500kHz High Efficiency 1.5A Step-Up Switching Regulator 13-120 

LT1376, 1.5A, 500kHz Step-Down Switching Regulator 13-121 

L T1381, Low Power 5V RS232 Dual Driver/Receiver with 0. 1/jF Capacitors 5-120 

L TC1382, 5V Low Power RS232 Transceiver with Shutdown 5-1 27 



Note: All products in BOLD are in this Databook, others appear in LTC's 1990 and 1992 Oatabooks ('MOB = LTC's 1990 Dalabook and '92DB = LTC's 1992 Databook Supplement). 



31 



ALPHANUMERIC INDEX 



LTC1383, 5V Low Power RS232 Transceiver 5-133 

L TC1384, 5V Low Power RS232 Transceiver with 2 Receivers Active in SHUTDOWN 5-139 

LTC1385, 3.3V Low Power EIA/TIA-562 Transceiver 5-145 

LTC1386, 3.3V Low Power EIA/TIA-562 Transceiver 5-151 

L T1413, Single Supply, Dual Precision Op Amp 2-68 

LT1431, Programmable Reference '92DB 7-1 3 

LT1432, 5VHigh Efficiency Step-Down Switching Regulator Controller '92DB 4-145 

LT14S7, Dual, Precision JFET Input Op Amp 2-76 

LTC1481, Ultra-Low Power RS485 Transceiver with Shutdown 13-122 

LTC1483, Ultra-Low Power RS485 Low EMI Transceiver with Shutdown 13-129 

LTC1485, Differential BusTransceiver 5-166 

LT1524, Regulating Pulse Width Modulator '90DB 5-85 

L T1525A, Regulating Pulse Width Modulator j '90DB 5-97 

LT1526, Regulating Pulse Width Modulator '90DB 5-105 

L T1527A, Regulating Pulse Width Modulator '90DB 5-97 

LT1585, 4A Low Dropout Fast Response Positive Regulator Adjustable and Fixed Outputs 13-136 

LT1846, Current Mode PWM Controller '90DB 5-1 1 3 

I T1847, Current Mode PWM Controller '90DB 5-1 1 3 

L T3524, Regulating Pulse Width Modulator '90DB 5-85 

L T3525A, Regulating Pulse Width Modulator '90D B 5-97 

L T3526, Regulating Pulse Width Modulator '90DB 5-1 05 

L T3527A, Regulating Pulse Width Modulator '90DB 5-97 

L T3846, Current Mode PWM Controller '90DB 5-1 1 3 

L T3847, Current Mode PWM Controller '90DB 5-1 1 3 

L TC7652, Chopper Stabilized Op Amp '90DB 2-1 97 

L TC7660, Switched Capacitor Voltage Converter '90DB 5-9 

LTK001, Thermocouple Cold Junction Compensator and Matched Amplifier '90DB 11-3 

L TZ1000, Ultra Precision Reference '90DB 3-9 

L TZ1000A, Ultra Precision Reference '90DB 3-9 

OP-05, Internally Compensated Op Amp '90DB 2-321 

OP-07, Precision Op Amp '90DB 2-329 

OP-07CS8, Precision Op Amp '90DB 2-337 

OP-15, Precision, High Speed JFET Input Op Amp '90DB 2-341 

OP-16, Precision, High Speed JFET Input Op Amp '90DB 2-341 

OP-27, Low Noise, Precision Op Amp '90DB 2-345 

OP-37, Low Noise, High Speed Op Amp '90DB 2-345 

OP-215, Dual Precision JFET Input Op Amp '90DB 2-275 

OP-227, Dual Matched, Low Noise Op Amp "90DB 2-357 

OP-237, Dual High Speed, Low Noise Op Amp '90DB 2-357 

OP-270, Dual Low Noise, Precision Operational Amplifier '92DB 2-120 

OP-470, Quad Low Noise, Precision Operational Amplifier '92DB 2-120 

REF-01 , Precision Voltage Reference '90DB 3-1 25 

REF-02, Precision Voltage Reference '90DB 3-1 25 

SG1524, Regulating Pulse Width Modulator '90DB 5-85 



Note: All 



32 



products in BOLD are in this Databook, others appear in LTC's 1990 and 1992 Databooks ('90DB = LTC's 1990 Databook and '920B = LTC's 1992 Databook Supplement). 



ALPHANUMERIC INDEX 



SG1525A, Regulating Pulse Width Modulator '90DB 5-97 

SG1527A, Regulating Pulse Width Modulator '90DB 5-97 

SG3524, Regulating Pulse Width Modulator '90DB 5-85 

SG3524S, Regulating Pulse Width Modulator '90DB 5-93 

SG3525A, Regulating Pulse Width Modulator '90DB 5-97 

SG3527A, Regulating Pulse Width Modulator '90DB 5-97 



Note: All products in BOLD are in this Databook, others appear in LTC's 1990 and 1992 Dalabooks ('90DB = LTC's 1990 Databook and '92DB = LTC's 1992 Databook Supplement). 



33 



NOTES 



— 



XTUJ39S 



S€CTIOn 1— G€H€RflL 

inFORmnnon 



1-1 



TECHNOLOGY 



INDEX 



SECTION 1— GENERAL INFORMATION 

INDEX 1-2 

GENERAL ORDERING INFORMATION 1-3 

ALTERNATE SOURCE CROSS REFERENCE GUIDE 1-4 



XTUJSSg 



LinCAB. 



GENERAL ORDERING 
INFORMATION 



TECHNOLOGY 



ii 



in 



I. ORDER ENTRY 

Orders for products contained herein should be directed to: LINEAR TECHNOLOGY CORPORATION, 
1630 McCarthy Boulevard, Milpitas, California 95035. Phone: 408-432-1900. 

ORDERING INFORMATION 

Minimum order value is $2000.00 per order; minimum value per line item is $1000.00. 
Each item must be ordered using the complete part number exactly as listed on the data sheet. 
F.O.B.: Milpitas, California. 
RELIABILITY PROGRAMS 
Linear Technology Corporation currently offers the following Reliability Programs: 

A. JAN QPL devices. 

B. DESC drawings. 

C. MIL-STD-883, Level B, latest revision for all military temperature range devices. 

D. "R-Flow" Burn-In Program for commercial temperature range devices. Consult Factory regarding burn-in program. 

E. Radiation Hardened (RH) products. 

IV. PART NUMBER EXPLANATION 

XXX XXXX X X J/883B 

I Screening to MIL-STD-883, Level B, latest revision 

Package Style (see Cross Reference on Page 14-3) 



V. PACKAGE SUFFIX EXPLANATION 
Letter 

Designator Description 

D8 8-Lead Side Brazed Hermetic DIP 

D 1 4, 1 6, 1 8, 20, and 24-Lead Side 
Brazed Hermetic DIP 

F 20-Lead Molded TSSOP 

G 20, 28-Lead Molded SSOP 

H Multi-Lead Metal Can 

J8 8-Lead Ceramic DIP 

J 14, 16, 18, and 20-Lead Ceramic DIP 

K TO-3 Metal Can (Steel) 

M 3-Lead DD package Molded 

N8 8-Lead Molded DIP 

N 14, 16, 18, 20, 24, and 28-Lead Molded DIP 

P 3-Lead TO-3P Molded 

Q 5-Lead DD package Molded 

R 7-Lead DD package Molded 



- Temperature Range 

M for Military 

I for Industrial 

C for Commercial 

X for 200°C Extended Range* 

- Letter indicates electrical grade of part 
■ Generic or Product Part Number 

- Designator 

LF, LM, OP, REF, and SG are second source devices 

LT are improved or proprietary devices 

LTC indicates proprietary CMOS devices 

RH indicates LTC's radiation hardened devices 



Letter 

Designator Description 

S8 8-Lead Small Outline (SO) package (Note 1) 
S 14, 16, 18, 20, 24, and 28-Lead Small 

Outline (SO) package (Note 1 , 2) 
SOT-223 Molded 
3 and 5-Lead TO-220 Molded 
10-Lead Flatpack (Cerpak) 
7-Lead TO-220 t 
3-Lead TO-92 I 



ST 
T 
W 
Y 
Z 



Note 1 : Pinout and electrical specifications may differ from standard 

commercial grade N8 package. See SO data sheet for specific 
information. 

Note 2: These devices are delivered in either 150 MIL (SO) or 300 MIL 

(SO-L) wide packages depending on device die size. See specific 
SO data sheet for pin counts and package dimensions. 




1-3 



LinCAB. 

TECHNOLOGY 



ALTERNATE SOURCE CROSS 
REFERENCE GUIDE 



P/N 


1 TP niRFfT RFPI 

LIU UmLul ntiL 


P/N 


LTC DIRECT REPL 

LIU UII1LV 1 1 ILI l_ 


P/N 


LTC DIRECT RFPL 

Liu uinti/i ncru 


P/N 

r/n 


LTC DIRECT REPL 


AD101A 


LM101A 


ADC0820 


LTC1099* 




LM118A" 


LM108A 


LM108A 


AD232 


LT1081* 


ADC0832 


LTC1098* 


HA2515 


LT318A" 




LT1008M" 


AD235 


LT1130A" 


ADC08061 


LTC1198" 




LM318" 


lMf.11 


LM111 


AD237 


LT1138A" 


ADC08231 


LTC1196 


HA2520 


LT1220 




LT111A* 


AD238 


LT1139A" 


ADC1031 


LTC1091" 


HA2541 


LT1220 




LT1011M* 


AD239 


LT1137A" 


ADC1034 


LTC1093" 


HA2544 


LT1224 


LM112 


LT1012M* 


AD241 


LT1137A" 


ADC1038 


LTC1094" 


HA5004 


LT1223 


LM113 


LT1004M-1.2* 


AD381 


LT1022" 


ADG201 A 


LTC201A 


HA5130-2 


OP07A 


LM117 


LM117 


AD510 


LT1001* 


ADG202 


LTC202 




LT1001AM* 




LT117A* 


AD517 


LT1001" 


ADG221 


LTC221 


HA5130-5 


OP07E 


LM117HV 


LM117HV 


AD518 


LM118" 


ADG222 


LTC222 




LT1001C* 




LT117AHV* 




LT118A" 


ADOP07 


OP07 


HA5135-2 


OP07 


LM118 


LM118 


AD524 


LT1101" 




LT1001* 




LT1001M* 




LT1 1 8A* 


AD536 


LT1088" 


ADOP27 


OP27 


HA5135-5 


OP07C 


LM119 


LM119 


AD580 


LT580 




LT1007* 




LT1001C* 




LT119A" 


AD581 


LT581 


ADS7800 


LTC 1276** 


HAOP07 


OP07 


LM123 


LM123 




LT1 031" 


ADS7803 


LTC1293" 




LT1001M* 




LT123A* 


AD586 


LT1027' 


ADS7804 


LTC1 272-8" 


HAOP07A 


OP07A 




LT1 003M* 


AD589 


LT1034" 


CLC406 


LT1227" 




LT1001AM* 


LM124 


LT1014M* 


AD636 


LT1088" 


CLC414 


LT1252 


HAOP07C 


OP07C 


LM129A 


LM129A 


AD637 


LT1088" 


CLC415 


LT1230 




LT1001C* 


LM129B 


LM129B 


AD642 


LT1057" 


CLC430 


LT1206" 


HAOP07E 


OP07E 


LM129C 


LM129C 


AD647 


LT1057" 


CLC520 


LT1228" 




LT1001C* 


LM133 


LT1 033M" 


AD704 


LT1114* 


CLC532 


LT1203** 


HI5810 


LTC1272-8 


LM134 


LM134 


AD705 


LT1097 


CMP01 


LT1011** 


ICL232 


LT1081 


LM 134-3 


LM 134-3 


AD706 


LT1112* 


CMP02 


LT1011" 


ICL7650 


LTC1050* 


LM134-6 


LM 134-6 


AD707 


LT1097 


DAC8512 


LTC1257" 




LTC1052" 


LM136-2.5 


LT1 36-2.5 


AD711 


LT1056" 


DG201 A 


LTC201 


ICL7652 


LTC7652 




LT1009M* 


AD712 


LT1057" 


DG202 


LTC202 




LTC1052' 


LM136-5 


LT1029M" 


AD713 


LT1058" 


DS1232 


LTC1232 


ICL7660 


LTC 1044* 


LM136A 


LM136A 


AD736 


LT1088" 


DS14C335 


LT1331" 




LTC1054" 




LT1009M* 


AD737 


LT1088" 


□S3695 


LTC485* 


ICL7662 


LTC1144* 


LM137 


LM137 


AD743 


LT1113* 


EL2020 


LT1223* 


ICL8069C 


LM385-1 .2 




LT1 37 A 


AD744 


LT1122 


EL2028 


LT1220 




LT1004C-1.2* 




LT1 033M" 


AD790 


LT1016" 


EL2029 


LT1221 


ICL8069M 


LM 185-1 .2 


LM137HV 


LM137HV 


AD810 


LT1252" 


EL2030 


LT1223 




LT1004M-1.2* 




LT137AHV* 


AD811 


LT1252" 


EL2038 


LT1222 


ISO150 


LTC1145" 


LM138 


LM138 


AD813 


LT1260" 


EL2039 


LT1222 


LF155 


LF155 




LT138A' 


AD817 


LT1360* 


EL2040 


LT1222 




LT1055M* 


LM148 


LT1014M" 


AD818 


LT1363 


EL2041 


LT1220 


LF155A 


LF155A 


LM150 


LM150 


AD821 


LT1006" 


EL2044 


LT1252" 




LT1055AM* 




LT150A' 


AD822 


LT1 1 69* 


EL2045 


LT1363" 


LF156 


LF156 


LM158 


LT1013M* 


AD824 


LT1014" 


EL2082 


LT1228" 




LT1056M* 


LM168BY-5.0 


LT1019M-5'* 


AD826 


LT1361* 


EL2090 


LT1 228** 




LT1022M* 


LM168BY-10.0 


LT1019M-10" 


AD827 


LT1 229" 


EL2099 


LT1206" 


LF156A 


LF156A 


LM185-1.2 


LM 185-1 .2 


AD828 


LT1364* 


EL2120 


LT1191" 




LT1 056AM* 




LT1004M-1.2* 


AD840 


LT1222" 




LT1223" 




LT1 022AM' 


LM1 85-2.5 


LM1 85-2.5 


AD841 


LT1220" 




LT1227"* 


LF198 


LF198 




LT1004M-2.5* 


AD842 


LT1221" 


EL2130 


LT1227** 


LF198A 


LF1 98A 


LM185BX-1 .2 


LT1034BM-1.2* 


AD844 


LT1223" 


EL2210 


LT1361* 


LF355A 


LF355A 


LM185BX-2.5 


LT1034BM-2.5* 


AD845 


LT1122 


EL2211 


LT1 364* 




LT1 055AC* 


LM185BY-1 .2 


LT1 034M-1 .2* 


AD846 


LT1223" 


EL2224 


LT1 229** 


LF356A 


LF356A 


LM185BY-2.5 


LT1034M-2.5* 


AD847 


LT1360 




LT1 208" 




LT1 056AC* 


LM196 


LT1038M" 


AD848 


LT1192" 


EL2232 


LT1229" 




LT1022AC* 


LM199 


LM 1 39 


AD849 


LT1226 


EL2242 


LT1229" 


LF357 


LT1022" 


LM199A 


LM199A 




LT1192 




LT1358* 


LF398 


LF398 


LM199A-20 


LM199A-20 


AD7306 


LT1318" 


EL2244 


LT1361* 


LF398A 


LF398A 


LM234-3 


LM234-3 


AD7572 


LTC 1272** 


EL2245 


LT1364* 


LF400 


LT1122DC 


LM234-6 


LM234-6 


AD7579 


LTC1091" 


EL2260 


LT1229 




LT1122CC 


LM308A 


LM308A 


AD7580 


LTC1092" 


EL2444 


LT1362 


LF400A 


LT1122BC 




LT1008C" 


AD7820 


LTC1099* 


EL2445 


LT1254" 




LT1122AC 


LM311 


LM311 


AD7821 


LTC 1096/ 


EL2460 


LT1230 


LH0002 


LT1010M" 




LT311A* 




LTC1098" 


EL4089 


LT1228" 


LH0044 


LT1001M* 




LT1011C- 


AD7870 


LTC1275" 


EL4393 


LT1260" 


LH0070 


LH0070 


LM318 


LM318 


AD7875 


LTC 1273" 


EL4094/5 


LT1256" 




LT1031M* 




LT318A' 


AD7876 


LTC1276" 


GT4123 


LT1256" 


LH2108 


LH2108 


LM319 


LM319 


AD7883 


LTC 1282" 


GY4102 


LT1203" 


LH2108A 


LH2108A 


LT319A* 


AD7890 


LTC 1290" 


GX4314 


LT1205" 


LM10 


LM10 


LM323 


LM323 


AD7892-1.2 


LTC1278-5" 


HA2500 


LT1220 


LM10B 


LM10B 


LT323A" 


AD7892-3 


LTC1279" 


HA2502 


LT1220 


LM10C 


LM10C 




LT1003C" 


AD9617 


LT1223 


HA2505 


LT1220 


LM101A 


LM101A 


LM329A 


LM329A 


AD9618 


LT1223 


HA2510 


LT1 1 BA- 




LM107 


LM329B 


LM329B 


AD9686 


LT1016" 




LM 118" 


me 


LM108 


LM329C 


LM329C 






HA2512 


LT118A** 




LT1008M* 


LM329D 


LM329D 


* LTC Improved R 


eplacement. 100% Pm-f 











1-4 



XTLffifig 



ALTERNATE SOURCE CROSS REFERENCE GUIDE 



P/N 


1 TP niDCPT DCDI 

L 1 L Ulnto 1 HbrL 


P/M 


I TP niRFf'T RFPI 
Lib uincifi HCrL 


P/M 

r/N 


1 TP niRFTT RFPI 
LIU UlnCbl HCrL 


p/M 


i tp niRFPT RFPI 
liu uincui ncrL 


LM333 


LT1033C* 


MAX400 


LT1001 


MX7572 


LTC1272* 




LT1055C* 


LM333A 


LT1033C 


MAX420 


LTC1150* 


MX7820 


LTC 1099* 


PM356A 


LF356A 


LM334 


LM334 


MAX422 


LTC1 150" 


OPA27 


OP27 




LT1056C* 


LM336-2.5 


LM336 


MAX430 


LTC1 150 




LT1007* 


PM1008 


LT1008 




LT1 009C* 


MAX432 


LTC1 150** 


OPA37 


OP37 


PM1012 


LT1012 


LM336-5 


LT1029C* 


MAX441 


LT1204" 




LT1037* 


PM1558 


LT1013M* 


LM336B-2.5 


LM336B 


MAX454 


LT1204** 


OPA177 


LT1001A 


PM2108 


LH2108 




I T100QC* 


MAX478 


LT1 1 78 




LT1097 


PM2108A 


LH2108A 


LM338 


L fvl GOO 


MAX479 


LT1 1 79 


OPA404 


LT1216" 


REF01 


REF01 




l_ I ooon 


MAX480 


LT1 077* 


OPA603 


LT1252 




LT1019-10* 


LM350 


i MiRn 

Llvl OOU 


MAX481 


LTC1481 


OPA620 


LT1227" 




LT1021-10" 




i T^RfiA* 


MAX485 


LTC485 


OPA1013 


LT1013 


REF02 


REF02 


1 M^fifl-R n 

LIVIOOOO.U 


1 T1 Pi1QAP-R* 

1— 1 IUI &rA\s O 


MAX487 


LTC1487* 




LT121 1 




LT1 019-5* 


i m^pr in n 

LIVIOOO 1 U.U 


LI IUI 3L/ 1 U 


MAYR^fl 

IvIrtADOO 


LTC1257" 


OPA2107 


LT1 169** 




LT1 021-5** 


LMobO I -D.U 


1 T1 OIQiP R* 
L I 1 Ul yAU-D 


MA YR^Q 

PVI/AAOOSJ 


LTC1257** 


0PA21 1 1 


LT1 169** 


REF03 


LT1019-2.5* 


LMJDO T - 1 U.U 


i ti m qp 1 n** 

L I I U I I U 


MAYRRPj 

IVIrtADOU 


LT1 33 1 ** 


OPA2604 


LT1 124** 


REF43 


LT1019A-2.5* 


1 MQQc: 1 o 


I MOOR 1 9 


MAYRR1 

IVIMAQD I 


LTC1327" 


OP04 


LT1 013* 


REF101 


LT1 019-10 




i X-i nn.-iP 1 o* 
L I I UU4(_>-1 


MAYR'Vl 

IVIMAOOU 


LT1 173" 


OP05 


OP05 




LT1 021-10 


LMoeo-^.o 


I kiiooc: o n 
LMoOO-£.0 


MAA0O I 






LT1001 


REF1 02 


I T1 m Q-10 

L 1 IUI \3 1 U 




i ti nnA p o c* 


M A YRRO 
FVIMADOil 


LT1 173-1 2** 


OP07 


OP07 




L I I \Jc. 1' ly 


LMooDbA-1 .d 


i t-i/"\oaqp i o* 
L 1 1 Uo4bO-l .d 


MAAdJJ 






LT1001 


REG1 117 


I T1 1 1 1-0 RR 

L 1 1 1 1 / l.Oj 


LMJobbA-ii.b 


L 1 lUo4bC-£.D 


KA A VCOA 


l~T1 17Q<" 






SG1524 




1 IJIOOCDV 1 O 


L 1 1U040-1 


1 A A VRQC 

MAAbOD 


] 73 5»* 


OP1 1 


LT1014* 




LT1 524* 


LM3o5BY-^.b 


LI lUo4L-- l d.o 


M A VCOC 

MAAbob 


1 T1 -i 7Q -t O" 

L I 1 1 fO-id 


nDio 




Qfl1 RORA 


Qf"i1 COCA 


LM396 


I TinODP" 

L I l UJoL- 


■l J A VCQ7 
MAAboY 




npi a 






LT1 525A* 


LM399 


LM399 


m a vcoo 
MAAOOO 


LT1 173-5 


UHlO 


n 1 r 


Cfli COft 

oo i o^b 




LM399A 


LM399A 


MAAboy 


LTC 1 1 74* 




ITinRR* 


CP 1 C07 A 


l Oil / A 


LMj99A-^0 


I ILAOOrtA Of\ 

LMjyyA-^u 


MAAb4 I 


LT1 1 73-5** 


UP ib 


OP1R 
rrin^fi" 






LM399A-50 


LM399A-50 


MAX642 


I T1 1 70 1 O*" 






0C3 1 558 


L 1 1 U 1 Olvl 


LM1524 


or* 1 coa 


IVlAAb4o 


LT1 173** 


OP27 


np97 








LT1 524* 


MAX654 


LT1 073-5 




LT1007* 




LT3524* 


LM2575 


1 X1 A7C" 


MAX655 




OP37 


OP37 


oUODiiDA 




LMtiD/DiN 


LT1 176 


MAX656 


LT 1 073-5 




i nm7' 




1 T1R0RA* 
L 1 OO^OA 


LM2576 


LT1 074** 


^ilA YftR7 


LT1073" 


P 4 2 


LT1 122* 


OUODiD 


LT3526 


LM2577 


LT1 071 " 


IVIAAbOO 


LT1 1 08-5" 


OP77 


LT1 001 


Qf^^R97A 


Qf;iR07A 


1 Hitonoc; 
LM^yoO 


LT1 005" 


iviAAbDy 


i ti 1 hr r** 




1 T1 ("IQ7* 

li i uy / 




1 T1R07A* 
L I ODil / A 


LM^y4U 


LT1 086** 


N'AYRRn 

iviAAbbU 


LT1054" 


OP97 


LT1 012 


OIN Oiit 


1 TPdRft* 

L 1 t^400 


LM3524 


0000^4 


^JIA YftftO 
MAADbii 


LTC 1262* 




LT1 097* 


QM7R1 ~7A 


LTC487* 




LT3524* 


MAAbb / 


1 T1 19Q" 

l i i 


OP177 


LT1 001 


QM7R1 7R 
O l\ 1 D 1 ID 


1 TPdflR* 
L 1 U403 


LM6181 


LI 1 dd 1 


IVIAAboU 


LT1 026 


OP207 


L l l UU*: 


QM7R1 Qft 
OlN /O I ob 


LT1 1 34** 


1 PlACM Q 


LT1 203" 


^AA Yfion 
iviAAbyu 


LTC690 


\JYiL ID 


OP215 




LTC1 321 * 


LMbobl 


LT1 195" 


MAX691 


LTC691 




1 T1 riR7 
LI 1 UD/ 


cpono 
oroUii 


L I Kj i odd 




LT1 1 1 7-5" 


iviAAbyi^ 


LTC692* 


OP220 


LT1 078* 


TL431 A 


L I I 40 I 


LP2951 


LT1 121 " 


MAYfiQQ 

iviAAbyo 


l i obyo 




LT1 013* 


ti rcc/n 


I TP 1 QQfi 

l i \j i idyb 


(iAyoi / d 


LTC486 


h A A YRQ/l 

iviAAby4 




OP227 


OP227 


TSC04 


i ti nnA 1 9 

L I I UU4-1 .£ 


■ ■ AOCi "7d 

(iAyoi / 4 


!~Tp!iflR 


MAYRQC 

n/IAADyo 


1 TPftQR 


OP270 


OP270 


TSC05 


i ti nr\A o r 

L I I UU4-<i.D 


n AQftl 7ft 




iviAADyy 


1 TPRQQ 




LT1 124* 


TSC1 70 


LT3846" 




LT1 278 5" 


MA Y741 n 
(VlAA/4 I U 


LTC1 147"* 


OP290 


LT1 078" 


TSC1 71 


LT3847" 


I1AY1 OO 

MAA1 


1 "TP 1 17S" 
L 1 \j\dlX3 


MA A / 4 I U 


LT1 171" 




LT1 112* 


TSC232 


LT1080" 


MAX1 53 


i tpi i no" 
L I \j\ \ yo 






OP400 


LT1014* 






MAX1 62 


LTC1 273* 


MAX756 


i ti om k** 

L I 1 oUo-D 






TSC91 1 


L 1 L.1UOU 


IV1M A 1 DO 


LTC1 273* 


T^IA Y7R7 
IVI A / Of 






LT1 079* 


i ouy i o 




MAYIfid 


LTC 1275* 


MAYA7T 

IVI MAO / O 


1 T1H1Q-9 R 

l_ I IUI 


OP421 


LT1 014* 




1 TP1DR1 * 
L 1 U I UD 1 


MAY1 RR 

IvIftA I DO 


I Tn 1 QR** 
L I L>l i y 


MA YR7R 
IVIrtAO/ O 


I T1 ma R 
i_ i iui y o 


OP467 








M AY1 R7 
IVIttA I O/ 










OrM70 9 




P TP1 ncT 
L I L> 1 Uoo 


MAX 172 


LTC 1272* 




LT1027 5 




LT1125* 


TSC918 


LTC7652" 


MAX202 


LT1 381* 


MAX876 


LT1019-10 


OP490 


LT1079" 


TSC962 


LTC1046" 


MAX207 


LT1138A" 




LT1021-10 


OP497 


LT1114* 


TSC7650 


LTC 1050* 


MAX211 


LTC 1337" 


MAX 1232 


LTC 1232 


PM108 


LM108 


TSC7652 


LTC7652 


MAX212 


LTC1348" 


MAX9686 


LT1016 




LT1008M* 




LTC 1052 


MAX220 


LT1281A" 


MC78T05 


LM323T 


PM108A 


LM108A 


TSC7660 


LTC1044 - 


MAX222 


LT1280A* 




LT323AT" 




LT1008M* 


TSC9491 


LT1004-1.2 


MAX223 


LT1237 


MC1400AU2 


LT1019CN8-2.5" 


PM155 


LF155 


TSC9495 


REF02 


MAX232A 


LT1281A* 


MC1400AU5 


LT1019CN8-5" 




LT1055M* 




LT1019M-5 


MAX235A 


LT1 1 30A" 


MC1400AU10 


LT1019CN8-10" 


PM155A 


LF1 55A 




LT1021-5" 


MAX237A 


LT1 1 38A" 


MC1400U2 


LT1019CN8-2.5* 




LT1055M* 


TSC9496 


REF01 


MAX238A 


LT1139A*" 


MC1400U5 


LT1019CN8-5* 


PM156 


LF156 




LT1021-10" 


MAX239A 


LT1 1 37A" 


MC1400U10 


LT1019CN8-10* 




LT1056M* 


UC117 


LM117 


MAX241 A 


LT1 1 36A" 


MC1558 


LT1013M* 


PM156A 


LF156A 




LT117A* 




LT1 1 37A" 


MC 145406 


LT1039-16* 




LT1056M* 


UC137 


LM137 


MAX242 


LTC1384* 


MC34166 


LT1074 


PM308A 


LM308A 




LT137A* 


MAX280 


LTC1062 


MF5 


LTC 1059* 




LT1008C* 




LT1033M" 


MAX281 


LTC 1 065" 


MF10 


LTC 1060 
LTC 1060* 


PM355A 


LF355A 


UC150 


LM150 
LT150A- 



•LTC Improved Replacement: 100% Pin-for-pin compatible with better electrical specificalions. 
" Similar Device: Please consult the data sheet to determine the suitability of the replacement for specific applications. 



1-5 



ALTERNATE SOURCE CROSS REFERENCE GUIDE 



P/N 


LTC DIRECT REPL 


UC317 


LM317 




LT317A* 


UC337 


LM337 




LT337A* 




LT1033C*" 


UC350 


LM350 




LT350A* 


UC1524 


SG1524 




LT1524* 


UC1525A 


SG1525A 




LT1525A* 


UC1527A 


SG1527A 




LT1527A - 


UC1846 


LT1846 


UC1847 


LT1847 


UC2525A 


SG3525A 




LT3525A" 


UC3524 


SG3524 




LT3524 - 


UC3S27A 


SG3527A 




LT3527A* 


UC3842 


LT1242* 


UC3843 


LT1243* 


UC3844 


LT1244* 


UC3845 


LT1245* 


UC3854 


LT1248* 



LTC DIRECT REPL 



P/N 



LTC DIRECT REPL 



P/N 



LTC DIRECT REPL 
















































•LTC Improved 



100%Pin-for-pinc 
consult the data sheet lod 



1-6 



S€CTIOn 2— nmPLIFI€RS 



2-1 



TECHNOLOGY 



INDEX 



SECTION 2— AMPLIFIERS 

INDEX 2-2 

SELECTION GUIDES 2-3 

PROPRIETARY PRODUCTS 

PRECISION OPERATIONAL AMPLIFIERS 2-11 

LT1028/LT1128, Ultra Low Noise Precision High Speed Op Amps 2-12 

LT1112/LT1114, Dual/Quad Low Power Precision, Picoamp Input Op Amps 2-29 

LT1113, Dual Low Noise, Precision, JFET Input Op Amps 2-40 

LT1169, Dual Low Noise, Picoampere Bias Current, JFET Input Op Amp 2-55 

LT1178S8, 20/jA Max, Dual SO-8 Package, Single Supply Precision Op Amp 2-67 

LT1413, Single Supply, Dual Precision Op Amp 2-68 

LT1457, Dual, Precision JFET Input Op Amp 2-76 

HIGHSPEED AMPLIFIERS 2-83 

LT1122, Fast Settling, JFET Input Operational Amplifier 2-84 

LT1187, Low Power Video Difference Amplifier 2-92 

LT1189, Low Power Video Difference Amplifier 2-104 

LT1195, Low Power, High Speed Operational Amplifier 2-116 

LT1201/LT1202, Dual and Quad 1mA, 12MHz, 50V/ps Op Amps 2-127 

LT120B, 250mA/80MHz Current Feedback Amplifier 2-137 

L T120BA T1209, Dual and Quad 45MHz, 400V /us Op Amps 2-150 

LT1211AT1212, 14MHz, 7V/\js, Single Supply Dual and Quad Precision Op Amps 2-160 

LT1213AT1214, 28MHz, 12V/ps, Single Supply Dual and Quad Precision Op Amps 2-176 

LT1215AT121B, 23MHz, 50V/ps, Single Supply Dual and Quad Precision Op Amps 2-192 

LT1227, 140MHz Video Current Feedback Amplifier 2-208 

LT1251AT125B, 40MHz Video Fader and DC Gain Controlled Amplifier 2-219 

LT1252, Low Cost Video Amplifier 2-242 

L T1253A T12S4, Low Cost Dual and Quad Video Amplifiers 2-249 

L T1259A T12B0, Low Cost Dual and Triple 130MHz Current Feedback Amplifiers with Shutdown 2-256 

LT1354, 12MHz, 400V//JS Op Amp 2-267 

L T1355A T135B, Dual and Quad 12MHz, 400V/ps Op Amps 2-278 

LT1357, 25MHz, 600V/us Op Amp 2-289 

LT1358AT1359, Dual and Quad 25MHz. 600V s Op Amps 2-300 

LT13B0, 50MHz, 800V/ f is Op Amp 2-311 

LT13B1AT13B2, Dual and Quad 50MHz, 800V/us Op Amps 2-322 

LT1363, 70MHz, 1QOOV/\is Op Amp 2-333 

LT1364AT13B5, Dual and Quad 70MHz, 1000V Ips Op Amps 2-344 

ZERO DRIFT OPERATIONAL AMPLIFIERS 2-355 

LTC1151, Dual +15V Zero-Drift Operational Amplifier 2-356 

LTC1152, Rail-to-Rail Input Rail-to-Rail Output Zero-Drift Op Amp 13-7 

LTC1250, Very Low Noise Zero-Drift Bridge Amplifier 2-364 

MULTIPLEXERS 2-373 

LT1203AT1205, 150MHz Video Multiplexers 2-374 

LT1204, 4-lnpul Video Multiplexer with 75MHz Current Feedback Amplifier 2-389 



OP AMPS 



- Low Power 



Precision -r Dual Supply 



Low Vos 



- | Zero Drift"] 



Low Ib 



- Zero Drift 



LTC1047 (0. 10u,V) 
LTC1049 (S. 10uV) 
LTC1050(S.5uV) 
LTC1051 (D, 5 M V) 
LTC1052 (S,5u.V) 
LTC1053 (Q.5U.V) 
LTC1150 (S, 5(iV) 
LTC1151 (D, 5uV) 
LTC1152 (S, 10nV) 
LTC1250 (S, 10fiV) 



L Bipolar 



Low Noise 



Large Avol 



LTC1047 
LTC1049 
LTC1050 
LTC1051 
LTC1052 
LTC1053 
LTC1150 
LTC11S1 
LTC1152 



(D, 50pA) 
- 50pA) 
(S, 30pA) 
(0, 50pA) 
(S, 30pA) 
(0. 50pA) 
(S. 100pA) 
(D, 100pA) 
(S, 100pA) 



LT1007 (S, 3.8nVM5) 
LT1028 (S.1.1nVNHz) 
LT1037 (S. 3.8nV/VH2) 
LT1113 (D. 6nV/v'Hzl_ 



LT1115(S.1.1nV/VHz) 
iV/VHi) 

LT1125 (Q. 4.2nWv'Hz) 



LT1124(D. 4.2nVM 



LT1126(D. 4 2nVA'H|) 
LT1127(Q,4.2riWvHz) 
LT1128(S. 1.1nV/VHi) 



Bipolar 



LT1001 (S,25pV) 
LT1002 (D. 60u.V) 
LT1006 (S,50uV) 
LT1007 (S.25pV) 
LT1008(S. 120uV) 
LT1012 (S. 25uV) 
LT1024(D,50uV) 
LT1028(S. 40uV) 



LT1 077 (S,40pV) 
LT1 078 (S,40nV) 
LT1079 (Q,70uA/) 
LT1097 (S,50|iV) 
LT1112 (D, 60(iV) 
LT1114(Q, 60pV) 
LT1124(D,70uA/) 
LT1125(Q, 100uV) 
LT1413(0,60p.V) 



LT1008 (S, 100pA) 
LT1012 (S, 100pA) 
LT1022 (S, 50pA) 
LT1024 (D, 120pA) 
LT1055 (S,50pA) 
LT1056 (S, 50pA) 
LT1057 (0. 50pA) 
LT1058(0.50pA) 



LT1097 (S. 
LT1112 (D. 
LT1113 (D. 
LT1114 (0. 
LT1122 (S. 
LT1169 (S. 
LT1457(D. 



250pA) 
180pA) 
320pA) 
180pA) 
75pA) 
20pA) 
75pA) 



Single Supply 



Single or Dual 
Supplies 



Low Vos 
Low Power 



Low Vos 
Micropower 



LT1006 (S, 520p.A) LT1078 (0, 100pA) 

LT1013 (D. 1mA) LT1079 (Q. 200j.iA) 

IT1014 (0, 2mA) LT1 178 (0, 36pA) 

LTC1047(S,55uA) LT1 179 (Q, 72uA) 

LTC1049 (S, 300pA) LT141 3 {D. 330|iA) 
LT1077 (S,60uA) 



- Low Power 



Wide Bandwidth 



LT1006 (S. 50uV, 520u.A) 
LT1013 (D, 150uV.1mA) 
LT1014 (0. 180|iV. 2mA) 
LTC1049 (S, 10pV. 300mA) 
LT1112 (D, 60p.V, 800U.A) 
LT1114 (0. 60u,V, 1 ,6mA) 
LTC1152 (S. 10(iV. 1.2mA) 
LT1413 (D, 280uV. 0.9uA) 



LTC1047 (0, 10uV. 55pA) 
LT1077(S,40u.V.60pA) 
LT1078 (D, 70uV, 100u.A) 
LT1079 (Q, 100uV, 200pA) 
LT1178 (D. 70U.V, 36pA) 
LT1179 (Q. 100pV, 72jiA) 



Fast Slew Rate 
Fast Settling 



Video 



Non-Video 



LT1122 (S, 
LT1187 (S, 
LT1189 (S. 
LT1190(S, 
LT1191 (S. 
LT1192(S, 
LT1193 (S. 
LT1194 (S, 
LT1195 (S, 
LT1200 (S, 
LT1201 (0, 
LT1202 (0, 
LT1 204 (S, 
LT1206(S, 
LT1208 (D, 
LT1209 (Q, 
LT1215 (D, 
LT1216(0. 
LT1220(S, 
LT1221 (S, 
LT1222 (S, 
LT1223(S, 



80V/U.!) 

165VAB) 

165V/U.S) 

450V/ps) 

450V/ps) 

450%!) 

500Wu,i) 

500%!) 

165V/tis) 

50%i) 

50%s) 

50V/U.S) 

1000%!)' 

900V/U!)* 

400%s) 

400%!) 

50V/|is) 

50%s) 

250Wp!) 

250%!) 

200Wui) 

lOOOV/ui)" 



LT1224(S, 
LT1225 (S, 
LT1226 (S. 
LT1227(S. 
LT1229(D, 
LT1230(Q. 
LT1252 (S. 
LT1253 (D, 
LT1 254 (0. 
LT1354 (S. 
LT135S (D 
LT1356 (Q 
LT1357 (S, 
LT1358 (D. 
LT1359 (0. 
LT1360 (S, 
LT1361 (D, 
LT1362 (0, 
LT1363 (S. 
LT1364 (D. 
LT1365(Q. 



400V/U!) 

400Wu!) 

400V/U!) 

1100%!) 

1000%!)* 

1000%!)' 

250V/M!) - 

250V/U!)* 

250U/HS) • 

400V/U.S) 

400V/U,!) 

400%!) 

600V/U.S) 

600%s) 

600%s) 

800V/U!) 

800%s) 

800%!) 

1000%!) 

1000Wpi) 

iooov/pi) 



LT1187 (S, 
LT1189 (S, 
LT1190(S. 
LT1191 (S. 
LT1192 (S. 
LT1193 <S, 
LT1194 <S. 
LT1195 (S, 
LT1204 (S 
LT1206 (S. 
LT1223 (S, 
LT1227 (S. 
LT1229 (D. 



50MHz) 

35MHz) 

50MHz) 

90MHz) 

40MHz) 

70MHz) 

40MHz) 

50MHz) 

70MHz)* 

60MHz)* 

100MHz)' 

140MHz)' 

100MHz)' 



LT1230 (0, 100MHz)* 
LT1252(S, 100MHz)* 
LT1253 (D, 90MHz)* 
LT1254 (0,90MHz)* 
LT1259 (D. 130MHz)* 
LT1260(T. 130MHz)* 
LT1360(S,50MHZ) 
LT1361 (0,50MHz) 
LT1 362 (Q. 50MHz) 
LT1363 (S, 70MHz) 
LT1 364(0, 70MHz) 
LT1365 (Q. 70MHz) 




Instrumentation 






















Micropower 




Zero Drift 




High Speed 



LT1006(S, 1M) 
LT1007 (S, 7M) 
LT1012 (S, 300k) 
LT1013 (D, 1.5M) 
LT1014 (Q. 1.5M) 
LT1028 (S, 7M) 
LT1037(S, 7M) 
LTC1049 (S.3M) 
LTC1050 (S, 3M) 
LTC1051 (D, 1M) 
LTC1052(S. 3M) 
LTC1053 (Q. 1M) 
LT1077(S, 1M) 
LT1078(D, 1M) 



Low Vos 
High Speed 



LT1211 (D,150pV, 14MHz) 
LT1212 (0, 275pV, 14MHz) 
LT1213 {D, 150uV, 28MHz) 
U1214(Q.275u.V,28MHz) 
LT1215 (D, 300[iV, 23MHz) 
LT1216(Q, 450|iV, 23MHz) 



Low Power 



LT1200 (S, 1mA, 10MHz) 
LT1201 (D, 1mA, 11MHz) 
LT1202(Q, 1mA. 11MHz) 
LT1217 (S. 1mA. 10MHz)* 
LT1354 (S, 1mA. 12MHz) 
LT1355 (D, 1mA. 12MHz) 
LT1356 (Q, 1mA, 12MHz) 



LT1079IQ. 1M) 
LT1097(S,700k) 
LT1112(D.5M) 
LT1113 (D. 1.2M) 
LT1114 (Q. 5M) 
LT11 15 (S. 7M) 
LT1124 (D, 5M) 
LT1125 (0. 5M) 
LT1126(D. 5M) 
LT1127 (D. 5M) 
LT1128 (S, 7M) 
LTC1152 (S, 3M) 
LT1169 (0, 1.2M) 
LT1413 {D. 1 5M) 



■Current feedback amplifier 



HIGH SPEED AMPLIFIERS 



HIGH SPEED 







Instrumentation and Data Acquisition 

■ Fast DAC Amplifiers ■ RADAR 

■ Signal Processing ■ Fiber-Optic Systems 

■ RF Amplification ■ Copiers/Laser Printers 




Color, B/W Video and Multimedia 

■ Frame Grabbers ■ Video Gain Blocks 

■ Video Cable Drivers ■ Building Security 

■ Video MUXs ■ Image Recognition 

■ Cable Tappers ■ Video Keyer/Fader 


Lowest Offsets. T Fastest Slew Rate, 


1 

Dual Supplies, T ±5V, or Single 5V 



Single Supply, DC Precision 

■ Low V os with High Bandwidth/Slew Rate 
(150uVMax,A-Grades) 

■ Single Supply 3.3V, 5V or Dual +15V 
Operation 

■ Low Power (1 .3mA/Amp): LT1211/12 

■ Fast Settling to 0.01%, 250ns, 2V Step: 
LT1215/16 

■ SO-8 (Duals) and 0.150" SO-16 (Quads) 





BW 


SR 


Vos 


$ 




(Typ) 


(Typ) 


(Max) 


(100's) 




MHz 


Wus 


uV 




LT1211 (D) 


14 


7 


150/275 


3.40 


LT1212 (Q) 


14 


7 


275 


6.10 


LT1213 (D) 


28 


12 


150/275 


3.40 


LT1214 (Q) 


28 


12 


275 


6.10 


LT1215 (D) 


23 


50 


300/450 


4.10 


LT1216 (Q) 


23 


50 


450 


7.40 





BW 


Vos 


Av 


$ 




(Typ) 


(Max) 


(Min) 


(100's) 




MHz 


mV 


V/V 




LT1220 


45 


1 


1 


3.85 


LT1221 


37 


1 


4 


3.85 


LT1222 


50 


1 


10 


3.85 


LT1225 


30 


1 


5 


2.85 


LT1226 


40 


1 


25 


2.85 



Voltage Feedback Op Amps 

■ 90ns Settling Time to 0.1%: LT1220, 
LT1226. 

■ 1 mV Max V os , 300nA Max l B : LT1 220/1/2 
i 12-Bit Accurate: LT1220/1/2. 
1 10-Bit Accurate: LT1 225/6 



NEW AMPLIFIER ARCHITECTURE! 

Voltage Feedback Op Amps with 
Current Feedback Speed 

■ Low Supply Current/Amplifier (1mA): LT1355/6 

■ Very High Slew Rate (1000V/us): LT1363 

■ Low V os (0.6mV Maximum): LT1 358/9 

■ Low Power (6mA/Amplifier for 1 OOOV/us Slew Rate) 

. Fast Settling (80ns to 0.01%, 50ns to 0.1%, 10V Step) 

BW SR Is/Amp $(100's) 
MHz V/hs (mA) (Dual Amp) 



Single Dual Quad 



LT1354 LT1355 LT1356 12 400 1 3.95 

LT1357 LT1358 LT1359 25 600 2 4.10 

LT1360 LT1361 LT1362 50 800 4 3.50 

LT1363 LT1364 LT1365 70 1000 6 3.80 



(D) = Dual, (Q) = Quad 



Current Feedback Amps 

■ Bandwidth Independent of Gain 

■ "Shutdown" Feature: LT1217, LT1223, 
LT1227. 

■ Single Supply Operation/Best for Video: 
LT1227, LT1229, LT1230. 

■ 12-Bit Accurate: LT1223 

■ Low Power (l s =lmA): LT1217 

■ Lowest Cost: LT1 252/3/4 

■ Operates on ±2V to ±15V Supplies* 

* LT1223 & LT1217 Min Supply Voltage = ±5V 

BW SR if^ $ 

(Typ) (Typ) (Max) (100's) 

MHz V/us mV 

LT1227 140 
LT1223 100 
LT1229(D) 100 
LT1230 (Q) 100 
LT1217 10 
LT1252 100 
LT1 253 (D) 90 

LT1254 ' Q » 90 



1100 


10 


2.45 


1300 


3 


2.85 


1000 


10 


3.95 


1000 


10 


7.25 


500 


3 


3.25 


250 


15 


1.75 


250 


15 


2.49 


250 


15 


4.49 



Low Cost Video Op Amps 

■ Specified Operation with ±5V and Single 
5V Supplies 

■ Color Video Performance 

■ "Shutdown" Feature: LT1 190/1/2 

■ Directly Drives Cables: 50mA Iqut 

■ 450V/us Slew Rate 

■ Low Power: LT1 195 





BW 


SR 


Av 


$ 




(Typ) 


(Typ) 


(Min) 


(100's 




MHz 


V/us 


V/V 




LT1190 


50 


450 


1 


1.65 


LT1191 


90 


450 


1 


1.65 


LT1192 


350 


450 


5 


1.65 


LT1195 


50 


165 


1 


1.65 



2-4 



VIDEO AND MULTIMEDIA PRODUCTS 



Video Products 

In addition to high speed amplifiers, LTC offers 



Low Cost Dual/Triple 130MHz 
CFAs with Shutdown 

■ LT1 260: Triple CFA for RGB Video, $4.49 

■ LT1259: Dual CFA with Shutdown, $3.95 

■ 90MHz Bandwidth on ±5V 

• 0.1dB Gain Flatness, 30MHz: Good for HDTV 

■ 1600V/us Slew Rate 

■ ±2V to ±15V Supply Range 

■ 1 00ns/40ns Turn On/Off Times 

■ Makes 2 or 3 Input MUX Amp 

■ Low Supply Current (5nWAmp) 

■ Narrow SOIC Packages 



the following products tailored to video, multim edia and computer graphics applications 
Video Distribution Amplifier 

■ LT1206: 250mA Minimum Output Current 

■ 60MHz, 900V/us Current Feedback Amplifier 

■ Drives 10 Video Cables 

■ Drives Low Impedance of High Capacitances 

■ Color Video Performance 

■ Low Current "Shutdown" Mode Available 
. 8-Pin P DIP ($3.45), 7-Lead DD ($4.45), 

and 7-Lead TO-220 ($4.45) 
. 8-Pin SOIC ($3.95) 



4:1 Video Multiplexer with 

LT1204: 4:1 MUX w/ Current Feedback Amp 
0.1 dB Gain Flatness to >30MHz: for HDTV 
1000V/usSlew Rate 
75MHz, -3dB Bandwidth (A v = 2) 
90dB Channel Separation 



■ 16-Pin SOL and P DIP 
. PDIP $4.95, SOL $5.40 



— ' 



+5V Video Difference < 


Imps 


■ 50dBCMRR@ 10MHz 




■ Input Voltage Range: (-2.5V to 3.5V) 


■ ±4V Output Voltage Swing 




■ Color Video Performance 




■ "Shutdown" Feature 




• Can Directly Drive Cables 




■ 500V/ps Slew Rate: LT1193/LT1194 


. Low Power: LT1187/LT1 189 




A v BW 


* 


(Min) (Typ) 


(100's) 


Gain WV MHz 




LT1187 Adj. 2 50 


2.95 


LT1189 Adj. 10 35 


2.95 


LT1193 Adj. 2 70 


2.95 


LT1194 10 - 350 


2.95 



2:1 and 4:1 Video Multiplexers 
Very Fast for Pixel Switching 

• LT1203 (2:1), LT1205 (2x2:1 or 4:1) 

■ 1 50MHz, -3dB Bandwidth 

• 90dB Channel Separation 

■ 30MHz, 0.1dB Gain Flatness (HDTV) 

■ 25ns Channel Switching Time 

■ 50mV Switching Transient 

■ 10MQ Disabled Output Impedance 

• Expandable 

■ 8- and 16-Pin Narrow SOIC Packages 

■ LT1203 PDIP $2.85, LT1205CS $5.30 



Current Feedback Amp with 
DC Gain Control 

• LT1228: 75MHz Transconductance Amp 
with 100MHz Current Feedback Amplifier 

■ Color Video Performance 

■ Differential Input 

■ Operates on ±2V to ±15V Supplies 

■ For Auto-Gain, Tunable Filters, and 
Specialized Video Circuits. 



Oo 

IQI 



AUDIO 



Oo 



RGB GRAPHICS 



Video Fader/Gain-Controlled 
Amplifier 

• LT1251: 40MHz Video Fader 

. LT1256: 40MHz Gain-Controlled Amplifier 

■ Accurate 1% Linear Gain Control 

■ Low Differential Gain/Phase, 0.1%/0.1% 



Multimedia 

Multimedia systems combine audio, composite video (broadcast quality TV) and high resolution computer graphics. 

Typical requirements are: 



Video: NTSC or PAL need minimum 50MHz, -3dB bandwidth 

HDTV needs 0.1 dB flatness to 30MHz 
Suggested Products (Refer to above and reverse): 

General Purpose LT1 360/63: Single/Dual/Quad Voltage Feedback 
Gain Blocks/Video Op Amps with Current Feedback Speed 
A/D Buffers LT1 227/29/30: Single/Dual/Quad Current 

Feedback Amplifiers 

LT1 252/3/4: Low CostCurent Feedback Amplifiers 



Multiplexer 


LT1204: 4:1 Video MUX with Current 




Feedback Amplifier 


Video Distribution 


LT1206: 250mA Output Current Feedback Amplfiers 


DC Restoration 


LT1 228: Current Feedback Amplifier with 




Gain Control 


Gain Control 


LT1 228: Current Feedback Amplifier with 




Gain Control 


COAX Loopthrough/ 


LT1 187/89/93/94: Video Difference Amplifiers 

r 


TwIsted-Pair Receive 



Graphics: VGA needs >50MHz, 19" monitors need >100MHz 

RGB, YUV, YC, Amps LT1259/60: Dual/Triple, 130MHz, 1800V/uS 
Current Feedback Amplifiers with Shutdown 



Pixel 



LT1203/05: 2:1 and 4:1 Video Multiplexers 



Audio: For 8x Oversampling, 200kHz Bandwidth is Required 

Gain Blocks LT1 1 1 5: Low Noise Preamplifier 

LT1 124/26: Dual Low Noise Preamplifier 

LT1211/12: High Slew Rate, Single Supply 
Dual/Quad Op Amps 

LT1122: Ultra-Low Distortion Op Amp with 
Symmetric Slew Rates. 

LT1355/56: Ultra-High Slew Rate, 
Low Supply Current Op Amps 



2-5 



OP AMP SELECTION GUIDE 



Commercial Precision Op Amps 



PART 
NUMBER 


ELECTRICAL CHARACTERISTICS 


IMPORTANT FEATURES 


Vos 
MAX 

m 


TC 
Vos 
(uVfC) 


!j 
MAX 
(nA) 


Avol 
MIN 
(V/mV) 


SLEW RATE 
MIN 

Wns) 


NOISE 
MAX10HZ 
(nVMHz) 


PACKAGES 
AVAILABLE 


MIL/ 
IND 
TEMP 


SINGLE 


LT1001AC 


25 


0.6 


2.0 


450 


0.15 


18 


H,J8, N8 


M 


Extremely Low Offset Voltage, Low Noise, 

I rtm I'ir iri 

LOW UlITT 


LT1001C 


60 


1.0 


3.8 


400 


0.15 


18 


H, J8, N8. S8 


M 


LT1006AC 


50 


1.3 


15 


1000 


0.25 


24* 


H. J8 


M 


Single Supply Operation, Fully Specified for 
5V Supply 


LT1006C 


80 


1.8 


25 


700 


0.25 


24' 


H.J8. N8 


M 


LT1006S8 


400 


3.5 


25 


700 


0.25 


25 


S8 




LT1007AC 


25 


0.6 


35 


7000 


1.7 


4.5 


H. J8, N8 


M 


Extremely Low Noise, Low Drift 


LT1007C 


60 


1.0 


55 


5000 


1.7 


4.5 


H. J8. N8. S8 


M.I 




120 


1.5 






H, N8 


U.I 


Low Bias Current. Low Power 






H.N8 


M. I 


Low Vos, Low Power 


I T1019AP 

L I 1 U 1 CrVj 


50 


1 5 


15 


200 


1 


30 


H, N8 


M 


LT1012D 


60 


1 7 


150 


200 


1 


30 


H, N8 




LI lu I COO 


120 


1 8 


28 


200 


1 


30 


S8 




L 1 \ \JCCnx/ 


250 


5 


05 


150 


23 


50 


H 


M 


Very High Speed JFET Input Op Amp with 
Very Good DC Specs 


LT1022C 


600 


9 


05 


120 


18 


60 


H 


M 


1 T1f199rMR 


1000 


15 


05 


100 


18 


60 


N8 




L I I UcOnb 


40 


8 


90 


7000 


11 


1 7 


H, J8, N8 


M 


Lowest Noise, High Speed, Low Drift 


LT-028C 


80 


1 


ISO 


5000 


11 


1.9 


H. J8, N8. S 


M 


LT1037AC 


25 


0.6 




7000 


11 


4.5 


H. J8, N8 


M 


Extremely Low Noise, High Speed 


LT1037C 


60 


1.0 


55 


5000 


11 


4.5 


H, J8, N8, S8 


M, I 


LT1055AC 


150 


4 


0.05 


150 


10 


50 


H 


M 


Lowest Offset, JFET Input Op Amp Combines 
High Speed and Precision 


LT1055C 


400 


8 


0.05 


120 


7.5 


60 


H 


M 


LT1055CN8 


700 


12 


0.05 


120 


75 


60 


N8 




LT1055S8 


1500 


15 


0.1 


120 


7.5 


70 


S8 




LT1056AC 


180 


4 


0.05 


150 


12 


50 


H 


M 


LT1056C 


450 


8 


0.05 


120 


9 


60 


H 


M 


LT1056CN8 


800 


12 


0.05 


120 


9 


60 


N8 




LT1056S8 


1500 


15 


0.1 


120 


9.0 


70 


S8 




LT1077AC 


40 


0.4 


9 


250 


0.12 


40 


H. J8, N8 


M, I 


Micropower, Single Supply, Precision, 
Low Noise 


LT1077C 


60 


0.4 


11 


200 


0.12 


29* 


H, J8. N8 


M, I 


LT1077S8 


150 


3.0 


11 


240 


0.05 


28* 


S8 




LT1097C 


50 


1.0 


0.250 


700 


0.1 


16' 


N8 


I 


Low Cost, Low Power Precision 


LT1097S8 


60 


1.4 


0.350 


700 


0.1 


16* 


S8 


I 


LT1115C 


280 


0.5 (Typ) 


380 


2000 


10 


1.8 


N8, S 




Lowest Noise, Ultra Low Distortion Audio 
Optimized Op Amp 


LT1128AC 


40 


1.0 


90 


7000 


5.0 


1.7 


J8, N8. S8 


M, I 


Lowest Noise, High Speed. Precision 


LT1128C 


80 


i.: 


180 


5000 


4.5 


1.9 


J6. N8, S8 


M, I 


LTC1049C 


10 


0.1 


0.050 


3162 


0.8* 


1.0nVp.p" 


J8, N8 


M, I 


Auto Zeroed Precision Op Amp, No External 
Capacitors Required 


LTC1 050 AC 


5 


0.05 


0.035 


3162 


4* 


0.6|iVp.p* ' 


H, J8, N8, S8 


M, I 


LTC1050C 


5 


0.05 


0.050 


1000 


4 f 


0.6uV P .p" 


H.J8, N8. S8 


M I 


LTC1052C 


5 


0.05 


0.03 


1000 


3' 


0.5nV P .p" 


H, N8. N 


M. I 


Low Noise, Auto Zeroed Precision Op Amp 


LTC7652C 


5 


0.05 


0.03 


1000 


3' 


0.5nV P .p' ■ 


H, N8 


M, I 


LTC1150C 


5 


0.05 


0.03 


10000 


3' 


0.6nVp. P " 


H, J8, N8, S8 


M.I 


Auto Zeroed Precision Op Amp That Operates 
on Standard +15V Supplies. No External 
Capacitors Required 


LTC11S2C 


10 


0.1 


0.1 


316 


1' 


0.5nV P .p 


N8. S8 




Rail-to-Rail Input and Output. Auto Zeroed 
Precision Op Amp. C-Load™ Stable. 


LTC1250C 


10 


0.05 


0.02 


10000 


10' 


0.3mVp. P " 


J8, N8, S8 


M 


Low Noise, Auto Zeroed Precision Op Amp 



'Typical spec MOOHz noise " DC to 1 Hz noise C-Load is a trademark of Linear Technology Corporation 
NOTE: See page 14-3 for DESC cross reference numbers. Check data sheet for specifications on industrial and military temperature produced and surface mount. 



2-6 



OP AMP SELECTION GUIDE 



Commercial Precision Op Amps 





ELECTRICAL CHARACTERISTICS 






Vos 


TC 


Ib 


AyoL 
MIN 


SLEW RATE 


NOISE 




MIL/ 




PART 
NUMBER 


MAX 


Vos 


MAX 


MIN 


MAX 10Hz 


PACKAGES 


IND 


IMPORTANT FEATURES 


(HV) 


(nW°C) 


(nA) 


(V/mV) 


(V/u.s) 


(nV/\Hz) 


AVAILABLE 


TEMP 






















LF355A 


2000 


5 


0.05 


75 


5 


25*' 


H, N8 




JFET Inputs, Low l B , No Phase Reversal 


LF356A 


2000 


5 


0.05 


75 


10 


15** 


H, N8 




LM10B 


2000 


2' 


20 


120 


— 


50* 


H. J8 


M 


On-Chip Reference Operates with +1 ,2V 
Single Battery 


LM10BL 


2000 


2' 


20 


60 


— 


50' 


H.J8 




LM10C 


4000 


5 f 


30 


80 


— 


50* 


H,J8. N8 




LM10CL 


4000 


5' 


30 


80 


— 


50* 


H, J8. N8 




LM308A 


500 


5 


7 


60 


0.1 


30' 


H, N8 


M 


Low Bias. Supply Current 


LT318A 


1000 




250 


200 


50 


42* 


H.J8, N8 


M 


High Speed, 15MHz 


LM318 


10000 




500 


25 


50 


42* 


H, J8, N8, S8 


M 


High Speed, 15MHz 


OP-05C 


1300 


4.5 


7 


120 


0.1 


20 


H, J8, N8 


M 


Low Noise, Low Offset Drift with Time 


0P-05E 


500 


2.0 


4 


200 


0.1 


18 


H, J8, N8 


M 


OP-07C 


150 


1.8 


7 


120 


0.1 


20 


H, J8. N8, S8 


M 


Low Initial Offset, Low Noise. Low Drift 


OP-07E 


75 


1 3 


4 


200 


0.1 


18 


H, J8. N8 


M 


0P-15E 


500 


5 


0.05 


100 


10 


20'* 


H. N8 


M 


Precision JFET Input, Low Bias Current, 
No Phase Reversal 


0P-15F 


1000 


10 


0.1 


75 


75 


20*' 


H. N8 


M 


0P-15G 


3000 


15 


0.2 


50 


5 


20*' 


H. N8 


M 


0P-16E 


500 


5 


0.05 


100 


18 


20'* 


H.N8 


M 


Precision JFET Input, High Speed, 
No Phase Reversal 


0P-16F 


1000 


10 


0.1 


75 


12 


20'* 


H N8 


M 


0P-16G 


3000 


15 


0.2 


50 


9 


20** 


H.N8 


M 


0P-27E 


25 


0.6 


40 


1000 


1.7 


5.5 


H.J8. N8 


I 


Very Low Noise, Unity Gain Stable 


0P-27G 


100 


1.8 


80 


700 


1.7 


8.0 


H.N8 




0P-37E 


25 


0.6 


40 


1000 


11 


5.5 


H.J8. N8 


I 


Very Low Noise. Stable for Gains > 5 


0P-37G 


100 


1.8 


80 


700 


11 


8.0 


H.N8 


I 


0P-97E 


25 


0.6 


±0.1 


300 


1 


30 


H.N8 


M 


Low Power. Low l B , Precision 


DUAL 


LT1002AC 


60 


0.9 


3.0 


400 


0.15 


20 


J. N 


M 


Dual, Matched LT1 001 High CMRR, 
PSRR Matching 


LTI002C 


100 


1.3 


4.5 


350 


0.15 


20 


J.N 


M 


LT1013AC 


150 


2.0 


20 


1500 


0.2 


24* 


H, J8 


M 


Precision Dual Op Amp in 8-Pin Package 


LT1013C 


300 


2.5 


30 


1200 


0.2 


24' 


H, J8, N8 


M, I 


LT1013D 


800 


5.0 


30 


1200 


0.2 


24* 


N8.S8 




LT1024AC 


50 


1.5 


0.12 


250 


0.1 


33 


N 


M 


Low V s, Low Power, Matching Specs 


LT1024C 


100 


2 


0.20 


180 


0.1 


33 


N 


M 


LTC1047C 


10 


0.01 


0.02 


1000 


0.2* 


0.8mVp-p** 


N8.S 




No External Capacitors Required 
Dual. Precision Auto Zeroed Op Amp 


LTC1051C 


5 


0.05 


0.05 


1000 


4' 


0.4nVp-p** 


JB, N8. S 


M.I 


LT1057AC 


450 


7 


0.05 


150 


10 


26* 


H. J8 


M 


Low Offset JFET Input Multiple Op Amps 
Combine High Speed and Excellent DC Specs 


LT1057ACN8 


450 


10 


0.05 


150 


10 


26* 


N8 




LT1057C 


800 


12 


0.075 


100 


8 


26* 


H, J8 


M, I 


LT1057CN8 


800 


16 


0.075 


100 


8 


26* 


N8.S8 


I 


LT1078AC 


70 


2.0 


8 


250 


0.07' 


40 


H, J8. N8 


M 


Micropower, Precision, 
Single Supply, Low Noise Dual 


LT1078C 


120 


2.5 


10 


200 


0.07' 


29' 


H, J8. N8, S8 


M, I 


LT1112A 


60 


0.50 


0.25 


1000 


0.16 


15* 


J8, N8. S8 


M. I 


Low Power, Precision, Matching Specs 


LT1112C 


75 


0.75 


0.28 


800 


0.16 


15' 


J8. N8, S8 


M,l 


LT1113AC 


1500 


15 


0.45 


1200 


25 


17' 


N8, J8. S8 


M, 


Dual Low Noise, Precision JFET Input 


LT1113C 


1800 


20 


0.48 


1000 


2.5 


17' 


N8, J8. S8 


M. I 


LT1124AC 


70 


1 


55 


2000 


3 


5.5 


N 


M, I 


Dual Precision Op Amp, 
Low Noise, High Speed 


LT1124C 


100 


1.5 


70 


1500 


2.7 


5.5 


J, N.S 


M,l 



Typical spec '100Hz noise *" DC to 1 Hz noise NOTE: See page 14-3 for DESC cross reference numbers 



2-7 



OP AMP SELECTION GUIDE 



Commercial Precision Op Amps 



PART 
NUMBER 


ELECTRICAL CHARACTERISTICS 


IMPORTANT FEATURES 


Vos 
MAX 
(nV) 


TC 

Vos 

(MWC) 


■b 

MAX 
(nA) 


AvoL 

MIN 

(W/mV) 


SLEW RATE 
MIN 

(Wus) 


NOISE 
MAX 10Hz 

(nW-,Hz) 


PACKAGES 
AVAILABLE 


MIL/ 
IND 
TEMP 


DUAL 


LT1 1 26AC 


70 


1.0 


20 


2000 


8 


5.5 


N8 


M, I 


Dual Precision Op Amp, Low Noise, High Speed 


LT1126C 


100 


1.5 


30 


1500 


8 


5.5 


J8, N8, S8 


M, I 


LT1169A 


1500 


15 


3 


1200 


2.4 


17' 


J8. N8. S8 




Dual Low Noise, Picoampere Bias Current 
JFET Input Op Amp 


LT1169C 


1800 


20 


5 


1000 


2.4 


17' 


J8. N8. S8 




LT1178AC 


70 


2.2 


5 


140 


0.013 


75 


H, J8, N8 




17uA Max, Single Supply, Precision Dual 


LT1178C 


120 


3.0 


6 


110 


0.013 


50' 


H, J8. N8 


I 




LT1211C 


275 


0.6 


125 


250 


4 


12.5 


J8, N8, S8 


M, I 


Fast, Precise, Single Supply Op Amps. 
Industrial Temperature (-40°C to 85°C) 
Specs Included with Commercial Temperature 
Devices 


LT1211AC 


150 


0.5 


100 


250 


4 


12.5 


J8, N8, S8 


M, I 


LT1213C 


275 


0.6 


200 


250 


8.5 


10 


J8. N8, S8 


M, I 


LT1213AC 


150 


0.5 


160 


250 


8.5 


10 


J8. N8, S8 


M.I 


LT1215C 


450 


1.0 


600 


150 


30 


15 


J8, N8, S8 




LT1215AC 


300 


0.8 


500 


150 


30 


15 


J8, N8. S8 




LT1413AC 


150 


2 


15 


400 


0.2 


24' 


N8 


I 


Dual Single Supply Precision Op Amp 
Optimized for 5V and GND 


LT1413C 


280 


2.5 


18 


350 


0.2 


24' 


N8, S8 


I 


LT1413S 


380 


2.5 


18 


350 


0.2 


24' 


S8 




LT1457C 


800 


16 


0.075 


100 


2 


28 


N8, S8 




Dual Precision JFET Input Op Amp. 
C-Load Stable 


LF412AC 


1000 


10 


0.1 


100 


10 


20'* 


H, J8, N8 


M 


High Performance Dual JFET Input Op Amp 


OP-215E 


1000 


10 


0.1 


150 


10 


20'* 


H, J8, N8 


M 


OP-215G 


3000 


20 


0.2 


50 


8 


20'* 


H,J8, N8 


M 


0P-227E 


80 


1.0 


40 


3000 


1.7 


6 


J.N 


M 


Dual Matched OP-27 


0P-227G 


180 


1.8 


80 


2000 


1.7 


9 


J,N 


M 


0P-237E 


80 


1.0 


40 


3000 


10 


6 


J, N 


M 


Dual Matched OP-37 


0P-237G 


180 


1.8 


80 


2000 


10 


9 


J, N 


M 


OP-270A 


75 


1 


20 


750 


1.7 


6.5 


J 


M 


Dual Op Amp, Low Noise 


OP-270C 


250 


3 


60 


350 


1.7 


3.6' 


N,S 


M 


QUAD 


LT1014AC 


180 


2.0 


20 


1500 


0.2 


24' 


J 


M 


Precision Quad Op Amp in 14-Pin Package 


LT1014C 


300 


2.5 


30 


1200 


0.2 


24' 


J, N 


M.I 


LT1014D 


800 


5.0 


30 


1200 


0.2 


24' 


N.S 




LT1058AC 


600 


10 


0.05 


150 


10 


26' 


J 


M 


Low Offset JFET Input Multiple Op Amps 
Combine High Speed and Excellent DC Specs 


LT1058C 


1000 


15 


0.075 


100 


8 


26' 


J.N, S 


M.I 


LT1079AC 


120 


2 


8 


250 


0.07' 


40 


J.N 


M 


Micropower, Precision, Single Supply, 
Low Noise Quad 


LT1079C 


150 


2.5 


10 


200 


0.07' 


29' 


J.N, S 


M.I 


LT1114AC 


60 


0.50 


0.25 


1000 


0.16 


15' 


J8, N8, S8 


M, I 


Low Power, Precision, Matching Specs 


LT1114C 


75 


75 


0.28 


800 


16 


15' 


J8. N8, S8 


M, I 


LT1125AC 


90 


1 


20 


2000 


3 


5.5 


N 


M 


Precision Quad Op Amp, 
Low Noise, High Speed 


LT1125C 


140 


1.5 


30 


1500 


2.7 


5.5 


J,N,S 


M, I 


LT1127AC 


90 


1.0 


20 


2000 


8 


5.5 


N 


M 


LT1127C 


140 


1.5 


30 


1500 


8 


5.5 


N, J,S 


F.I I 


LT1179AC 


100 


2.2 


5 


140 


0.013 


75 


J, N 




17uA Max, Single Supply, Precision Quad 


LT1179C 


150 


3.0 


6 


110 


0.013 


50' 


J.N 


1 


LT1212C 


275 


0.6 


125 


250 


4 


12.5 


N.S 


1 


Fast. Precise, Single Supply Op Amps. 
Industrial Temperature (-40°C to 85°C) 
Specs Included with Commercial Temperature 
Devices 


LT1214C 


275 


0.6 


200 


250 


8.5 


10 


N, S 


1 


LT1216C 


450 


1.0 


600 


150 


30 


15 


N, S 


1 


LTC1053C 


5 


0.05 


0.05 


1000 




0.4uVp-p** 


N.S 


1 


Quad, Precision Auto Zeroed Op Amp. 
No External Capacitors Required 


0P-470A 


400 


2 


25 


500 


1.4 6.5 


J 


M 


Quad Op Amp, Low Noise 


OP-470C 


1000 


2' 


60 


400 


1.4 6.5 


N,S 





'Typical spec *100Hz noise ** DC to 1 Hz noise 
NOTE: See page 14-3 for DESC cross reference numbers 



2-8 



OP AMP SELECTION GUIDE 



High Speed Op Amps 



PART 
NUMBER 


ELECTRICAL CHARACTERISTICS 


IMPORTANT FEATURES 


MIN 
SLEW 
RATE 

(Wus) 


TYP 
SETTLING TIME 
TU 0.1 % 

(US) 


TYPICAL GAIN 
BANDWIDTH 
PRODUCT 
(MHz) 


MIN 

AvOL 

(V/mV) 


MAX 

Vos 

m 


U 
MAX 
(nA) 


PACKAGES 
AVAILABLE 


MIL/ 
IND 
TEMP 


SINGLE 




LT1122AC 


60 


0.340* 
0.540" 


14 


180 


600 


0.075 


J8. N8 


M 


JFET Input. Faster and Better DC 
Specs Than OP-42. A and C Have 
Grades 100% Tested Settling Time 


LT1122BC 


60 


0.350* 


14 


180 


600 


0.075 


J8, N8 


M 


LT1122CC 


50 


0.350* 
0.590** 


13 


150 


900 


0.1 


J8, N8, S8 


M 


LT1122DC 


50 


0.360* 


13 


150 


900 


0.1 


J8, N8, S8 


M 


LT1187C 


130 


01*** 


50 (Ay = 2) 




10000 


2000 


N8, S8 




Low Power Video Difference Amplifier 


LT1189C 


175 




35 (Av = 10) 




3000 


2000 


N8, S8 








1 




3.5 


10000 


2500 


J8, N8, S8 


M 


±5V Supply Color Video Op Amps 


LT1190C 


450 t 


50 


LT1191C 


450 + 


1 


90 


6 


5000 


2500 


J8 M8 S8 


M 


LT1192C 


450 + 


1 


400 (Aw > St 


16 


2.5 


2500 


J8. N8. S8 


M 


LT1193C 


450 + 


1 


70 




12000 


3500 


J8, N8, S8 


M 


Color Video Differential Amplifier 


LT1 1 94C 


450* 


1 


40 




6000 


3500 


J8, N8. S8 


M 


LT1 1 95C 


140 


22*** 


50 


0.5 


8000 


2000 


J8, N8, S8 




Low Power, High Speed 


LT1200C 


30 


0.430 


11.0 


4 


1000 


1000 


m, S8 




Low Supply Current Op Amp 


LT1206C 


600 




50 


0.6 


15000 


20000 


N8, R,Y, S8 




250mA Current Feedback Amplifier 


LT1217C 


100 


280 


10.0 


3.2 


3000 


500 


N8, S8 




Low Power Current Feedback Amplifier 


LT1220C 


200 


0.09 


45 


20 


1000 


300 


N8 




Ultra High Speed, Good DC Specs 


LT1221C 


200 


0.09 


150 (A v >4) 


50 


1000 


300 


N8 




LT1222C 


200 


0.09 


500 (A v > 1 0) 


100 


1000 


300 


N8 




LT1223C 


800 


0.075 


100 


3.2 


3000 


3000 


J8, N8, S8 


M 


Current Feedback Amplifier 


LT1224C 


250 


0.090 


45 


3.3 


2000 


8000 


J8, N8, S8 


M 


High Speed, DC Precision, Can Drive 
Unlimited Capacitive Load While 
Remaining Stable 


LT1225C 


250 


0.070 


150 (A«>5) 


12.5 


1000 


8000 


J8, N8, S8 


M 


LT1226C 


250 


0.075 


1000 (A v >25) 


50 


1000 


8000 


J8, N8, S8 


M 


LT1227C 


500 


0.050 


140.0 


0.6 


10000 


10000 


J8, N8, S8 


M 


Current Feedback Amplifier 


LT1228C 


300 


0.045 


100 


0.6 


10000 


10000 


J8, N8, S8 


M 


Electronic DC Gain Control 


LT1252C 


250 




100 


0.56 


15000 


15000 


N8.S8 




Low Cost Video Amplifier 


LT1354C 


200 


0.280 


12 


12 


800 


300 


N8.S8 




1mA, 12MHz, 400V/US C-Load 


LT1357C 


300 


0.220 


25 


20 


600 


500 


N8.S8 




2mA, 25MHz, 600V/ps C-Load 


LT1360C 


600 


0.090 


50 


4.5 


1000 


1000 


N8.S8 




4mA, 50MHz, 800V/us C-Load 


LT1363C 


750 


0.080 


70 


4.5 


1500 


2000 


N8.S8 




6mA, 70MHz, 1 0OOV/us C-Load 


DUAL 


LT1201C 


30 


330 


12 


4 


2000 


1000 


N8.S8 




1mA, 12MHz, 50V/us Dual C-Load 


LT1208C 


250 


0.090 


45 


3.3 


3000 


8000 


N8.S8 




45MHz, 450us Dual C-Load 


LT1211C 


5 


2.2 


14 


1200 


550 


120 


N8, S8 




14MHz, 7V/us Single Supply Precision 


LT1211A 


5 


2.2 


14 


1200 


400 


95 


N8.S8 




LT1213C 


10 


1,1 


28 


1200 


550 


190 


N8, S8 




28MHz, 12V/us, Single Supply Precision 


LT1213A 


10 


1.1 


28 


1200 


400 


150 


N8, S8 




LT1215C 


40 


0.480 


23 


1000 


650 


550 


N8.S8 




23MHz, 50V/us, Single Supply Precision 


LT1215A 


40 


0.480 


23 


1000 


500 


500 


N8, S8 




LT1229C 


300 


0.045 


100 


0.6 


650 


550 


J8, N8, S8 


M 


Fast Slew Rate, Current Feedback Architecture 


LT1253C 


250 




90 


0.560 


15000 


15000 


N8, S8 




Low Cost Video Amplifier 


LT1259C 


900 


0.075 


130 


0.71 


10000 


3000 


N14, S14 




Low Cost 130MHz Dual CFAs with 
Individual Shutdowns 


LT1355C 


200 


0.023 


12 


12 


800 


300 


N8. S8 




1mA, 12MHz, 400V/usDual C-Load 


LT1358C 


300 


0.220 


25 


20 


600 


500 


N8, S8 




2mA, 25MHz, 600V/us Dual C-Load 


LT1361C 


600 


0.090 


50 


4.5 


1000 


1000 


N8, S8 




4mA, 50MHz, 800V/ls Dual C-Load 


LT1364C 


750 


0.080 


70 


4.5 


1500 


2000 


N8, S8 




6mA, 70MHz, 1000V/hs Dual C-Load 



"•"Typical value *10V step, to ImVatsum node. "Maximum value, 10V step, to ImVatsum node. ***3V Step 
NOTE: See page 14-3 for DESC cross reference numbers 



2-9 



OP AMP SELECTION GUIDE 



High Speed Op Amps 



PART 
NUMBER 


ELECTRICAL CHARACTERISTICS 




MIN 

SLEW 
RATE 

(V/fis) 


TYP 
SETTLING TIME 
TO 0.1 % 

(us) 


TYPICAL GAIN 
BANDWIDTH 
PRODUCT 
(MHz) 


MIN 

Avol 
(V/mV) 


MAX 

Vos 
<HV) 


h 

MAX 

(nA) 


PACKAGES 
AVAILABLE 


MIL/ 
IND 
TEMP 


IMPORTANT FEATURES 


TRIPLE 


LT1260C 


900 


0.075 


130 


0.71 


10000 


3000 


N16, S16 




Low Cost Triple 1 30MHz CFAs 
with Individual Shutdowns 


QUAD 






LT1202C 


30 


0.330 


12 


4 


2000 


1000 


N14.S16 




1mA. 12MHz. 50V'MsQuad C-Load 


LT1209C 


250 


0.090 


45 


3.3 


3000 


8000 


N14, S16 




45MHz, 450V/ps Quad C-Load 


LT1212C 


5 


2.2 


14 


1200 


550 


120 


N14, S16 




14MHz, 7V/us Single Supply Precision 


LT1214C 


10 


1.1 


28 


1200 


550 


190 


N14.S16 




28MHz. 12V/ls, Single Supply Precision 


LT1216C 


40 


0.480 


23 


1000 


650 


550 


N14.S16 




23MHz, 50V/ps, Single Supply Precision 


LT1230C 


300 


0.045 


100 


0.6 


15000 


10000 


J, N.S 




Fast Slew Rate, Current Feedback Architecture 


LT1254C 


250 




90 


0.560 


15000 


15000 


N14, S14 




Low Cost Video Amplifier 


LT1356C 


200 


0.280 


12 


12 


800 


300 


N14, S16 




1mA, 12MHz, 400V/(is Quad C-Load 


LT1359C 


300 


0.220 


25 


20 


600 


500 


N14.S16 




2mA, 25MHz, 600W(is Quad C-Load 


LT1362C 


600 


0.090 


50 


4.5 


1000 


1000 


N14.S16 




4mA, 50MHz, 800V/us Quad C-Load 


LT136SC 


750 


0.080 


70 


4.5 


1500 


2000 


N14, S16 




6mA. 70MHz, 1000Wps Quad C-Load 



*Typical value *10V step, to ImVatsum node. "Maximum value, 10V step, to 1mV at sum node. ***3VStep 
NOTE: See page 14-3 for DESC cross reference numbers 



2-10 



ITLirKAB INDEX 

TECHNOLOGY I INULA 



SECTION 2— AMPLIFIERS 

PRECISION OPERATIONAL AMPLIFIERS 

LT1028AT1128, Ultra Low Noise Precision High Speed Op Amps 2-12 

LT1112/LT1114, Dual/Quad Low Power Precision, Picoamp Input Op Amps 2-29 

LT1113, Dual Low Noise, Precision, JFET Input Op Amps 2-40 

LT1169, Dual Low Noise, Picoampere Bias Current, JFET Input Op Amp 2-55 

LT1178S8, 20/jA Max, Dual SO-8 Package, Single Supply Precision Op Amp 2-67 

LT1413, Single Supply, Dual Precision Op Amp 2-68 



LT1457, Dual, Precision JFET Input Op Amp 2-76 



xruoai 



2-11 



/ 



I 1 1 \KJ VK. 

TECHNOLOGY 



LT1028/LT1 128 



Ultra Low Noise Precision 
High Speed Op Amps 



F€fiTUR€S 

■ Voltage Noise 

1.1nV/VfizMax.at1kHz 
0.85nV/VHzTyp.at1kHz 
1.0nV/VHzTyp.at10Hz 
35nVp. P Typ.,0.1Hzto10Hz 

■ Voltage and Current Noise 1 00% Tested 

■ Gain-Bandwidth Product 

LT1028: 50MHz Min. 
LT1 128: 13MHz Min. 

■ Slew Rate 

LT1028: 11V/|osMin. 
LT1128:5V/nsMin. 

■ Offset Voltage: 40|iV Max. 

■ Drift with Temperature: 0.8nV/°C Max. 

■ Voltage Gain: 7 Million Min. 

■ Available in 8-Pin SO Package 

nppucOTions 

■ Low Noise Frequency Synthesizers 

■ High Quality Audio 

■ Infrared Detectors 

■ Accelerometer and Gyro Amplifiers 

■ 350O. Bridge Signal Conditioning 

■ Magnetic Search Coil Amplifiers 

■ Hydrophone Amplfiers 



DCSCMPTIOn 

The LT1028(gain of -1 stable)/LT1128(gain of +1 stable) 
achieve a new standard of excellence in noise performance 
with 0.85nV/VRz 1 kHz noise, 1 .OnVA/Hz 1 0Hz noise. This 
ultra low noise is combined with excellent high speed 
specifications (gain-bandwidth product is 75MHz for 
LT1 028, 20MHz for LT1 1 28), distortion-free output, and 
true precision parameters (0.1uW°C drift, 10|aV offset 
voltage, 30 million voltage gain). Although the LT1028/ 
LT1128 input stage operates at nearly 1mA of collector 
current to achieve low voltage noise, input bias current is 
only 25nA. 

The LT1 028/LT1 1 28's voltage noise is less than the noise 
of a bOQ. resistor. Therefore, even in very low source 
impedance transducer or audio amplifier applications, the 
LT1028/LT1 128's contribution to total system noise will 
be negligible. 




LT1028/LT1128 



RRTMGS 

Supply Voltage 

-55°'C-to105°C ±22V 

105°Cto125°C ±16V 

Differential Input Current (Note 8) ±25mA 

Input Voltage Equal to Supply Voltage 

Output Short Circuit Duration Indefinite 



Operating Temperature Range 

LT1028/LT1 128AM, M -55°C to 125°C 

LT1 028/LT1 1 28AC, C -40°C to 85°C 

Storage Temperature Range 
All Devices -65°C to150°C 

Lead Temperature (Soldering, 10 sec.) 300°C 



PRCKRG€/ORD€R IflFORfTlflTIOn 




(CASE) 



H PACKAGE 
8-LEAD TO-5 METAL CAN 

TjMM = 175°C, e JA = 140°C/W, e JC = 40'C/W 



ORDER PART 
NUMBER 



LT1028AMH 
LT1028MH 
LT1028ACH 
LT1028CH 



TOP VIEW 




S8 PACKAGE 
8-LEAD PLASTIC SOIC 



TjMAX = 135°C,e JA =140°CAV 



ORDER PART 
NUMBER 



LT1028CS8 
LT1128CS8 



S8 PART 



1028 
1128 




N8 PACKAGE 
8-LEAD PLASTIC DIP 



Tj M AX = 165°C i e JA =100°C/W(J8) 
TjMAX = 130°C.ejA = 130°C/W(N8) 



LT1028AMJ8 

LT1028MJ8 

LT1028ACJ8 

LT1028CJ8 

LT1028ACN8 

LT1028CN8 

LT1128AMJ8 

LT1128MJ8 

LT1128CJ8 

LT1128ACN8 

LT1128CN8 




S PACKAGE 
16-LEAD PLASTIC SOL 

Tj MAX = 140°C l ej A =130°CW 



ORDER PART 
NUMBER 



LT1028CS 



NOTE: THIS DEVICE IS NOT 
RECOMMENDED FOR NEW 

DESIGNS. 



Consult factory for Industrial grade parts. 



€l€CTRICfll CHRRRCT€RISTICS V$ = +15V, T A = 25°C, unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS 


LT1028AM/AC 
LT1 128 AM/AC 
MIN TYP MAX 


LT1028M/C 
LT1128M/C 
MIN TYP 


MAX 


UNITS 


Vos 


Input Offset Voltage 


(Note1) 


10 


40 


20 


80 


M.V 


AVqs 

ATime 


Long Term Input Offset 
Voltage Stability 


(Note 2) 


0.3 


0.3 




uV/Mo 


I OS 


Input Offset Current 


V CM = 0V 


12 


50 


18 




nA 


Ib 


Input Bias Current 


Vcm = 0V 


±25 


±90 


±30 


±180 


nA 


e n 


Input Noise Voltage 


O.IHzto 10Hz (Note 3) 


35 


75 


35 


90 


nVp.p 



XT! 



2-13 



LT1028/LT1128 



€l€CTRICfil CHARACTERISTICS V S = +15V,T A = 25°C, unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS 


LT1028AM/AC 
LT1128AM/AC 
MIN TYP MAX 


LT1028M/C 
LT1128M/C 
MIN TYP MAX 


UNITS 




Input Noise Voltage Density 


t = 1 0Hz (Note 4) 

fo = 1000Hz, 100% tested 


1.00 1.7 
0.85 1.1 


1.0 1.9 
0.9 1.2 


nV/VRz 
nVA/Hz 


In 


Input Noise Current Density 


f o = 10Hz(Note3and 5) 
f = 1000Hz, 100% tested 


4.7 10.0 
1.0 1.6 


4.7 12.0 
1.0 1.8 


pAA/Hz 
pA/VRz 




Input Resistance 
Common Mode 
Differential Mode 




300 
20 


300 
20 


Mn 
kn 




Input Capacitance 




5 


5 


PF 




Input Voltage Range 




±11.0 ±12.2 


±11.0 ±12.2 


V 


CMRR 


Common-Mode Rejection Ratio 


V CM = ±11V 


114 126 


110 126 


dB 


PSRR 


Power Supply Rejection Ratio 


V s = ±4Vto±18V 


117 133 


110 132 


dB 


Avol 


Large-Signal Voltage Gain 


R L >2k, V = ±12V 
R L > 1k, V = ±10V 
R L >600D,V = ±10V 


7.0 30.0 
5.0 20.0 
3.0 15.0 


5.0 30.0 
3.5 20.0 
2.0 15.0 


V/u-V 
V/U.V 
V/uV 


VoUT 


Maximum Output Voltage Swing 


R L >2k 
R L > 600O 


±12.3 ±13.0 
±11.0 ±12.2 


+12.0 ±13.0 
±10.5 ±12.2 


V 
V 


SR 


Slew Rate 


A VCL = -1 LT1028 
A v cl = -1 LT1 1 28 


11.0 15.0 
5.0 6.0 


11.0 15.0 
4.5 6.0 


V/us 
V/ns 


GBW 


Gain-Bandwidth Product 


f = 20kHz (Note 6) LT1028 
f = 200kHz (Note 6) LT1128 


50 75 
13 20 


50 75 
11 20 


MHz 
MHz 


Zo 


Open-Loop Output Impedance 


V = 0. 1 = o 


80 


80 


a 


Is 


Supply Current 




7.4 9.5 


7.6 10.5 


mA 


€l€CTRICAl CHARACTERISTICS V S = ±15V,-55°C<T A <125°C, unless otherwise noted. 


SYMBOL 


PARAMETER 


CONDITIONS 


LT1 028AM 
LT1128AM 
MIN TYP MAX 


LT1028M 
LT1128M 
MIN TYP MAX 


UNITS 


Vos 


Input Offset Voltage 


(Notel) 


• 


30 120 


45 180 


uV 


AV 0S 

ATemp 


Average Input Offset Drift 


(Note7) 


• 


0.2 0.8 


0.25 1.0 


|iV/°C 


■os 


Input Offset Current 


V CM = OV 


• 


25 90 


30 180 


nA 


h 


Input Bias Current 


V CM = 0V 


• 


±40 ±150 


±50 ±300 


nA 




Input Voltage Range 




• 


±10.3 ±11.7 


±10.3 ±11.7 


V 


CMRR 


Common-Mode Rejection Ratio 


V CM = +10.3V 


• 


106 122 


100 120 


dB 


PSRR 


Power Supply Rejection Ratio 


V s = ±4.5Vto±16V 


• 


110 130 


104 130 


dB 


Avol 


Large-Signal Voltage Gain 


R L >2k, V = ±10V 
R L >1k, V = ±1 0V 


• 


3.0 14.0 
2.0 10.0 


2.0 14.0 
1.5 10.0 


V/U.V 
V/U.V 


Vout 


Maximum Output Voltage Swing 


R L >2k 


• 


±10.3 ±11.6 


±10.3 ±11.6 


V 


Is 


Supply Current 




• 


8.7 11.5 


9.0 13.0 


mA 



2-14 



LT1028/LT1128 



€l€CTRICRl CHRRRCT€RISTICS V S = +15V, C < T A < 70 C, unless otherwise noted 



SYMBOL 


PARAMETER 


CONDITIONS 


LT1028AC 
LT1128AC 
MIN TYP MAX 


LT1028C 
LT1128C 
MIN TYP MAX 


UNITS 


v OS 


inpui unset voltage 


(Note 1) 




15 80 


30 125 


nV 


- v 'OS 

ATemp 


Awor^na Inniit Hffcat Drift 

Average input unset unn 


(Note7) 




n 1 nfi 

U. I u.o 


n 9 1 n 

\i.L 1 .U 


(iV/ ^ 


los 


Input Offset Current 


Vcm = 0V 




15 65 


22 130 


nA 


Ib 


Input Bias Current 


V CM = 0V 




±30 ±120 


±40 ±240 


nA 




Input Voltage Range 






±10.5 ±12.0 


±10.5 ±12.0 


V 


CMRR 


Common-Mode Rejection Ratio 


V CM = ±10.5V 




110 124 


106 124 


dB 


PSRR 


Power Supply Rejection Ratio 


V s = ±4.5Vto±18V 




114 132 


107 132 


dB 


Avol 




R L >2k,V = ±10V 
R L >1k,V = ±10V 




5.0 25.0 
4.0 18.0 


3.0 25.0 
2.5 18.0 


W|iV 
W|iV 


VoUT 


Maximum Output Voltage Swing 


R L >2k 

R L > 600£1 (Note 9) 




±11.5 ±12.7 
±9.5 ±11.0 


±11.5 ±12.7 
±9.0 ±10.5 


V 
V 


Is 


Supply Current 






8.0 10.5 


8.2 11.5 


mA 


€l€CTRICRl CHRRRCT€RISTICS V S = ±15V, -40 C < T A < 85 C, unless otherwise noted. (Note 10) 


SYMBOL 


PARAMETER 


CONDITIONS 


LT1028AC 
LT1128AC 
MIN TYP MAX 


LT1028C 
LT1128C 
MIN TYP MAX 


UNITS 


Vos 


Input Offset Voltage 






20 95 


35 150 


uV 


AV 0S 

ATemp 


Average Input Offset Drift 






0.2 0.8 


0.25 1.0 


nv/°c 


los 


Input Offset Current 


V CM = 0V 




20 80 


28 160 


nA 


Ib 


Input Bias Current 


V CM = 0V 




±35 ±140 


±45 ±280 


nA 




Input Voltage Range 






±10.4 ±11.8 


±10.4 ±11.8 


V 


CMRR 


Common-Mode Rejection Ratio 


V CM = ±10.5V 




108 123 


102 123 


dB 


PSRR 


Power Supply Rejection Ratio 


V s = ±4.5Vto±18V 




112 131 


106 131 


dB 


Avol 


Large-Signal Voltage Gain 


R L >2k, V o = ±10V 
R L > 1 k, V = ±1 0V 




4.0 20.0 
3.0 14.0 


2.5 20.0 
2.0 14.0 


V/u.V 
V/uV 


VOUT 


Maximum Output Voltage Swing 


R L >2k 




±11.0 ±12.5 


±11.0 ±12.5 


V 


Is 


Supply Current 






8.5 11.0 


8.7 12.5 


mA 



The • denotes specifications which apply over the full operating 
temperature range. 

Note 1: Input Offset Voltage measurements are performed by automatic 
test equipment approximately 0.5 sec. after application of power. In 
addition, at T A = 25°C, offset voltage is measured with the chip heated to 
approximately 55°C to account for the chip temperature rise when the 
device is fully warmed up. 

Note 2: Long Term Input Offset Voltage Stability refers to the average 

trend line of Offset Voltage vs. Time over extended periods after the first 

30 days of operation. Excluding the initial hour of operation, changes in 

Vos during the first 30 days are typically 2.5uV. 

Note 3: This parameter is tested on a sample basis only. 

Note 4: 10Hz noise voltage density is sample tested on every lot with the 

exception of the S8 and S1 6 packages. Devices 1 00% tested at 1 0Hz are 

available on request. 

Note 5: Current noise is defined and measured with balanced source 
resistors. The resultant voltage noise (after subtracting the resistor noise 



on an RMS basis) is divided by the sum of the two source resistors to 
obtain current noise. Maximum 10Hz current noise can be inferred from 
100% testing at 1kHz. 

Note 6: Gain-bandwidth product is not tested. It is t 
and by inference from the slew rate measurement. 
Note 7: This parameter is not 100% tested. 
Note 8: The inputs are protected by back-to-back diodes. Current-limiting 
resistors are not used in order to achieve low noise. If differential input 
voltage exceeds ±1 ,8V, the input current should be limited to 25mA. 
Note 9: This parameter guaranteed by design, fully warmed up at T A = 
70°C. It includes chip temperature increase due to supply and load 
currents. 

Note 10: The LT1028/LT1128 are not tested and are not quality- 
assurance-sampled at -40°C and at 85°C. These specifications are 
guaranteed by design, correlation and/or inference from -55°C, 0°C, 
25°C, 70°C and /or 125°C tests. 



2-15 



LT1028/LT1128 



typical pcRFonmnncc charactcristics 



10Hz Voltage Noise Distribution 





130 




160 




140 


CO 


120 


• 






100 


o 






80 


ai 








ZD 


60 




40 




20 










1SH 






I I 

V s = t15V 
T A = 25°C 
500 UNITS 
MEASURED 
FROM 4 RUNS _ 




148 




















































7 


57 
































I 














8 

r 




2.1 




2J 





0.6 0.8 1.0 1.2 1.4 1.6 1.8_2.0 2.2 
VOLTAGE NOISE DENSITY (nM/fii) 



Wideband Noise, DC to 20kHz 



VERTICAL SCALE = 0.5nV/DIV 
HORIZONTAL SCALE = 0.5ms/DIV 



Wideband Voltage Noise 
(0.1 Hz to Frequency Indicated) 



EV S = *1 
"Ta = 25 


5V = 
















•c - 



















































































































































































































100 1k 10k 100k 1M 10M 
BANDWIDTH (Hz) 

LTtCOT112fl-TPC03 



Total Noise vs Matched Source 
Resistance 



Total Noise vs Unmatched 
Source Resistance 



Current Noise Spectrum 




1 3 10 30 100 300 1k 3k 10k 
MATCHED SOURCE RESISTANCE (Q) 

LT102W112S • TPC04 



1 3 10 30 100 300 1k 3k 10k 
UNMATCHED SOURCE RESISTANCE (£2) 



10 100 1k 10k 

FREQUENCY (Hz) 



0.1Hz tolOHz Voltage Noise 



V s = t15V 


















= 25 


'C 
























































1 




j 




j, j 


1, 











2 4 6 8 10 

TIME (SEC 



LT102a/Tl?B-TPCQ? 



0.01Hz tolHz Voltage Noise 



V S = ±15V 
T A = 25°C " 



20 40 60 
TIME (SEC) 



Voltage Noise vs Temperature 




-50 -25 25 50 75 100 125 
TEMPERATURE (°C) 

LTIQ3&1IZ8.TPC0S 



2-16 



UIhnSloB 



LT1028/LT1128 



TVPicni pcRFORmnncc chrrrctcristics 



Distribution of Input Offset Voltage 



20 
18 
16 
14 

? 12 
|2 10 
= 8 
6 
4 
2 




I I I 
V S = ±15V 
~T A =25°C 
Rnn IINITSTFSTF 














n 












FROM FOUR RUNS 






















*- 


















M 
















































































_ 


, 


















-50 -40-30 -20-10 10 20 30 40 50 
OFFSET VOLTAGE (nV) 

LTiw&ms-rpcio 



Warm-Up Drift 





24 


> 
3 


20 


C3 




s 


16 


o 
> 






12 






o 




rz 


8 


CO 




< 






4 



1 

V S = ±15V 
T A = 25°C 






















METAL C 


AN (H) P 


\CKAGE 














PLA 


L-IN-LIN 
STIC (N) 


" PACKAC 
OR CERD 


E 

P(J) 



1 2 3 4 5 

TIME AFTER POWER ON (MINUTES) 



Voltage Noise vs Supply Voltage 




±5 i10 i15 

SUPPLY VOLTAGE (V) 



Offset Voltage Drift with Temperature 
of Representative Units 




-50 -25 25 50 75 
TEMPERATURE (°C) 



100 125 



LT102ft'112S« TPC11 



Input Bias and Offset Currents Over 
Temperature 



60 

<l 

{2 50 
z 

□c 

§ 40 

o 

I 30 

o 

o 

< 20 



v s = 

V C M 


±15V 
= 0V 














































SCUR 


RENT 




















: SETC 


URREI 










OF 


I 





-50 -25 25 50 75 100 125 
TEMPERATURE (X) 

IT102&1IM-TPCU 



Supply Current vs Temperature 





















v 




V, 
























= ±5\ 




























































































-50 -25 25 50 75 100 125 
TEMPERATURE CC) 

O10Wm».TPC17 



Long-Term Stability of Five 
Representative Units 



-10 



I I I I I 
V s = i15V 
"T A = 25"C 
t = AFTER 1 DAY PRE-WARM 



























































S 




































f 

















































































2 3 4 5 

TIME (MONTHS) 

LH0MHtaflPC12 



Bias Current Over the Common- 
Mode Range 



e 60 
I 40 

I 20 

O 

CO 

™ -20 
=> 

Q_ 

5 -40 
-60 



POSITIVE INPUT CURRENT" 
(UNDERCANCELLEO) DEVICE. 




NEGATIVE INPUT CURRENT 
-(OVERCANCELLED) DEVICE- 

J I I L_ 



-15 -10 -5 5 10 15 
COMMON-MODE INPUT VOLTAGE (V) 



Output Short-Circuit Current 
vs Time 





50 


. — .<D 


40 


<3_ 3 

E o 


30 


— °= 




t ZJ 
lS ° 


20 


CC 1/3 
CC 


10 


ZD 




o 





E5 




o 
cc 


-10 


S> o 
i— 


-20 


cc ^ 

§1 


-30 


CO w 


-40 




-50 



Vs = ±15V 



12 3 

TIME FROM OUTPUT SHORT TO GROUND (MINUTES) 



XTffiAg 



2-17 



LT1028/LT1128 



TVPICftL pcRFORmnncc 



Gain vs Frequency 



160 

140 

120 

g 100 

I 80 
o 

S 60 

o 40 

: - 

20 

-20 

















1 1 








v s 


= ±15V 
= 25T " 
= 2k 
















T A 
R L 


























L 


1112 


s\ 


\l 


T102 


8 











































































































ILT1028 

Gain, Phase vs Frequency 



0.010.1 1 10 100 1k 10k100k1M 10M100M 




100k 1M 10M 
FREQUENCY (Hz) 



100M 



LT1028 

Capacitance Load Handling 



70 






80 


60 






70 


50 






60 




a: 






40 


CD 




50 


30 




HOO 


40 




a: 






20 


< 


> 


30 




CO 


o 




10 


< 




20 















10 


-10 











100 1000 
CAPACITIVE LOAD (pF) 



10000 



Gain Error vs Frequency 
Closed-Loop Gain = 1000 



LT1128 

Gain Phase vs Frequency 




1 10 
FREQUENCY (Hz) 



100k 1M 10M 
FREQUENCY (Hz) 



100M 



Voltage Gain vs Supply Voltage 



Voltage Gain vs Load Resistance 




LT1128 

Capacitance Load Handling 



70 






80 


60 






70 


50 






60 




cc 






40 


CO 




50 




Q 






30 


. ' 


OOH 


40 




en 






20 


< 


> 


30 




co 


O 




10 


£ 




20 

















10 


-10 











100 1000 
CAPACITIVE LOAD (pF) 

LTIOWIIM-TI'CM 



10000 



Maximum Undistorted Output 
vs Frequency 



2 5 



±5 ±10 ±15 

SUPPLY VOLTAGE (V) 

iWdwilM'TW* 



0.1 1 10 

LOAD RESISTANCE (kii) 

LT!0aVl1!8- TPcas 




100k 1M 
FREQUENCY (Hz) 



LTiozimze-TPCZ7 



2-18 



LT1028/LT1128 



TYPICAL P€RFORmnnC€ CHfiRnCT€RISTICS 



LT1028 

Large-Signal Transient Response 




IjiS/BIV 

A v = -1 . Rs = Rf = 2k, C F = 15pF 



lOZS/l12eG2fl 



LT1128 

Large-Signal Transient Response 




A V = -1,R S =*R F = 2k, C F = 30pF 



Closed-Loop Output Impedance 



100 

_ 10 

a 

o 

i 1 

a 

s 

£0.1 

Q. 
ZD 

o 

0.01 
0.001 



I 

lo = 1 mA 
V S = ±15V 
t. - wr. 


LT1128, 






A V 


+1000, 




LT1028 
















LT1128 




V = +5 








LT102B 







LT1028 

Small-Signal Transient Response 



-50mV 




0.2ps/DIV 
A v = -1 . Rs = Rf = 2k 
C F = 15pF, C L = 80pF 



LT1128 

Small-Signal Transient Response 




0.2MS/DIV 
A v =t1,C L = 10pF 



LT1128 

Slew Rate, Gain-Bandwidth Product 
vs Over-Compensation Capacitor 

1k 



LT1028 

Slew Rate, Gain-Bandwidth 
Product Over Temperature 





17 




16 


> 




ATE 


15 


cc 




S 






14 




13 



12 



Vs = 


±15V 


















^GE 


W 












FALL 
RISE 



















































80 i 
a 

o 

70 ^ 

s 

60 o 

50 f 
o 
40 I 



-50 -25 25 50 75 100 125 
TEMPERATURE (X) 

LT1O2B/112B-TPC30 

LT1128 

Slew Rate, Gain-Bandwidth 
Product Over Temperature 











FALL 


























RISE 












GBW 

















































































25 50 75 100 125 



LT102B/1128-TPC33 



LT1028 

Slew Rate, Gain-Bandwidth Product 
vs Over-Compensation Capacitor 



10 100 1k 10k 100k 1M 
FREQUENCY (Hz) 

LT102S/112S.TPC3* 




OVER-COMPENSATION CAPACITOR (pF) OVER-COMPENSATION CAPACITOR (pF) 

LT102B/1128-TPC35 LT1028/1 128 • TPCBB 



2-19 



LT1028/LT1128 



TVPicni pcRFORmnnce CHnnnacmsTics 



Common-Mode Limit Over 
Temperature 



_2-2 



Si 

O Q- 



1= 

O LU 

2 

1 























sv 














15V 










































I 










5VTC 


±15V 



































-50 -25 25 50 75 100 125 
TEMPERATURE (°C) 

LT1028 

Total Harmonic Distortion vs 
Frequency and Load Resistance 




10 

FREQUENCY (kHz) 



Common-Mode Rejection Ratio 
vs Frequency 



140 
120 

o 

* 100 

z 

o 

£ 80 
ix: 

60 

□ 
o 

1 40 
o 

I 20 
o 













v s = 
Ta = 


±15V 
25°C_ 
















LT1 


128\ 




T1028 





















































10 100 1k 10k 100k 1M 10M 
FREQUENCY (Hz) 

LTlOHfl 12B ■ TPC3B 

LT1028 

Total Harmonic Distortion vs 
Closed-Loop Gain 



0.0001 




100 1k 10k 100: 

CLOSED LOOP GAIN 

LT10Z»I12S-TPC41 



LT1128 

Total Harmonic Distortion vs 
Frequency and Load Resistance 



Power Supply Rejection Ratio 
vs Frequency 



160 
140 
120 
100 
80 
60 
40 
20 














Vs 


= ±15V 














= 25° 


















Ni 


GAT I 
PPLY 


It 








P0S 


itive 












su 


PPLY 



























































0.1 1 10 100 1k 10k 100k 1M 10M 
FREQUENCY (Hz) 

LTl028/1128-TPC3e 

High Frequency Voltage Noise 
vs Frequency 



i 

CO 

z 

o 1.0 



10k 



100k 
FREQUENCY (Hz) 



LT1128 

Total Harmonic Distortion vs 
Closed-Loop Gain 





100 1k 10k 1001 

CLOSED LOOP GAIN 

LTtiWIW-TPCM 



2-20 



LT1028/LT1128 



nppucOTions inFORmnnon-noise 



Voltage Noise vs Current Noise 

The LT1 028/LT1 1 28's less than 1 nV/VRz voltage noise is 
three times betterthan the lowest voltage noise heretofore 
available (on the LT1 007/1 037). A necessary condition for 
such low voltage noise is operating the input transistors at 
nearly 1 mA of collector currents, because voltage noise is 
inversely proportional to the square root of the collector 
current. Current noise, however, is directly proportional to 
the square root of the collector current. Consequently, the 
LT1028/LT1 128's current noise is significantly higher 
than on most monolithic op amps. 

Therefore, to realize truly low noise performance it is 
important to understand the interaction between voltage 
noise (e n ), current noise (l n ) and resistor noise (r n ). 

Total Noise vs Source Resistance 

The total input referred noise of an op amp is given by 

e, = [e n 2 + r n 2 + (l n R eq ) 2 ] 1/2 
where R eq is the total equivalent source resistance at the 
two inputs, and 

r n = V4kTR^ = 0.13VR^ in nVMtzat 25°C 

As a numerical example, consider the total noise at 1 kHz 
of the gain 1 000 amplifier shown below. 




R eq = 100£2 + 100ail 100k = 200O 

r n = 0.13V200 = 1.84nVVRz 

e n = 0.85nVVRz 

l n = 1.0pA/VRz 
e t = [0.85 2 + 1 .84 2 + (1 .0 x 0.2) 2 ] 1/2 = 2.04nWVHz 

Output noise = 1000 e t = 2.04uVA/Hz 

At very low source resistance (R eq < 40Q) voltage noise 
dominates. As R eq is increased resistor noise becomes the 



largest term, as in the example above, and the LT1028/ 
LT1128's voltage noise becomes negligible. As R eq is 
further increased, current noise becomes important. At 
1kHz, when R eq is in excess of 20k, the current noise 
component is largerthan the resistor noise. The total noise 
versus matched source resistance plot illustrates the 
above calculations. 

The plot also shows that current noise is more dominant 
at low frequencies, such as 1 0Hz. This is because resistor 
noise is flat with frequency, while the 1/f corner of current 
noise is typically at 250Hz. At 10Hz when R eq > 1k, the 
current noise term will exceed the resistor noise. 

When the source resistance is unmatched, the total noise 
versus unmatched source resistance plot should be con- 
sulted. Note that total noise is lower at source resistances 
below 1k because the resistor noise contribution is less. 
When R s > 1k total noise is not improved, however. This 
is because bias current cancellation is used to reduce 
input bias current. The cancellation circuitry injects two 
correlated current noise components into the two inputs. 
With matched source resistors the injected current noise 
creates a common-mode voltage noise and gets rejected 
by the amplifier. With source resistance in one input only, 
the cancellation noise is added to the amplifier's inherent 
noise. 

In summary, the LT1 028/LT1 128 are the optimum ampli- 
fiers for noise performance, provided that the source 
resistance is kept low. The following table depicts which 
op amp manufactured by Linear Technology should be 
used to minimize noise, as the source resistance is in- 
creased beyond the LT1 028/LT1 1 28's level of usefulness. 

Best Op Amp for Lowest Total Noise vs Source Resistance 



SOURCE RESIS- 


BEST OP AMP 


TANCE^) (Note 1) 


AT LOW FREQflOHz) 


WIDEBAND(lkHz) 


to 400 


LT1028/LT1128 


LT1028/LT1128 


400 to 4k 


LT1 007/1 037 


LT1028/LT1128 


4k to 40k 


LT1001 


LT1 007/1 037 


40k to 500k 


LT1012 


LT1001 


500k to 5M 


LT1012 or LT1055 


LT1012 


>5M 


LT1055 


LT1055 



Note 1 : Source resistance is defined as matched or unmatched, e.g., 
Rs = 1k means: 1k at each input, or 1 k at one input and zero at the other. 



2-21 



LT1028/LT1128 



— 



APPiicftTions inFORmRTion-noisc 



Noise Testing - Voltage Noise 

The LT1028/LT1128's RMS voltage noise density can be 
accurately measured using the Quan Tech Noise Analyzer, 
Model 51 73 or an equivalent noise tester. Care should be 
taken, however, to subtract the noise of the source resistor 
used. Prefabricated test cards for the Model 5173 set the 
device under test in a closed-loop gain of 31 with a 60Q 
source resistor and a 1 .8k feedback resistor. The noise of 
this resistor combination is 0.13V58 = 1.0nV/VHz. An 
LT1 028/LT1 1 28 with 0.85nV/Vfiz noise will read (0.85 2 + 
1 .0 2 ) 1/2 = 1 .31 nVA/iHz. For better resolution, the resistors 
should be replaced with a 1 0n source and 300Q feedback 
resistor. Even a 1 0Q resistor will show an apparent noise 
which is 8% to 10% too high. 

The 0.1Hz to 10Hz peak-to-peak noise of the LT1028/ 
LT1128 is measured in the test circuit shown. The fre- 
quency response of this noise tester indicates that the 
0.1 Hz corner is defined by only one zero. The test time to 
measure 0.1 Hz to 10Hz noise should not exceed 10 
seconds, as this time limit acts as an additional zero to 
eliminate noise contributions from the frequency band 
below 0.1 Hz. 



Measuring the typical 35nV peak-to-peak noise perfor- 
mance of the LT1028/LT1 128 requires special test pre- 
cautions: 

(a) The device should be warmed up for at least five 
minutes. As the op amp warms up, its offset voltage 
changes typically 10|iV due to its chip temperature 
increasing 30°C to 40°C from the moment the power 
supplies are turned on. In the 10 second measure- 
ment interval these temperature-induced effects can 
easily exceed tens of nanovolts. 

(b) For similar reasons, the device must be well shielded 
from aircurrentto eliminate the possibility of thermo- 
electric effects in excess of a few nanovolts, which 
would invalidate the measurements. 

(c) Sudden motion in the vicinity of the device can also 
"feedthrough" to increase the observed noise. 

A noise-voltage density test is recommended when mea- 
suring noise on a large number of units. A 10Hz noise- 
voltage density measurement will correlate well with a 
0.1 Hz to 10Hz peak-to-peak noise reading since both 
results are determined by the white noise and the location 
of the 1/f corner frequency. 



0.1Hz to 10Hz Noise Test Circuit 



0.1(iF 





1 100k 






|lOO!i 

L li 



4.7nF 



T 



VOLTAGE GAIN = 50,000 
' DEVICE UNDER TEST 



22nF 



NOTE ALL CAPACITOR VALUES ARE FOR ■=■ 
NONPOLARIZED CAPACITORS ONLY 



t VW — i 

0.1nF 



2.2uF 



T 



0.1Hz to 10Hz Peak-to-Peak 
Tester Frequency Response 




0.1 1.0 10 

FREQUENCY (Hz) 

LTIDIHIIV*' 



2-22 



LT1028/LT1128 



nppucmions inFonmnnon -noise 



Noise Testing - Current Noise 

Current noise density (l n ) is defined by the following 
formula, and can be measured in the circuit shown: 



ln.= 



[e no 2 - (31 x ■ 



20k x 31 




If the Quan Tech Model 51 73 is used, the noise reading is 
input-referred, therefore the result should not be divided 
by 31; the resistor noise should not be multiplied by 31. 

100% Noise Testing 

The 1 kHz voltage and current noise is 1 00% tested on the 
LT1 028/LT1 1 28 as part of automated testing; the approxi- 
mate frequency response of thefilters is shown. The limits 
on the automated testing are established by extensive 
correlation tests on units measured with the Quan Tech 
Model 5173. 



10Hz voltage noise density is sample tested on every lot. 
Devices 100% tested at 10Hz are available on request for 
an additional charge. 

1 0Hz current noise is not tested on every lot but it can be 
inferred from 100% testing at 1 kHz. A look at the current 
noise spectrum plot will substantiate this statement. The 
only way 10Hz current noise can exceed the guaranteed 
limits is if its 1/f corner is higher than 800Hz and/or its 
white noise is high. If that is the case then the 1 kHz test will 
fail. 

Automated Tester Noise Filter 




1k 10k 
FREQUENCY (Hz) 



nppuennons inFORmnnon 

General 

The LT1 028/LT1 1 28 series devices may be inserted di- 
rectly into OP-07, OP-27, OP-37, LT1007 and LT1037 
sockets with or without removal of external nulling com- 
ponents. In addition, the LT1 028/LT1 1 28 may be fitted to 
5534 sockets with the removal of external compensation 
components. 

Offset Voltage Adjustment 

The input offset voltage of the LT1 028/LT1 1 28 and its drift 
with temperature, are permanently trimmed at wafer test- 
ing to a low level. However, if further adjustment of Vqs is 
necessary, the use of a 1k nulling potentiometer will not 
degrade drift with temperature. Trimming to a value other 




than zero creates a drift of (V s/300)uV/ o C, e.g., if V s is 
adjusted to 300uV, the change in drift will be 1u.V/°C. 

The adjustment range with a 1k pot is approximately 

±1.1 my. 

Offset Voltage and Drift 

Thermocouple effects, caused by temperature gradients 
across dissimilar metals at the contacts to the input 



LT1028/LT1128 



flppucnTions inFORmnnon 

terminals, can exceed the inherent drift of the amplifier 
unless proper care is exercised. Air currents should be 
minimized, package leads should be short, the two input 
leads should be close together and maintained at the same 
temperature. 

The circuit shown to measure offset voltage is also used 
as the burn-in configuration for the LT1 028/LT1 1 28. 

Test Circuit for Offset Voltage 
and Offset Voltage Drift with Temperature 



10k" 




Unity-Gain Buffer Applications (LT1128 Only) 

When R F < 1 00X2 and the input is driven with a fast, large- 
signal pulse (>1V), the output waveform will look as 
shown in the pulsed operation diagram. 

„. .. .Rf ... 




During the fast feedthrough-like portion of the output, the 
input protection diodes effectively short the output to the 
input and acurrent, limited only by the output short-circuit 
protection, will be drawn by the signal generator. With R F 
> 500Q, the output is capable of handling the current 
requirements (l L < 20mA at 10V) and the amplifier stays 
in its active mode and a smooth transition will occur. 

As with all operational amplifiers when R F > 2k, a pole will 
be created with R F and the amplifier's input capacitance, 
creating additional phase shift and reducing the phase 
margin. A small capacitor (20pFto 50pF) in parallel with R F 
will eliminate this problem. 



2-24 



Frequency Response 

The LT1 028's Gain, Phase vs Frequency plot indicates that 
the device is stable in closed-loop gains greaterthan +2 or 
-1 because phase margin is about 50° at an open-loop 
gain of 6dB. In the voltage follower configuration phase 
margin seems inadequate. This is indeed true when the 
output is shorted to the inverting input and the noninvert- 
ing input is driven from a 50£2 source impedance. How- 
ever, when feedback is through a parallel R-C network 
(provided C F < 68pF), the LT1 028 will be stable because of 
interaction between the input resistance and capacitance 
and the feedback network. Larger source resistance at the 
noninverting input has a similar effect. The following 
voltage follower configurations are stable: 



33pF 




Another configuration which requires unity-gain stability 
is shown below. When C F is large enough to effectively 
short the output to the input at 15MHz, oscillations can 
occur. The insertion of Rs2 > 500n will prevent the 
LT1 028 from oscillating. When R S i > 500Q, the additional 
noise contribution due to the presence of Rs2 will be 
minimal. When R S i < 100Q, Rs2 is not necessary, be- 
cause Rsi represents a heavy load on the output through 
the C F short. When 1 00Q < R S1 < 500C2, R S2 should match 
Rsi . For example, R S i = Rs2 = 300i2 will be stable. The 
noise increase due to R S 2 is 40%. 



CI 




LT1028/LT1128 



nppucOTions inFORmnnon 

If Cf is only used to cut noise bandwidth, a similar effect 
can be achieved using the over-compensation terminal. 

The Gain, Phase plot also shows that phase margin is 
about 45° at gain of 10 (20dB). The following configura- 




tion has a high (=70%) overshoot without the 10pF 
capacitor because of additional phase shift caused by the 
feedback resistor - input capacitance pole. The presence 
of the 10pF capacitor cancels this pole and reduces 
overshoot to 5%. 

Over-Compensation 

The LT1028/LT1 128 are equipped with a frequency over- 
compensation terminal (pin 5). A capacitor connected 
between pin 5 and the output will reduce noise bandwidth. 
Details are shown on the Slew Rate, Gain-Bandwidth 
Product vs Over-Compensation Capacitor plot. An addi- 
tional benefit is increased capacitive load handling capa- 
bility. 



TVPicni fippucmion 

Strain Gauge Signal Conditioner with Bridge Excitation Low Noise Voltage Regulator 



28V 10 




LT1028/LT1128 



TYPicm nppLicnnon 

Paralleling Amplifiers to Reduce Voltage Noise 




1 . ASSUME VOLTAGE NOISE OF LT1028 AND 7.5S2 SOURCE RESISTOR = 0.9nV/Vfiz. 

2. GAIN WITH n LT1028S IN PARALLEL = n x 200. 

3. OUTPUT NOISE = fc 200 x 0.9nV/VHz. 

4. INPUT REFERRED NOISE = OUTPUT NOISE = ^ nVAfli. 

5. NOISE CURRENT AT INPUT INCREASES Vn TIMES. 



6. IF n = 5, GAIN = 1000, 



BANDWIDTH = 1 MHz, RMS NOISE, DC TO 1 MHz = ^= = 0.9^V. 



10i! 
j-AAA,- 



Phono Preamplifier 





0.33|iF 

— 1 1— OUTPUT 



ALL RESISTORS METAL FILM 



- MAG PHONO 
INPUT 



Tape Head Amplifier 



OTjiF 



499S2 

I 1 I 




OUTPUT 



ALL RESISTORS METAL FILM 



Low Noise, Wide Bandwidth 




GAIN = 1000, BANDWIDTH = 1MHz 
INPUT REFERRED NOISE = 1.5nV/VRzAT 1kHz 
WIDEBAND NOISE -DC to 1 MHz = 3nV BMS 
IF BW LIMITED TO DC TO 100kHz = 0.55)jV BM s 



Gyro Pick-Off Amplifier 



GYRO TYPICAL- 
NORTHROP CORP. 
GR-F5AH7-58 




OUTPUT TO SYNC 
DEMODULATOR 



2-26 



LT1028/LT1128 



TVPICRL RPPLICflTIOn 



01 
0.047 



Super Low Distortion Variable Sine Wave Oscillator 

| R1 1 C2 

0.047 

» 20Q 2i,\ II 
-^-VW^AfC- 1 



Chopper-Stabilized Amplifier 




1V RMS OUTPUT 
1.5kHz TO 15kHz 



f- 



1 



2 nKj 
WHERE R1C1 = R2C2 
4.7k 
-Wv- 15V 



'LT1 004-1 ,2V 



MOUNT 1N414BS 
IN CLOSE PROXIMITY 



<0.0018% DISTORTION AND NOISE. 
MEASUREMENT LIMITED BY RESOLUTION OF 
HP339A DISTORTION ANALYZER 



1O?Sfl1Z8TA10 




red Detector 



IR " 

RADIATION - 




PHOTO- VV _ 

electric rs 

PICK-OFF 



2-27 



LT1Q28/LT1128 



scHcmnTic DinGRnm 



NULL 




C2 = 275pFfor LT1128 



2-28 



LT1112/LT1114 



TECHNOLOGY Dual/Quad Low Power 

Precision, Picoamp Input Op Amps 



F€flTUR€S 



■ S8 Package - Standard Pinout 

■ Offset Voltage - Prime Grade: 60uV Max 

■ Offset Voltage - Low Cost Grade 

(Including Surface Mount Dual/Quad): 75uV Max 

■ Offset Voltage Drift: 0.5u.V/°C Max 

■ Input Bias Current: 250pA Max 

■ 0.1Hzto10Hz Noise: 0.3uV P .p, 

■ Supply Current per Amplifier:' 1 

■ CMRR: 120dB Min 

■ Voltage Gain: 1 Million Min 

■ Guaranteed Specs with +1 .OV Supplies 

■ Guaranteed Matching Specifications 

■ LT1114 in Narrow Surface Mount Package 




nppucOTions 



Picoampere/Microvolt Instrumentation 
Two and Three Op Amp Instrumentation Amplifers 
Thermocouple and Bridge Amplifiers 
Low Frequency Active Filters 
Photo Current Amplifiers 
Battery-Powered Systems 



DCSCRIPTIOH 

The LT1 1 1 2 dual and LT1 1 1 4 quad op amps achieve a new 
standard incombining low cost and outstanding precision 
specifications. 

The performance of the selected prime grades matches or 
exceeds competitive devices. In the design of the LT1 1 1 2/ 
LT1 1 1 4 however, particular emphasis has been placed on 
optimizing performance in the low cost plastic and SO 
packages. For example, the 75uV maximum offset voltage 
in these low cost packages is the lowest on any dual or 
quad non-chopper op amp. 

The LT1112/LT1114 also provide a full set of matching 
specifications, facilitating their use in such matching 
dependent applications as two and three op amp instru- 
mentation amplifiers. 

Another set of specifications is furnished at ±1 V supplies. 
This, combined with the low 320uA supply current per 
amplifier, allows the LT1112/LT1114 to be powered by 
two nearly discharged AA cells. 

Protected by U.S. Patents 4.575,685; 4.775.884 and 4.837,496 



Dual Output, Buffered Reference (On Single 3V Supply) 




TOTAL SUPPLY CURRENT = 700(iA 

2V REFERENCE: SOURCES 1.7mA, SINKS 5mA 

OPTIONAL R x = 300Q INCREASES SOURCE 

CURRENT TO 5mA 

0.765V REFERENCE: SOURCES 5mA, 

SINKS 0.5mA 

TEMPERATURE COEFFICIENT LIMITED 
BY REFERENCE = 20ppm/°C 
MINIMUM SUPPLY = 2.7V 



Distribution of Input Offset Voltage 
(In All Packages) 



30 
25 

f= 20 
z 

=> 

£ 15 
z 

£ 10 
5 



V S = ±15V 
T A = 25"C 



-70 -50 -30 -10 10 30 50 70 
INPUT OFFSET VOLTAGE ( M V) 

LT111Z/14.TAK 



jjvm 



2-29 



LT1112/LT1114 



rbsolutc mnximum RnunGs 

Supply Voltage ±20V 

Differential Input Current (Note 1) ±10mA 

Input Voltage (Equal to Supply Voltage) +20V 

Output Short-Circuit Duration Indefinite 

Storage Temperature Range -65°C to 150°C 

Lead Temperature (Soldering, 10 sec) 300°C 



Operating Temperature Range 
LT1112AM/LT1112M 

LT1 1 1 4AM/LT1 114M - 55°C to 1 25°C 

LT1 1 1 2AC/LT1 1 1 2C/LT1 1 1 2S8 

LT1 1 1 4AC/LT1 1 1 4C/LT1 1 1 4S -40°Cto 85°C 



PRCKRG€/ORD€R mFORmiRTIOn 



OUT A (T 
-IN A [7 
+INA |T 



TOP VIEW 
^ 



JJ v* 

JJ OUTB 
T| -IN B 
~T\ +INB 



J8 PACKAGE N8 PACKAGE 

8-LEAD CERAMIC DIP 8-LEAD PLASTIC DIP 
Tjmax = '60»C, e JA =100°C/W(J8) 
Tjmax = 1«-C e J4 =130'C/W(N8) 



ORDER PART 
NUMBER 



LT1112AMJ8 
LT1112MJ8 
LT1112ACN8 
LT1112CN8 




B PACKAGE 
8-LEAD PLASTIC SO 

Tjmax=140°C, e JA = 190°C/W 



ORDER PART 
NUMBER 



LT1112S8 



S8 PART MARKING 



1112 




ORDER PART 
NUMBER 



LT1114AMJ 
LT1114MJ 
LT1114ACN 
LT1114CN 



J PACKAGE N PACKAGE 

14-LEAD CERAMIC DIP 14-LEAD PLASTIC DIP 

Tjmax = 160-C, 9 JA = 80°C/W(J) 
TjMAX=140-C, e JA = 110°C/W(N) 




S PACKAGE 
16-LEAD PLASTIC SO (NARROW) 
Tjmax = 140 i C, ejA=150°C/W 



ORDER PART 
NUMBER 



LT1114S 



Consult factory tor Industrial grade parts. 



€l€CTRICfll CHARACT6RISTICS V s = ±15V, V C m = 0V, T A = 25 C, unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS (Note 2) 


LT1112AM/AC 
LT1114AM/AC 
MIN TYP MAX 


LT1112M/C/S8 
LT1114M/C/S 
MIN TYP MAX 


UNITS 


Vos 


Input Offset Voltage 


V S ?±1.0V 


20 60 
40 110 


25 75 
45 130 


u.V 

U.V 


AV 0S 

ATime 


Long Term Input Offset 
Voltage Stability 




0.3 


0.3 


uV/Mo 


I OS 


Input Offset Current 


LT1114S 


50 180 


60 230 
75 330 


pA 
PA 


Ib 


Input Bias Current 


LT1114S 


±70 ±250 


±80 ±280 
±100 ±450 


pA 
pA 


e n 


Input Noise Voltage 


0.1Hzto10Hz (Note 9) 


0.3 0.9 


0.3 0.9 


uV P .p 



2-30 



LT1112/LT1114 



€l€CTRICfll CHRRRCT€RISTICS Vs = +15V, Vqm = OV, Ta ■ 25 C, unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS (Note 2) 


LT1112AM/AC 
LT1114AM/AC 
MIN TYP MAX 


LT1112M/C/S8 
LT1114M/C/S 
MIN TYP MAX 


UNITS 




Input Noise Voltage Density 


f = 1 0Hz (Note 9) 
f = 1000Hz (Note 9) 




16 
14 


28 
18 


16 28 
14 18 


nV/S/Hz 
nV/VHz 


j 


Input Noise Current 


0.1Hz to 10Hz 


2.2 


2.2 


pAp-p 


_ 1 


Input Noise Current Density 


f = 10Hz 
f = 1000Hz 


0.030 
0.008 


0.030 
0.008 


pA/VHz 
pAA/Hz 


VCM 


Input Voltage Range 

r o a 




±13.5 


±14.3 




±13.5 


±14.3 


V 


CMRR 


Common-Mode Rejection Ratio 


V CM = ±13.5V 


120 


136 




115 


136 


dB 


PSRR 


Power Supply Rejection Ratio 


V s = ±1.0Vto±20V 


116 


126 




114 


126 


dB 




IVIIMIII1UIM ouppiy VUlldyc 




±1.0 


±1.0 


y 


"IN 


Input Resistance 
Differential Mode 
Common Mode 


(Note 3) 


20 


50 
800 




15 


40 
700 


Mn 
Gn 


A\/OL 


Large-Signal Voltage Gain 


V = ±12V, R L = 10kfl 
V = ±10V, R L = 2k£2 


1000 
800 


5000 
1500 




800 
600 


5000 
1300 


V/mV 
V/mV 


VOUT 


Output Voltage Swing 


R L = 10kn 
R L = 2kfi 


±13.0 
±11.0 


±14.0 
±12.4 




±13.0 ±14.0 
±11.0 ±12.4 


V 
V 


SR 


Slew Rate 





0.16 


0.30 




0.16 


0.30 


V7|iS 


GBW 


Gain-Bandwidth Product 


f = 10kHz 


450 


750 




450 


750 


kHz 


Is 


Supply Current per Amplifier 


V S = ±1.0V 




350 
320 


400 
370 


350 450 
320 420 


pA 
MA 




Channel Separation 


f = 10Hz 


150 


150 


dB 


AV 0S 


Offset Voltage Match 


(Note 5) 




35 


100 


40 130 


nv 


Al B * 


Noninverting Bias Current Match 
(Notes 5, 6) 


LT1114S 




100 


450 


100 500 
120 680 


PA 
PA 


ACMRR 


Common-Mode Rejection Match 


(Notes 5, 7) 


117 


136 




113 


136 


dB 


APSRR 


Power Supply Rejection Match 


(Notes 5, 7) 


114 130 


112 130 


dB 


€l€CTRICfll CHRRRCT€RISTICS v s =±i 5 v,- 


55 C < T A < 1 25 C. unless otherwise noted. 




SYMBOL 


PARAMETER 


CONDITIONS (Note 2) 


LT1112AMJ8 
LT1114AMJ 
MIN TYP MAX 


LT1112MJ8 
LT1114MJ 
MIN TYP MAX 


UNITS 


Vos 


Input Offset Voltage 


V S = ±1.2V 






35 
60 


120 
220 


45 150 
70 260 


uv 

M-V 


AV 0S 
ATemp 


Average Input Offset Voltage Drift 


(NoteS) 






0.15 


0.5 


0.20 0.75 


HV/°C 


!os 


Input Offset Current 









80 


400 


100 500 


PA 


Ib 


Input Bias Current 








±150 


±600 


±170 ±700 


PA 


Vcm 


Input Voltage Range 






±13.5 


±14.1 




±13.5 


±14.1 


V 


CMRR 


Common-Mode Rejection Ratio 


V CM = ±13.5V 




116 


130 




111 


130 


dB 


PSRR 


Power Supply Rejection Ratio 


V s = ±1.2Vto±20V 




112 


124 




110 


124 


dB 


Avol 


Large-Signal Voltage Gain 


V = ±12V, R L = 10k£2 
V = ±10V, R L = 2k£2 




500 
200 


2500 
600 




400 
170 


2500 
500 


V/mV 
V/mV 



JTWM 



2-31 



LT1112/LT1114 



typical pcRFonmnncc cHnnncTcmsTics 



Input Bias and Offset Current, 
Noninverting Bias Current Match 
vs Temperature 



_ 200 

















> 




















Is (U 

raw) 


JDFR 




LLED 








NCELLED) 






Vs 


±15\ 















-75 -50 -25 25 50 75 100 125 
TEMPERATURE (°C) 

inraatxani 

Drift with Temperature 
LT1112N8/J8, LT1114J 



850 OP AMP 
-100 LT1112J 

165LT1112N 
_an i Tind.i 


>T 
i - 


ISTH 








15V 


S 


r 


i_ 






































































































■ 











-0.8 -0.6 -0.4 -0.2 0.2 0.4 0.6 0.8 
OFFSET VOLTAGE DRIFT WITH TEMPERATURE ((iWC) 

LTIIIZ/U-TPCW 



Distribution of Offset 
Voltage Match 





— 
=±1 

= 25 




5V 



































































































-100-80-60-40-20 20 40 60 80 100 
AV 0S . OFFSET VOLTAGE MATCH (j.V) 

LT11 12/14 -TPC07 



Input Bias Current Over 
Common-Mode Range 



150 
100 

; 50 
i 
|-50 
-100 
-150 




DEVICE WITH POSITIVE INPUT CURRENT 

I I I I I 
-DEVICE WITH NEGATIVE INPUT CURRENT 




-15 -10 -5 5 10 15 
COMMON-MODE INPUT VOLTAGE (V) 

LT1112/U-1PCC2 

Drift with Temperature 
LT1112S8, LT1114N/S 



960 OP AMPS TESTED 




V s = t15V 


240 LT1112S8 
80LT1114N 










40 LT 


1114S 






















































































_ 


L 









-1.4 -1.0 -0.6 -0.2 0.2 0.6 1.0 1.4 
OFFSET VOLTAGE DRIFT WITH TEMPERATURE ((iWC) 



LT1112/14-TPC05 



Distribution of Offset Voltage 
Match Drift (LT1112J8, LT1112N8, 
LT1114J Packages) 



342 


= t15V 
PAIRS TES 


TED 





































































































-0.8 -0.6 -0.4 -0.2 0.2 0.4 0.6 0.8 
OFFSET VOLTAGE MATCH DRIFT (nWC) 

IT1112/H-TPCW 



Distribution of Input Bias Current 
(In All Packages Except LT1114S) 



V s = i15V 
T A = 25°C 







































































-300 -200 -100 100 200 300 
INPUT BIAS CURRENT (pA) 



Distribution of Offset Voltage at 
V s = -1.0V (In All Packages) 



30 
25 

F? 20 
z 

=) 

° 15 
z 

o 

2 10 

5 



-80 -60 -40 -20 20 40 60 80 100 
INPUT OFFSET VOLTAGE ( M V) 

LT1 112(14 -TPC08 

Distribution of Offset Voltage 
Match Drift (LT1112S8, LT1114N, 
LT1114S Packages) 





= 25° 


C ■ 


























































































■ 



20 



364 


I15V 
PAIR 


TES 


TED 
















f 


























-r 














— i 



-1.6 -1.2 -0.8 -0.4 0.4 0.8 1.2 1.f 
OFFSET VOLTAGE MATCH DRIFT (nV/"C) 



LTmi/U-TPCM 



2-34 



LT1112/LT1114 



€l€CTRICRl CHRRRCT6RISTKS 



V s = ±15V, -40°C < T A < 85°C, (Note 10) 



SYMBOL 


PARAMETER 


CONDITIONS (Note 2) 


LT1112ACN8 
LT1114ACN 
MIN TYP MAX 


LT1112N8/S8 
LT1114CN/S 
MIN TYP MAX 


UNITS 


Vos 


Input Offset Voltage 


LT1112N8 

LT1112S8, LT1114N/S 
Vs = ±1.2V 


• 
* 




30 
40 
55 


110 
135 
200 




35 

AC 

45 
60 


135 
160 
240 


MV 
uV 
u.V 


AVqs 
ATemp 


Average Input Offset Voltage Drift 


U1112N8 

I T1112SR IT1114N/S 


• 





0.15 
0.30 


0.50 
1.10 




0.20 
0.40 


0.75 
1.30 


uV/°C 

nv/°c 


I OS 


Input Offset Current 


IT1114S 

I— I I l I HO 


• 




70 


330 




85 
110 


400 
600 


DA 
PA 


In 


. 

Innnt Riac; nnrrpnt 

IIILJUl UluO UUlldll 


L 1 1 1 1 4o 


• 




±110 


±500 




±120 
-t-i^n 

X 1 ou 


±550 

XOUU 


dA 
PA 


V CM 








±13.5 


±14.1 




X I 0.0 


x m. i 




v 


CMRR 


Common-Mode Rejection Ratio 


— ^ 1 J. J V 




117 


132 




112 


132 




dB 


PSRR 


Power Supply Rejection Ratio 


V s = ±1.2Vto±20V 




113 


125 




111 


125 




dB 


Avol 


Large-Signal Voltage Gain 


V = ±12V, R L = 1 0k£l 
V = ±10V, R L = 2kn 




700 
400 


3300 
1100 




600 
300 


3300 
900 




V/mV 
V/mV 


VOUT 


Output Voltage Swing 


R L = 10kn 




±13.0 


±13.85 




±13.0 


±13.85 




V 


SR 


Slew Rate 






0.13 


0.24 




0.13 


0.24 




V/|os 


Is 


Supply Current per Amplifier 








370 


450 




370 


510 


MA 


AV 0S 


Offset Voltage Match 
(Note 5) 


LT1112N8 

LT1112S8, LT1114N/S 






50 
60 


180 

230 




60 
70 


225 
270 


nv 
nv 




Offset Voltage Match Drift 
(Notes 5) 


LT1112N8 

LT1112S8, LT1114N/S 






0.2 
0.4 


0.7 
1.6 




0.3 
0.5 


1.0 
1.9 


uV/'C 
|iV/°C 


Mb* 


Noninverting Bias Current Match 
(Notes 5, 6) 


LT1114S 




140 660 




155 
190 


770 
1300 


PA 
PA 


acmrr 


Common-Mode Rejection Ratio 


(Notes 5, 7) 




113 


133 




109 


133 




dB 


APSRR 


Power Supply Rejection Ratio 


(Notes 5, 7) 


• 


110 


127 




107 


127 




dB 



The • denotes specifications which apply over the operating temperature 
range. 

Note 1: Differential input voltages greater than 1 V will cause excessive 
current to flow through the input protection diodes unless limiting 
resistance is used. 

Note 2: Typical parameters are defined as the 60% yield of parameter 
distributions of individual amplifiers; i.e., out of 1 00 LT1 1 14s (or 1 00 
LT1112S) typically 240 op amps (or 120) will be better than the indicated 
specification. 

Note 3: This parameter Is guaranteed by design and is not tested. 

Note 4: Offset voltage, supply current and power supply rejection ratio 

are measured at the minimum supply voltage. 

Note 5: Matching parameters are the difference between amplifiers A and 

D and between B and C on the LT11 14; between the two amplifiers on the 

LT1112. 



Note 6: This parameter is the difference between two noninverting 
input bias currents. 

Note 7: ACMRR and APSRR are defined as follows: (1) CMRR and 
PSRR are measured in |iV/V on the individual amplifiers. (2) The 
difference is calculated between the matching sides in u.V/V. (3) The 
result is converted to dB. 
Note 8: This parameter is not 100% tested. 

s 9: These parameters are not tested. More than 99% of the op 
is tested during product characterization have passed the 
maximum limits. 100% passed at 1kHz. 
Note 10: The LT1 1 1 2/LT1 1 1 4 are not tested and are not quality 
assurance sampled at -40°C and at 85°C. These specifications are 
guaranteed by design, correlation and/or inference from -55°C, 0°C, 
25°C, 70°C and/or 125°C tests. 



2-33 



LT1112/LT1114 



€L€CTRICRL CHARACTERISTICS V s = +15V, -55°C < T A < 125°C, unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS (Note 2) 


LT1112AMJ8 
LT1114AMJ 
MIN TYP MAX 


LT1112MJ8 
LT1114MJ 
MIN TYP MAX 


UNITS 


VOUT 


Output Voltage Swing 


R L = 10kQ 




±13.0 ±13.85 


±13.0 


±13.85 




V 


SR 


Slew Rate 






0.12 0.22 


0.12 


0.22 




V/us 


Is 


Supply Current per Amplifier 






380 


460 




380 


530 


pA 


AV 0S 


Offset Voltage Match 


(Note 5) 




55 


200 




70 


240 


U.V 




Offset Voltage Match Drift 


(Notes 5, 8) 




0.2 


0.7 




0.3 


1.0 


M.V/°C 


Al B + 


Noninverting Bias Current Match 


(Notes 5, 6) 




150 


750 




170 


850 


PA 


ACMRR 


Common-Mode Rejection Ratio 


(Notes 5, 7) 




112 130 


106 


130 




dB 


apsrr 


Power Supply Rejection Ratio 


(Notes 5, 7) 




109 126 


106 


126 




dB 


€l€CTRICAl CHRRRCT€RISTICS V s = 15V C T A 70 C. unless otherwise noted. 








LT1112ACN8 


LT1112N8/S8 




SYMBOL 


PARAMETER 


CONDITIONS (Note 2) 


LT1114ACN 
MIN TYP MAX 


LT1114CN/S 
MIN TYP MAX 


UNITS 


Vos 


Input Offset Voltage 


LT1112N8 

LT1112S8, LT1114N/S 




27 
35 
50 


100 
125 
175 




30 
45 
65 


125 
150 
210 


nv 

uV 
U.V 






V S = +1.2V 






AV 0S 
ATemp 


Average Input Offset Voltage Drift 
(Note 8) 


LT1112N8 

LT1112S8, LT1114N/S 




0.15 
0.3 


0.5 
1.1 




0.2 
0.4 


0.75 
1.3 


u.v/°c 

uV/°C 






los 


Input Offset Current 


LT1114S 




60 


220 


70 
90 


290 
420 


PA 
PA 


ft 


Input Bias Current 






±80 


±300 




±90 


±350 


PA 




LT1114S 








±115 


±550 


PA 


V C M 


Input Voltage Range 






±13.5 ±14.2 


±13.5 


±14.2 




V 


CMRR 


Common-Mode Rejection Ratio 


V CM = ±13.5V 




118 133 


113 


133 




dB 


PSRR 


Power Supply Rejection Ratio 


V s = ±1.2Vto ±20V 




114 125 


112 


125 




dB 


Avol 


Large-Signal Voltage Gain 


V = ±12V, R L = 10kf2 




800 4000 




650 


4000 




V/mV 






V = ±10V, R L = 2kQ 




500 1300 




400 


1000 




V/mV 


VOUT 


Output Voltage Swing 


R L = 10kn 




±13.0 ±13.9 


±13.0 


±13.9 




V 


SR 


Slew Rate 






0.14 0.27 


0.14 


0.27 




V/ps 


Is 


Supply Current per Amplifier 






370 


440 




370 


500 


ma 


AV 0S 


Offset Voltage Match 
(Note 5) 


LT1112N8 

LT1112S8. LT1114N/S 




45 
55 


170 
220 




55 
70 


210 
270 


nv 
uV 




Offset Voltage Match Drift 
(Notes 5, 8) 


LT1112N8 

LT1112S8, LT1114N/S 




0.2 
0.4 


0.7 
1.6 




0.3 
0.5 


1.0 
1.9 


u.V/°C 
u.V/°C 


AI B + 


Noninverting Bias Current Match 
(Notes 5, 6) 


LT1114S 




120 


530 




135 
160 


620 
880 


PA 
PA 


ACMRR 


Common-Mode Rejection Ratio 


(Notes 5, 7) 




114 134 


109 


134 




dB 


APSRR 


Power Supply Rejection Ratio 


(Notes 5, 7) 




110 128 


108 


128 




dB 



2-32 



LT1112/LT1114 



tvpicrl P€RFonmnnc€ CHnnnacMSTics 



Noise Spectrum 




10 100 
FREQUENCY (Hz) 



0.1Hz to 10Hz Noise 



V S = ±15V 
T A = 25"C 



LTtnzin.Tpcto 



TIME (SEC) 



0.01Hz to 1 Hz Noise 



V s -±1 
T A = 25 


5V 
'C 














M 



































40 60 
TIME (SEC) 



80 



100 



LT11I2-U.TTC11 



Warm-Up Drift 



S 2 

b 

1 



V s = ±1 
T A = 25 


5V 
"C 




















LT111! 


S8, LT11 


14N/S PA 


CKAGES 








T1114J PACKAGE- 








1 

8, N8 PACKAGES 











0.5 1.0 1.5 2.0 2.5 
TIME AFTER POWER ON (MINUTES) 

ITI112/H'TPC13 

Minimum Supply Voltage vs Temp 
Voltage Gain at Minimum Supply 
Voltage 



Long Term Stability of Three 
Representative Units 



V S = t 
T A = 2 


15V 
5"C 








_2A_ 












_3A 












2B 












1A 












-3B- 








■ 




1B 















12 3 4 
TIME (MONTHS) 



LT111Z/14-TPC14 



Common-Mode Range and 
Voltage Swing with Respect to 
Supply Voltages 



25 50 75 
TEMPERATURE (°C) 



25 25 75 

TEMPERATURE (°C) 



Supply Current per Amplifier 
vs Supply Voltage 





















T A = 125°C 
















T A = 25°C 








T A = -55°C 







±5 ±10 ±15 ±2( 

SUPPLY VOLTAGE (V) 

LT111M4.TPC15 




Output Voltage Swing 
vs Load Current 















v s = « 

.T A = 2 
MAX 1 


1VTO! 

5°C 
AT±1 
AT±1 


20V 

/ = 1.3n 
5V = 3rr 








A 
A 























































-6 -3 3 6 
SINK SOURCE 
OUTPUT CURRENT (mA) 



LTIIWfll-WCU 



2-35 



LT1112/LT1114 



TVPicni p€RFORmnnce chrrrctcristics 



Voltage Gain Voltage Gain vs Frequency Gain, Phase Shift vs Frequency 




-15 -10 -5 5 10 15 0.01 0.1 1 10 100 1k 10k 100k 1M 10M 0.01 0.1 1 10 

OUTPUT VOLTAGE (V) FREQUENCY (Hz) FREQUENCY (MHz) 

enMH*iMi 

U111W4.TPC19 k.T11t2m-TPCW 



Common-Mode Rejection 
vs Frequency 



Power Supply Rejection 
vs Frequency 



Channel Separation vs Frequency 



140 

120 
100 
80 
60 
40 
20 














±15V 

25% _ 











































































100 1k 10k 100k 1M 
FREQUENCY (Hz) 

LT1112/14.TPCW 



Slew Rate, Gain-Bandwidth 
Product and Phase Margin 
vs Temperature 





















s 


LEW. 










































<j)m 








































GBW 







































140 
120 
100 



g 40 
o 

20 













v s = 
T* = 


±15V 
25% 








NEGAl 
SUPPL 


IVE 

Y 























P0S 

su 


TIVE 
PPLY 







































0.1 1 10 100 1k 10k 100k 1M 
FREQUENCY (Hz) 

LT11T2/14-TPCM 



Closed-Loop Output Impedance 



-50 -25 25 50 75 100 125 
TEMPERATURE (%) 



100 

a a 10 

m E 

70 1 X 1 
=5 1 

„ m 0.1 

60 o ^ 
o 

0.01 
0.001 



V S = ±15V 
T fl = 25% 






















A V 


100/ 


A V 













































1 10 100 1k 10k 100k 1M 
FREQUENCY (Hz) 

LTt1!3/14-TPC2S 




AMP 1 IN UNITY-GAIN 
'20V P .p, R[_ = 2k 
AMP 2 IN GAIN = 1000 
Rs = 100£2, R F = 100k 



10 100 1k 10k 100k 1M 
FREQUENCY (Hz) 

LT1I12/14-TPC24 



Capacitive Loading Handling 



120 

100 

i? 80 
o 

§ 60 
« 

UJ 

S 40 
20 




V s = ±15V 
T s = 25% 




































A V = 


4-1 / 














Av 


10 

















0.00001 0.0001 0.001 0.01 0.1 1 10 
CAPACITIVE L0A0 ftiF) 



2-36 



LT1112/LT1114 



TVPICflL P€RFORmnnC€ CHRRRCTCRISTKS 



Small-Signal Transient Response 



Large-Signal Transient Response 




C L = 5O0pF 
V S = ±15V 



Undistorted Output Voltage 
vs Frequency 




10 100 
FREQUENCY (kHz) 



RPPUCRTIOnS IRFORmRTIOn 

The LT1112 dual and LT1114 quad in the plastic and 
ceramic DIP packages are pin compatible to and directly 
replace such precision op amps as the OP-200, OP-297, 
AD706 duals and OP-400, OP-497, AD704 quads with 
improved price/performance. 

The LT1112 in the S8 surface mount package has the 
standard pin configuration, i.e., the same configuration as 
the plastic and ceramic DIP packages. 

The LT1114 quad is offered in the narrow 16-pin surface 
mount package. All competitors are in the wide 16-pin 
package which occupies 1 .8 times the area of the narrow 
package. The wide package is also 1 .8 times thicker than 
the narrow package. 



the input is driven by a fast large-signal pulse (>1 V), the 
input protection diodes effectively short the output to the 
input during slewing, and a current, limited only by the 
output short-circuit protection, will flow through the 
diodes. 

The use of a feedback resistor is recommended because 
this resistor keeps the current below the short-circuit limit, 
resulting in faster recovery and settling of the output. 

The input voltage of the LT1 1 1 2/1 1 1 4 should never exceed 
the supply voltages by more than a diode drop. However, 
the example below shows that as the input voltage exceeds 
the common-mode range, the LT1112's output clips 
cleanly, without any glitches or phase reversal. The OP-297 
exhibits phase reversal. The photos also illustrate that both 
the input and output ranges of the LT1112 are within 



The inputs of the LT1 112/1114 are protected with back-to- 
back diodes. In the voltage follower configuration, when 

Voltage Follower with Input Exceeding the Common-Mode Range (Vs = ±5V) 





INPUT: ±5.2V Sine Wave 




LT11 12 Output 



OP-297 Output 



2-37 



LT1112/LT1114 



nppLicnnons inFonmflTion 

800mV of the supplies. The effect of input and output 
overdrive on the other amplifiers in the LT1112 or 
LT1114 packages is negligible, as each amplifier is 
biased independently. 

Advantages of Matched Dual and Quad Op Amps 

In many applications the performance of a system de- 
pends on the matching between two operational amplifi- 
ers rather than the individual characteristics of the two op 
amps. Two or three op amp instrumentation amplifiers, 
tracking voltage references and low drift active filters are 
some of the circuits requiring matching between two op 
amps. 

The well-known triple op amp configuration illustrates 
these concepts. Output offset is a function of the differ- 
ence between the offsets of the two halves of the LT1 1 1 2. 
This error cancellation principle holds for a considerable 
number of input referred parameters in addition to offset 
voltage and its drift with temperature. Input bias current 
will be the average of the two noninverting input currents 
(Ib + ). The difference between these two currents (AIb + ) is 
the offset current of the instrumentation amplifier. Com- 
mon-mode and power supply rejections will be dependent 
only on the match between the two amplifiers (assuming 
perfect resistor matching). 

The concepts of common-mode and power supply rejec- 
tion ratio match (ACMRR and APSRR) are best demon- 
strated with a numerical example: 

Assume CMRR A = + 1 jxV/V or 120dB, 
and CMRR B = +0.75^V/V or 122.5dB, 
then ACMRR = 0.25uV/V or 132dB; 
if CMRR B = -0.75p.V/V which is still 122.5dB, 
then ACMRR = 1.75uV/Vor115dB. 

Clearly the LT1 1 1 2/LT1 1 1 4, by specifying and guarantee- 
ing all of these matching parameters, can significantly 
improve the performance of matching-dependent 
circuits. 

Typical performance of the instrumentation amplifier: 

Input offset voltage = Z5\£J 
Offset voltage drift = 0.3u.V/°C 



Input offset current = 100pA 
Input resistance = 800GQ 
Input noise = 0.42(xVp.p 

Three Op Amp Instrumentation Amplifier 




R1 
10k 
1% 

R3 

2.1k 

1% 



R4 
100Ci 
0.5% 

-wv- 



R6 
10k 

0.5% 

-wv- 



<&8 rirssp 

•?200!J - 



C1 





R7 

9.88k 
0.5% 



LT1097OR 
1/4LT1114 
ORG, 



GAIN = 1000 
TRIM R8 FOR GAIN 
TRIM R9 FOR DC 
COMMON-MODE REJECTION 
TRIM R10 FOR AC 
COMMON-MODE REJECTION 



— LT1I1SM.MO 

When the instrumentation amplifier is used with high 
impedance sources, the LT1114 is recommended be- 
cause its CMRR vs frequency performance is better than 
the LT1 1 1 2's. For example, with two matched 1 MQ source 
resistors, CMRR at 1 00Hz is 1 0OdB with the LT1 1 1 4, 76dB 
with the LT1112. 

This difference is explained by the fact that capacitance 
between adjacent pins on an IC package is about 0.25pF 
(including package, socket and PC board trace capaci- 
tances). 

On the dual op amp package, positive input A is next to the 
V" pin (AC ground), while positive input B has no AC 
ground pin adjacent to it, resulting in a 0.25pF input 
capacitance mismatch. At 100Hz, 0.25pF represents a 
6.4 x 10 9 input impedance mismatch, which is only 76dB 
higher than the 1 Ma source resistors. 

On the quad package, all four inputs are adjacent to a 
power supply terminal-therefore, there is no mismatch. 



2-38 



— — 



' .1 



LT1112/LT1114 



TVPICDL flPPLICflTIOn 



Dual Buffered +0.617V Reference Powered by Two AA Batteries 

-+1.5V 



t0.617V 




TOTAL SUPPLY CURRENT = 700(iA 
WORKS WITH BATTERIES DISCHARGED 
TO±1.3V 

AT ±1.5V: MAXIMUM LOAD CURRENT = 800jiA; 
CAN BE INCREASED WITH OPTIONAL R x . Ryl 
AT R x = R Y = 750£! LOAD CURRENT = 2mA 
TEMPERATURE COEFFICIENT LIMITED BY 
REFERENCE = 20ppn/"C 



SCHCfllflTIC DMGRflfTl <i/2ltiii2,i/4ltih4) 



V* 




Q1 TO 04 ARE SUPERGAIN TRANSISTORS mum-mi 



2-39 



LT1113 



TECHNOLOGY Dual Low Noise, 

Precision, JFET Input Op Amps 



KflTURCS 

■ 100% Tested Low Voltage Noise 

■ S8 Package Standard Pinout 

■ Voltage Gain 1.2 Million Min 

■ Offset Voltage 1.5mVMax 

■ Offset Voltage Drift 15u.V/°C Max 

■ Input Bias Current, Warmed Up 450pA Max 

■ Gain-Bandwidth Product 6.3MHz Typ 

■ Guaranteed Specifications with ±5V Supplies 

■ Guaranteed Matching Specifications 

nppucmions 

■ Photocurrent Amplifiers 

■ Hydrophone Amplifiers 

■ High Sensitivity Piezoelectric Accelerometers 

■ Low Voltage and Current Noise Instrumentation 
Amplifier Front Ends 

■ Two and Three Op Amp Instrumentation Amplifiers 

■ Active Filters 



DCSCRIPTIOn 

The LT1113 achieves a new standard of excellence in 
noise performance for a dual JFET op amp. The 4.5nV/VRz 
1kHz noise combined with low current noise and 
picoampere bias currents makes the LT1113 an ideal 
choice for amplifying low level signals from high imped- 
ance capacitive transducers. 

The LT1113 is unconditionally stable for gains of 1 or 
more, even with load capacitances up to 1000pF. Other 
key features are 0.4mVVos, voltage gain of 4 million. Each 
individual amplifier is 1 00% tested for voltage noise, slew 
rate, and gain-bandwidth. 

The design of the LT1113 has been optimized to achieve 
true precision performance with an industry standard 
pinout in the S8 package. A set of specifications are 
provided for +5V supplies and a full set of matching 
specifications are provided to facilitate their use in such 
matching dependent applications as instrumentation 
amplifier front ends. 



TVPKfiL flPPUCOTIOn 

Low Noise Hydrophone Amplifier with DC Servo 



-vw 




DC OUTPUT < 2.5mV FOR T s < 70"C 

OUTPUT VOLTAGE NOISE = 128nV/VRz AT 1kHz (GAIN = 20) 

CI - Or- j OOpF TO 5000pF; R4C2 > R8C T ; "OPTIONAL 



1kHz Input Noise Voltage Distribution 















Vs 


I 

= ±15V 
= 25°C " 
I 
















4i • 


Ta 
















33 


8 

IP A 


*QC TCCTCn 










- 














































































































-1= 


J 





















3.8 4.0 4.2 4.4 4.6 4.8 5.0 5.2 5.4 5.6 5.8 
INPUT VOLTAGE NOISE (nV/Vflij 

M13TM2 



2-40 



LT1113 



rbsoiutc mnximum Rnnnos 

Supply Voltage 

-55°Cto105°C ±20V 

105°Cto125°C +16V 

Differential Input Voltage ±40V 

Input Voltage (Equal to Supply Voltage) +20V 

Output Short Circuit Duration 1 Minute 



Operating Temperature Range 

LT1113AM/LT1113M -55°Cto125°C 

LT1113AC/LT1113C -40=0 to 85 C 

Storage Temperature Range -65°C to 150°C 

Lead Temperature (Soldering, 10 sec) 300°C 



PRCKRG€/ORD€R inFORfflfiTIOfl 





TOP VIEW 




ORDER PART 
NUMBER 




TOP VIEW 




ORDER PART 
NUMBER 


OUT A [T 




JF] V* 


OUT A |T 
-IN A [T 
+ INA [J 




T|v* 

T\ OUTB 
T] -IN B 


-IN A [T 
+INA [T 

V"[T 




T\ OUTB 
U-INB 
T\ -IN B 


LT1113AMJ8 

LT1113MJ8 

LT1113ACN8 




LT1113CS8 






T| +IN B 


S8 PART MARKING 


J8 PACKAGE N8 PACKAGE 


LT1113CN8 




R8 PACKAGF 




8-LEAD CERAMIC DIP 8-LEAD PLASTIC DIP 

Tjmax " 140"C,' = 130=C/W (N8) 


8-LEAD PLASTIC SOIC 
Tjmax = 160°C. e J4 = 190-C/W 


1113 



Consult factory for Industrial grade parts. 



€l€CTRICRl CHRRRCT6RISTICS 

V s = ±15V, V C m = 0V, T A = 25°C, unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS (Note 1) 


LT1113AM/AC 
MIN TYP MAX 


LT1113M/C 
MIN TYP MAX 


UNITS 


v s 


Input Offset Voltage 


V S = ±5V 


0.40 1.5 
0.45 1.7 


0.50 1.8 
0.55 2.0 


mV 
mV 


los 


Input Offset Current 


Warmed Up (Note 2) 


30 100 


35 150 


PA 


Ib 


Input Bias Current 


Warmed Up (Note 2) 


300 450 


320 480 


pA 


e n 


Input Noise Voltage 


0.1Hz to 10Hz 


2.4 


2.4 


uVp.p 




Input Noise Voltage Density 


f = 10Hz 
f = 1000Hz 


17 

4.5 6.0 


17 

4.5 6.0 


nVMta 
nVMHz 


in 


Input Noise Current Density 


f = 10Hz, f = 1000Hz (Note 3) 


10 


10 


fA/VHz 


R|N 


Input Resistance 
Differential Mode 
Common Mode 


V CM = -10Vto 8V 
V CM = 8Vto11V 


10" 
10" 
10 10 


10" 
10" 
10 10 


n 

Q 

n 


ClN 


Input Capacitance 


V S = ±5V 


14 
27 


14 

27 


PF 
PF 


VCM 


Input Voltage Range (Note 4) 




13.0 13.5 
-10.5 -11.0 


13.0 13.5 
-10.5 -11.0 


V 
V 


CMRR 


Common-Mode Rejection Ratio 


V CM = -10Vto13V 


85 98 


82 95 


dB 


PSRR 


Power Supply Rejection Ratio 


V s = ±4.5Vto±20V 


86 100 


83 98 


dB 


AvOL 


Large-Signal Voltage Gain 


V = +12V, R L = 10k 
V = ±10V, R L =1k 


1200 4800 
600 4000 


1000 4500 
500 3000 


V/mV 
V/mV 



2-41 



LT1113 



€l€CTRICfll CHRRRCT€RISTICS 



V s = ±15V, V C m = OV, T A = 25°C, unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS 


LT1113AM/AC 
MIN TYP MAX 


MIN 


T1113M/C 

.1111 kMM/U 

TYP 


MAX 


UNITS 


VoUT 


Output Voltage Swing 


R L = 10k 
R L =1k 


±13.5 
±12.0 


±13.8 
±13.0 




±13.0 
±11.5 


±13.8 
±13.0 




V 
V 


SR 


Slew Rate 


R|_> 2k (Note 6) 


2.5 


4.2 




2.5 


4.2 




V/ns 


GBW 


Gain-Bandwidth Product 


f = 100kHz 


4.5 


6.3 




4.5 


6.3 




MHz 




Channel Separation 


f =10Hz,V = ±10V, R|_ = 1k 














aH 






130 






126 




Is 


Supply Current per Amplifier 


V S = ±5V 




5.3 
5.3 


6.25 
6.20 




5.3 
5.3 


6.50 
6.45 


mA 
mA 


AV 0S 


Offset Voltage Match 






0.8 


2.5 




0.8 


3.3 


mV 


AI B * 


Noninverting Bias Current Match 


Warmed Up (Note 2) 




10 


80 




10 


120 


PA 


ACMRR 


Common-Mode Rejection Match 


(Note 8) 


81 


94 




78 


94 




(IB 


apsrr 


Power Supply Rejection Match 


(Note 8) 


82 


95 




80 


95 




dB 


v s = ±15V, V CM = OV, C < T A < 70 C. unless otherwise noted. (Note 9) 


SYMBOL 


PARAMETER 


CONDITIONS (Note 1) 


MIN 


LT1113AC 
TYP 


MAX 


MIN 


LT1113C 
TYP 


MAX 


UNITS 


Vos 


Input Offset Voltage 


V s = ±5V 






0.6 
0.7 


2.1 
2.3 




0.7 
0.8 


2.5 
2.7 


mV 
mV 


AV 0S 

ATemp 


Average Input Offset 
Voltage Drift 


(Note 5) 








u.V/°C 






7 


15 


8 20 


los 


Input Offset Current 








50 


350 




55 


450 


pA 


Is 


Input Bias Current 








600 


1200 




700 


1600 


PA 


V CM 


Input Voltage Range 






12.9 
-10.0 


13.4 
-10.8 




12.9 
-10.0 


13.4 
-10.8 




V 
V 


CMRR 


Common-Mode Rejection Ratio 


V CM = -10V to 12.9V 




81 


97 




79 


94 




dB 


PSRR 


Power Supply Rejection Ratio 


V s = ±4.5Vto±20V 




83 


99 




81 


97 




dB 


AvOL 


Large-Signal Voltage Gain 


V = ±12V, R L = 10k 
V = ±10V, R[_ = 1k 




900 
500 


3600 
2600 




800 
400 


3400 
2400 




V/mV 
V/mV 


VoUT 


Output Voltage Swing 


R L = 10k 
R L = 1k 




±13.2 
±11.7 


±13.5 
±12.7 




±12.7 
±11.3 


±13.5 
±12.7 




V 
V 


SR 


Slew Rate 


R L >2k(Note6) 




2.3 


4.0 




1.9 


4.0 




V/u.s 


GBW 


Gain-Bandwidth Product 


f = 100kHz 




3.6 


5.1 




3.6 


5.1 




MHz 


Is 


Supply Current per Amplifier 


V S = ±5V 






5.3 
5.3 


6.35 
6.30 




5.3 
5.3 


6.55 
6.50 


mA 
mA 


AV 0S 


Offset Voltage Match 








0.9 


3.5 




0.9 


4.5 


mV 


Al B * 


Noninverting Bias Current Match 








30 


300 




35 


400 


PA 


ACMRR 


Common-Mode Rejection Match 


(Note 8) 




76 


93 




74 


93 




dB 


APSRR 


Power Supply Rejection Match 


(Note 8) 




79 


93 




77 


93 




dB 



2-42 



XTUPHS 



111113 



€l€CTRICfil CHRRflCT€RISTICS 

V s = +15V, V CM = OV, -40°C < T A < 85°C, unless otherwise noted. (Note 7) 



SYMBOL 

O 1 ITIUUL 


PARAMETER 


CONDITIONS (Note 1) 


MIN 


LT1113AC 
TYP 


MAX 


MIN 


LT1113C 
TYP 


MAX 


UNITS 


Vos 


Input Offset Voltage 


V S = ±5V 


• 




0.7 
0.8 


2.4 
2.6 




0.8 
0.9 


2.8 
3.0 


mV 
mV 


ATemp 


Average Input Offset 
Voltage Drift 




* 




7 


15 




8 


20 


u.V/°C 


los 


Input Offset Current 








80 


700 




90 


1000 


pA 


Ib 


Input Bias Current 




# 




1750 


3000 




1800 


5000 


pA 


VCM 


Input Voltage Range 




• 


12.6 
-10.0 


13.0 
-10.5 




12.6 
-10.0 


13.0 
-10.5 




V 
V 


CMRR 


Common-Mode Rejection Ratio 


V CM = -10V to 12.6V 




30 


96 




78 


93 




dB 


PSRR 


Power Supply Rejection Ratio 


V s = ±4.5Vto±20V 




81 98 


79 96 


dB 


Avol 


Large-Signal Voltage Gain 


V = ±12V, R L = 10k 
V = ±10V, R L = 1k 




850 
400 


3300 
2200 




750 
300 


3000 
2000 




V/mV 
V/mV 


VOUT 


Output Voltage Swing 


R L = 10k 
R L = 1k 




±13.0 
±11.5 


±12.5 
±12.0 




±12.5 
±11.0 


±12.5 
±12.0 




V 
V 


SR 


Slew Rate 


R[_>2k 




2.2 


3.8 




1.8 


3.8 




V/ns 


GBW 


Gain-Bandwidth Product 


f = 100kHz 




3.3 


4.8 




3.3 


4.8 




MHz 


k 


Supply Current per Amplifier 


V S = ±5V 






5.30 
5.25 


6.35 
6.30 




5.30 
5.25 


6.55 
6.50 


mA 
mA 


AV 0S 


Offset Voltage Match 









1.0 


4.4 




1.0 


5.1 


mV 


Al B * 


Noninverting Bias Current Match 









50 


600 




55 


900 


pA 


ACMRR 


Common-Mode Rejection Match 


(Note 8) 




76 


93 




73 


93 




dB 


APSRR 


Power Supply Rejection Match 


(Note 8) 




77 


92 




75 


92 




dB 


V s = +15V, V CM = OV, -55°C < T A < 125°C, unless otherwise noted. (Note 9) 














SYMBOL 


PARAMETER 


CONDITIONS (Note 1) 


MIN 


LT1113AM 
TYP 


MAX 


MIN 


LT1113M 
TYP 


MAX 


UNITS 


Vos 


Input Offset Voltage 


V S = ±5V 






0.8 
0.8 


2.7 
2.8 




0.9 
0.9 


3.3 
3.4 


mV 
mV 


AV 0S 

ATemp 


Average Input Offset 
Voltage Drift 


(Note 5) 






5 


12 




8 


15 


u.V/°C 


los 


Input Offset Current 








0.8 


15 




1.0 


25 


nA 


Ib 


Input Bias Current 








25 


50 




27 


70 


nA 


VcM 


Input Voltage Range 






12.6 
-10.0 


13.0 
-10.4 




12.6 
-10.0 


13.0 
-10.4 




V 
V 


CMRR 


Common-Mode Rejection Ratio 


V CM = -10V to 12.6V 




79 


95 




77 


92 




dB 


PSRR 


Power Supply Rejection Ratio 


V s = ±4.5Vto±20V 




80 


97 




78 


95 




dB 



2-43 



LT1113 



€L€CTRICnL CHRRflCTCRISTICS 

V s = +15V, Vcm = OV, -55°C < T A < 125°C, unless otherwise 



(Note 9) 



SYMBOL 


PARAMETER 


CONDITIONS (Note 1) 


MIN 


LT1113AM 
TYP 


MAX 


MIN 


LT1113M 
TYP 


MAX 


UNITS 


Avol 


Large-Signal Voltage Gain 


V = ±12V, R L = 10k 
V = ±10V, R L =1k 




800 
400 


2700 
1500 




700 
300 


2500 
1000 




V/mV 
V/mV 


VOUT 


Output Voltage Swing 


R L = 10k 
R L =1k 




±13.0 
±11.5 


±12.5 
±12.0 




±12.5 
±11.0 


±12.5 
±12.0 




V 
V 


SR 


Slew Rate 


R L >2k(Note6) 




2.1 


3.6 




1.8 


3.6 




V/u.s 


GBW 


Gain-Bandwidth Product 


f = 100kHz 




2.5 


3.8 




2.5 


3.8 




MHz 


Is 


Supply Current Per Amplifier 


V S = ±5V 






5.30 
5.25 


6.35 
6.30 




5.30 
5.25 


6.55 
6.50 


mA 
mA 


AV 0S 


Offset Voltage Match 








1.0 


5.0 




1.0 


5.5 


mV 


AI B + 


Noninverting Bias Current Match 








1.8 


12 




2.0 


20 


nA 


ACMRR 


Common-Mode Rejection Match 


(Note 8) 




75 


92 




73 


92 




dB 


APSRR 


Power Supply Rejection Match 


(Note 8) 




76 


91 




74 


91 




dB 



The • denotes specifications which apply over the full operating 
temperature range. 

Note 1: Typical parameters are defined as the 60% yield of parameter 
distributions of individual amplifiers, i.e., out of 1 00 LT1 1 13s (200 op 
amps) typically 120 op amps will be better than the indicated specification. 
Note 2: Warmed-up l B and l s readings are extrapolated to a chip 
temperature of 50°C from 25°C measurements and 50°C characterization 
data. 

Note 3: Current noise is calculated from the formula: 
in = (2ql B ) 1/2 

where q = 1.6 x 10~ 19 coulomb. The noise of source resistors up to 
200M swamps the contribution of current noise. 
Note 4: Input voltage range functionality is assured by testing offset 
voltage at the input voltage range limits to a maximum of 2.3mV (A grade), 
to 2.8mV (C grade). 

Note 5: This parameter is not 100% tested. 



Note 6: Slew rate is measured in Ay = -1 ; input signal is ±7.5V, output 
measured at ±2.5V. 

Note 7: The LT1 1 13 is not tested and not quality assurance sampled at 
85°C and at -40°C. These specifications are guaranteed by design, 
correlation and/or inference from -55°C, 0°C, 25°C, 70°C and/or 125°C 
tests. 

Note 8: ACMRR and APSRR are defined as follows: 

(1) CMRR and PSRR are measured in nV/V on the individual 
amplifiers. 

(2) The difference is calculated between the matching sides in u,V/V. 

(3) The result is converted to dB. 

Note 9: The LT1113 is measured in an automated tester in less than one 
second after application of power. Depending on the package used, power 
dissipation, heat sinking, and air flow conditions, the fully warmed-up chip 
temperature can be 1 0°C to 50°C higher than the ambient temperature. 



LT1113 

tvpicrl pcflFonmnncc CHRRRCTCRISTICS 



0.1Hz to 10Hz Voltage Noise 



1kHz Output Voltage Noise 
Density vs Source Resistance 



Voltage Noise vs Frequency 




TIME (SEC) 



1k 10k 100k 1M 10M 100M 1G 
SOURCE RESISTANCE (Si) 



10 100 1k 

FREQUENCY (Hz) 



Voltage Noise vs 
Chip Temperature 



Input Bias and Offset Currents vs 
Chip Temperature 



Input Bias and Offset Currents 
Over the Common-Mode Range 



10 
9 

i 8 

E, 7 
I 6 

o 4 
S 3 

§: 





-Vs 


= *15V 



























































































































































-75 -50 -25 25 50 75 100 125 
TEMPERATURE CO 

tHMM 

Common-Mode Limit vs 
Temperature 



100n 
■S 30n 

I 10n 
I 3n 

I 1n 
t300p 
o 

g100p 
« 30p 
| 10p 
| 3p 
1P 



I I 

Vc = *15V 


















































Ib.> 


CM = 










B V 


CM * 


ov 


















































■oil 




ov 








'OS 


Vei 


= I0\ 





















-75 -50 -25 25 50 75 100 125 
TEMPERATURE (°C) 



Common-Mode Rejection Ratio 
vs Frequency 




Vs = 
NOT 


>5°C 
























BIA 


iCURR 


.NT^. 








OFFSS 


TCURF 


ENT _ 







-10 -5 5 10 
COMMON-MODE RANGE (V) 



Power Supply Rejection Ratio 
vs Frequency 



S 20 











Ta = 


25°C 




















^+P 


;rr 








PSRR^ 

































10 100 1k 10k 100k 1M 10M 
FREQUENCY (Hz) 

1113 GOT 



2-45 



LT1113 



TVPICHL P€RFORmnnC€ CHflRnCT€RISTICS 



Voltage Gain vs Frequency 



S 

m 
CD 



-20 

0. 



















= 25°C _ 


















■ *1 



































































































































































Voltage Gain vs 
Chip Temperature 



1 100 10k 1M 
FREQUENCY (Hz) 



100M 











I 

V S = ±15V 

V = t10V, R L = 1k 

\/„ _ *iou n 


















































L =10 


< 


























R 





























































Gain and Phase Shift vs 
Frequency 



-75 -50 -25 25 50 75 100 125 
CHIP TEMPERATURE (°C) 

1113 Gil 




1 10 
FREQUENCY (MHz) 



Small-Signal Transient Response 



Large-Signal Transient Response 



Supply Current vs Supply Voltage 




A v =1 
C L = 10pF 

V S = ±15V,±5V 



4 

° 













25°C 








-55"C 
















125'C 















±5 ±10 ±15 

SUPPLY VOLTAGE (V) 



Output Voltage Swing vs 
Load Current 



V*-0.8 
-1.0 
£-1.2 
1-1.4 



§ 1.2 
I 1.0 
8 0.8 
0.6 
V-+0.4 









i 


5'C 






I 

. 125*C 














55° 




















































v s = 


tsy 


TOi 


20V 


























































-55 

25' 
















s 


>» 


•c- 












1 


25°C X x 











-10 -8 -6 -4 -2 
ISINK 



2 4 6 8 10 
OUTPUT CURRENT (mA) 'SOURCE 



Capacitive Load Handling 



50 

40 

JX 30 
o 
o 
£ 

to 

fS 20 



I I I 

V S = ±15V 
T A = 25"C 
R L >10k 
V = 100mVp.p 
A v = +10. R F = 1 0k. C F = 20pF 















A v = 1 










A v = 10 

















1 10 100 1000 10000 
CAPACITIVE LOAD (pF) 

1-1931? 



Slew Rate and Gain-Bandwidth 
Product vs Temperature 





















SL 


ew m 


TE 








































iW 



































2 


-75 -50 -25 25 50 75 100 125 
mjRE(-C) 

1113 G1B 



2-46 



XT 



LT1113 



TVPicm PCRFORmnncc charactcristics 



Distribution of Offset Voltage Drift 
with Temperature (J8) 



10 



















= ±15V 














1 


"5 J8 


























































































































-12 -10 -8 -6 -4 -2 2 4 6 8 
OFFSET VOLTAGE DRIFT WITH TEMPERATURE IjiWC) 



Distribution of Offset Voltage Drift 
with Temperature (N8, S8) 



° 20 

















1 1 
V S = ±15V 
















1 1 

78 S8 
in mo 














3 


36 


= AM 


PS 


































































— 




















"1 1 







-25 -20 -15 -10 -5 5 10 15 20 25 
OFFSET VOLTAGE DRIFT WITH TEMPERATURE ( M WC) 



Warm-Up Drift 



I 

Vs = l 15V 










Ta = 






S8 PACKAGE 










N8PA 


:kage 






















J8 PA 


KAGE 












INST 
SOLE 


LLAIR 
EREDC 


(S8 PA< 
NTO BC 


KAGE 
ARD) 



1 2 3 4 5 
TIME AFTER POWER ON (MINUTES) 



THD and Noise vs Frequency for 
Noninverting Gain 

1 U IM 




100 1k 

FREQUENCY (Hz) 



THD and Noise vs Frequency for 
Inverting Gain 



Channel Separation vs Frequency 



10k 20k 



0.0001 




100 1k 10k 20k 

FREQUENCY (Hz) 



1k 10k 100k 1M 10M 
FREQUENCY (Hz) 



THD and Noise vs Output 
Amplitude for Noninverting Gain 



Z L = 2kll15pF,1 = 1kHz E 
Av^tl.+IO.+lOO : 
MEASUREMENT BANDWIDTH - 
10Hz TO 22kHz 




1 10 
OUTPUT SWING (Vp.p) 



THD and Noise vs Output 
Amplitude for Inverting Gain 



:Z L = 2k||15pF,1 = 1kHz 

A v = -1. -10. -100 

MEASUREMENT BANDWIDTH 
■ = 10HzTO 22kHz 




1 10 
OUTPUT SWING (Vp.p) 



CCIF IMD Test 

(Equal Amplitude Tones at 

13kHz, 14kHz)* 



=v s = 

-R L = 


♦15V- 


















2k 


















Va = 


25°C" 














































































-Ay 

























































































































































0.1 1 10 30 

OUTPUT SWING (Vp.p) 



• See LT1 1 15 data sheet tor definition of CCIF testing. 



2-47 



LT1113 



nppiicnTions inFonmnnon 



The LT1 1 1 3 dual in the plastic and ceramic DIP packages 
are pin compatible to and directly replace such JFET op 
amps as the 0PA21 1 1 and 0PA2604 with improved noise 
performance. Being the lowest noise dual JFET op amp 
available to date, the LT1 1 1 3 can replace many bipolar op 
amps that are used in amplifying low level signals from 
high impedance transducers. The best bipolar op amps 
will eventually loose out to the LT1 1 1 3 when transducer 
impedance increases due to higher current noise. The low 
voltage noise of the LT1 1 1 3 allows it to surpass every dual 
and most single JFET op amps available. For the best 
performance versus area available anywhere, the LT1 1 13 
is offered in the narrow S8 surface mount package with 
standard pinout and no degradation in performance. 

The low voltage and current noise offered by the LT1113 
makes it useful in a wide range of applications, especially 
where high impedance, capacitive transducers are used 
such as hydrophones, precision accelerometers, and photo 
diodes. The total output noise in such a system is the gain 
times the RMS sum of the op amp input referred voltage 
noise, the thermal noise of the transducer, and the op amp 
bias current noise times the transducer impedance. 
Figure 1 shows total input voltage noise versus source 
resistance. In a low source resistance (<5k) application 
the op amp voltage noise will dominate the total noise. 



This means the LT1 1 1 3 will beat out any dual JFET op amp, 
only the lowest noise bipolar op amps have the edge 
(at low source resistances). As the source resistance 
increases from 5k to 50k, the LT1 113 will match the best 
bipolar op amps for noise performance, since the thermal 
noise of the transducer (4kTR) begins to dominate the 
total noise. A further increase in source resistance, above 
50k, is where the op amp's current noise component (2qle 
r trans) wi|1 eventually dominate the total noise. At these 
high source resistances, the LT1113 will out perform 
the lowest noise bipolar op amp due to the inherently low 
current noise of FET input op amps. Clearly, the LT1113 
will extend the range of high impedance transducers 
that can be used for high signal to noise ratios. This 
makes the LT1113 the best choice for high impedance, 
capacitive transducers. 

The high input impedance JFET front end makes the 
LT1113 suitable in applications where very high charge 
sensitivity is required. Figure 2 illustrates the LT1 1 1 3 in its 
inverting and noninverting modes of operation. A charge 
amplifier is shown in the inverting mode example; here the 
gain depends on the principal of charge conservation at 
the input of the LT1 1 1 3. The charge across the transducer 
capacitance, Cs, is transferred to the feedback capacitor 
Cf, resulting in a change in voltage, dV, equal to dQ/C F . 




Figure 1. Comparison of LT1113 and LT1124 Total Output 1kHz Voltage Noise Versus Source Resistance 



2-48 



LT1113 



nppLicnTions inFORmnnon 




The gain therefore is 1 + Cp/Cs. For unity gain, the Cf 
should equal the transducer capacitance plus the input 
capacitance of the LT1113 and Ftp should equal Rs. In the 
noninverting mode example, the transducer current is 
converted to a change in voltage by the transducer capaci- 
tance; this voltage is then buffered by the LT1 113 with a 
gain of 1 + R1/R2. A DC path is provided by R s , which is 
either the transducer impedance or an external resistor. 
Since Rs is usually several orders of magnitude greater 
than the parallel combination of R1 and R2, Rb is added to 
balance the DC offset caused by the noninverting input 
bias current and Rs. The input bias currents, although 
small at room temperature, can create significant errors 
over increasing temperature, especially with transducer 
resistances of up to 1 OOMQ or more. The optimum value 
for R s is determined by equating the thermal noise (4kTRs) 
to the current noise times Rs, (2ql B ) Rs, resulting in 
Rb = 2Vj/Ib- A parallel capacitor, Cb, is used to cancel the 
phase shift caused by the op amp input capacitance 
and R B . 

Reduced Power Supply Operation 

The LT1 1 1 3 can be operated from ±5V supplies for lower 
power dissipation resulting in lower l B and noise at the 



expense of reduced dynamic range. To illustrate this 
benefit, let's take the following example: 

An LT1113CS8 operates at an ambient temperature of 
25°C with ±15V supplies, dissipating 318mW of power 
(typical supply current = 10.6mA for the dual). The S8 
package has a 9ja of 190°C/W, which results in a die 
temperature increase of 60.4°C or a room temperature die 
operating temperature of 85.4°C. At ±5V supplies, the die 
temperature increases by only one third of the previous 
amount or 20.1 °C resulting in a typical die operating 
temperature of only 45.1 °C. A 40 degree reduction of die 
temperature is achieved at the expense of a 20V reduction 
in dynamic range. If no DC correction resistor is used at 
the input, the input referred offset will be the input bias 
current at the operating die temperature times the trans- 
ducer resistance (referto Input Bias and Offset Currents vs 
Chip Temperature graph in Typical Performance Charac- 
teristics section). A 1 0OmV input Vos is the result of a 1 nA 
l B (at 85°C) dropped across a 100MQ transducer resis- 
tance; at +5V supplies, the input offset is only 28mV (l B at 
45°C is 280pA). Careful selection of a DC correction 
resistor (R B ) will reduce the IR errors due to lg by an order 
of magnitude. A further reduction of IR errors can be 



xttjubs 



2-49 



LT1113 



RppLicnnons inFonmnTion 



INPUT: ±5.2V Sine Wave 



LT1113 Output 



0PA2111 Output 



1 










8 


81 


■ 








8 


: 


K 


m 




Rn 










I 


\ 




/ 







I 










x 




/. 










\ 






\ 




r 




1 








/ 






1 






\ 


1 






j 






V 






\J 











» 






10 











Figure 3. Voltage Follower with Input Exceeding the Common-Mode Range ( V s = ±5V) 



achieved by using a DC servo circuit shown in the applica- 
tions section of this data sheet. The DC servo has the 
advantage of reducing a wide range of IR errors to the 
millivolt level over a wide temperature variation. The 
preservation of dynamic range is especially important 
when reduced supplies are used, since input bias currents 
can exceed the nanoamp level for die temperatures 
over 85°C. 

To take full advantage of a wide input common-mode 
range, the LT1 1 13 was designed to eliminate phase rever- 
sal. Referring to the photographs shown in Figure 3, the 
LT1 1 1 3 is shown operating in the follower mode (Ay = +1 ) 
at +5V supplies with the input swinging ±5.2V. The output 
of the LT1113 clips cleanly and recovers with no phase 
reversal, unlike the competition as shown by the last 
photograph. This has the benefit of preventing lock-up in 
servo systems and minimizing distortion components. 
The effect of input and output overdrive on one amplifier 
has no effect on the other, as each amplifier is biased 
independently. 



Advantages of Matched Dual Op Amps 

In many applications the performance of a system 
depends on the matching between two operational ampli- 
fiers rather than the individual characteristics of the two op 
amps. Two or three op amp instrumentation amplifiers, 
tracking voltage references and low drift active filters 
are some of the circuits requiring matching between two 
op amps. 

The well-known triple op amp configuration in Figure 4 
illustrates these concepts. Output offset isafunction of the 
difference between the two halves of the LT1113. This 
error cancellation principle holds for a considerable 
number of input referred parameters in addition to 
offset voltage and bias current. Input bias current will 
be the average of the two noninverting input currents 
(l B +). The difference between these two currents (Al B +) 
is the offset current of the instrumentation amplifier. 
Common-mode and power supply rejections will be 
dependent only on the match between the two amplifiers 
(assuming perfect resistor matching). 



2-50 



Applications inFORmflTion 



15V 




GAIN = 100 -I- 
BANDWIDTH = 400kHz - 
INPUT REFERRED NOISE = 6.6nV/VHz AT 1kH2 
WIDEBAND NOISE DC TO 400kHz = 6.6 (jVrms 
C L <0.01yF 



Figure 4. Three Op Amp Instrumentation Amplifier 

The concepts of common-mode and power supply 
rejection ratio match (ACMRR and APSRR) are best 
demonstrated with a numerical example: 

Assume CMRR A = +50|iWV or 86dB, 

and CMRR B = + 39nV/Vor88dB, 

then ACMRR = 11u.V/V or 99dB; 

if CMRRb = -39U.V/V which is still 88dB, 

then ACMRR = 89nV/V or 81 dB 

Clearly the LT1 1 1 3, by specifying and guaranteeing all of 
these matching parameters, can significantly improve the 
performance of matching-dependent circuits. 



LT1113 



Typical performance of the instrumentation amplifier: 
Input offset voltage = 0.8mV 
Input bias current = 320pA 
Input offset current = 10pA 
Input resistance = 10 11 Q. 
Input noise = 3.4jiVp.p 

High Speed Operation 

The low noise performance of the LT1 1 1 3 was achieved by 
making the input JFET differential pair large to maximize 
the first stage gain. Increasing the JFET geometry also 
increases the parasitic gate capacitance, which if left 
unchecked, can result in increased overshoot and ringing. 
When the feedback around the op amp is resistive (Rp), 
a pole will be created with R F , the source resistance and 
capacitance (Rs.Cs), and the amplifier input capacitance 
(Cin = 27pF). In closed loop gain configurations and 
with Rs and Rp in the kilohm range (Figure 5), this pole 
can create excess phase shift and even oscillation. 
A small capacitor (Cp) in parallel with R F eliminates this 
problem. With R S (C S + C| N ) = RpCp, the effect of the 
feedback pole is completely removed. 

Cf 

I — II — I 

I VW i 




xrunas 



2-51 



LT1113 



TVPicnL nppLicnnons 



ACCELEROMETER 
B & K MODEL 4381 
OR EQUIVALENT 



Accelerometer Amplifier with DC Servo 



R1 
100M 
-Wv 




"1 



R4C2 = R5C3 > R1 (1 + R2/R3) C1 
OUTPUT = 0.8mV/pC = S.OmV/g" 
DC OUTPUT < 2.7mV 
OUTPUT NOISE = 6nV/* AT 1 kHz 

•PICOCOULOMBS 

"J = EARTH'S GRAVITATIONAL CONSTANT 



— -5VT0-15V 



Paralleling Amplifiers to Reduce Voltage Noise 




OUTPUT 



1. ASSUME VOLTAGE NOISE OF LT1 1 1 3 AND 51£i SOURCE RESISTOR = 4.6nW\'Hz 

2. GAIN WITH n LT1 1 1_3s IN PARALLEL = n x 200 

3. OUTPUT NOISE = Vn x 200 x 4.6nVNHz 

4. INPUT REFERRED NOISE = 0UTPUT>IC " SE = ^ nWVHz 
n x 200 Vn 

5. NOISE CURRENT AT INPUT INCREASES \/n TIMES 



2-52 



U 



LT1113 



TVPICflL fiPPLICflTIOnS 



Low Noise Light Sensor with DC Servo 




OUTPUT 



HAMAMATSU 
S1336-5BK 



R2C2 > C1R1 

C D = PARASITIC PHOTODIODE CAPACITANCE 
V = 100mV/nWATT FOR 200nm WAVE LENGTH 
330mV/nWAn FOR 633nm WAVE LENGTH 



10Hz Fourth Order Chebyshev Lowpass Filter (O.OIrJB Ripple) 



R2 




TYPICAL OFFSET - 0.8mV 
1% TOLERANCES 

FOR V| N = 1 0Vp.p, V 0UT = -1 21dB AT ( > 330Hz 

= -6dBATf = 16.3Hz wann 
LOWER RESISTOR VALUES WILL RESULT IN LOWER THERMAL NOISE AND LARGER CAPACITORS 



-^•T UIhnSldB 



2-53 



LT1113 



TVPicnt nppucfiTions 



Light Balance Detection Circuit 




VouT'lMxdt-y 
PD, PD 2 = HAMAMATSU S1336-5BK 
WHEN EQUAL LIGHT ENTERS PHOTODIODES. Vqut < 3mV. 



Unity Gain Buffer with Extended Load Capacitance Drive Capability 



R2 

1k 



VlN- 



w. 






C1 








1/2LT1113^> 1 


R1 













C1 =C L <0.1(iF 

OUTPUT SHORT CIRCUIT CURRENT 
(- 30mA) WILL LIMIT THE RATE AT WHICH THE 
■ V UT VOLTAGE CAN CHANGE ACROSS LARGE CAPACITORS 



2-54 



uwm 



KflTURCS 



Lin^AE. 

TECHNOLOGY 



Input Bias Current, Warmed Up: 10pA Max 
100% Tested Low Voltage Noise: 8nV/\ Hz Max 

Very Low Input Capacitance: 1.5pF 
Voltage Gain: 1.2 Million Min 
Offset Voltage: 1.5mV Max 
Input Resistance: 10 13 Q 
Gain-Bandwidth Product: 5.3MHz Typ 
Guaranteed Specifications with ±5V Supplies 
Guaranteed Matching Specifications 



nppucnnons 



Photocurrent Amplifiers 

Hydrophone Amplifiers 

High Sensitivity Piezoelectric Accelerometers 

Low Voltage and Current Noise Instrumentation 

Amplifier Front Ends 

Two and Three Op Amp Instrumentation Amplifiers 
Active Filters 



LT1169 

Dual Low Noise, 
Picoampere Bias Current 
JFET Input Op Amp 

DCSCRIPTIOn 

The LT1 1 69 achieves a new standard of excellence in noise 
performance for a dual JFET op amp. For the first time low 
voltage noise (6nV/VHz) is simultaneously offered with 
extremely low current noise (0.8fA/VRz), providing the 
lowest total noise for high impedance transducer applica- 
tions. Unlike most JFET op amps, the very low input bias 
current (3pATyp) is maintained over the entire common- 
mode range which results in an extremely high input 
resistance (10 13 Q). When combined with a very low input 
capacitance (1.5pF) an extremely high input impedance 
results making the LT1169 the first choice for amplifying 
low level signals from high impedance transducers. The 
low input capacitance also assures high gain linearity when 
buffering AC signals from high impedance transducers. 

The LT1 1 69 is unconditionally stable for gains of 1 or more, 
even with 1000pF capacitive loads. Other key features are 
0.5mV Vos and a voltage gain over 4 million. Each indi- 
vidual amplifier is 1 00% tested for voltage noise, slew rate 
(4.2V/U5), and gain-bandwidth product (5.3MHz). 

A full set of matching specifications are provided for 
precision instrumentation amplifier front ends. Specifica- 
tions at ±5V supply operation are also provided. For an 
even lower voltage noise please see the LT1 1 1 3 data sheet. 




L APPUCflTIOn 

Low Noise Light Sensor with DC Servo 




1kHz Output Voltage Noise 
Density vs Source Resistance 



■ "OUT 



| 

i 



:|_ 












Vn 








I > R SOUHCE 




































































!= SOURCE = 
-RESISTANCE — 




t a =; 


5°C - 
15V- 


■• [ ONLY 







PARASITIC PHOTODIODE CAPACITANCE 
= 10OmV/nWATT FOR 200nm WAVE LENGTH 
330mV/nWATT FOR 633nm WAVE LENGTH 



1k 10k 100k 1M 10M 100M 1G 
SOURCE RESISTANCE (Ci) 
VN = ^(VoPAMp) 2 + '1i<TR st 2qlBRs 2 



LT1 169 • TAiK 



2-55 



LT1169 



absolute mnximum rrtirgs 



Supply Voltage 

-55°Cto105°C ±20V 

105°Cto125°C ±16V 

Differential Input Voltage ±40V 

Input Voltage (Equal to Supply Voltage) ±20V 

Output Short-Circuit Duration Indefinite 

Operating Temperature Range -40°C to 85°C 

Storage Temperature Range -65°C to 150°C 

Lead Temperature (Soldering, 10 sec) 300°C 



PRCKRG€/ORD€R MFORfflRTIOn 





TOP VIEW 




ORDER PART 
NUMBER 


OUT A |T 
-IN A [T 
+INA [T 
V" \J 




T\ OUT B 
]FJ -IN B 
T) +INB 


LT1169ACN8 
LT1169CN8 


N8 PACKAGE 
8-LEAO PLASTIC DIP 

TjMAX=150°C,e JA = 80"C/W 





Consul! factory for Industrial and Military grade parts. 



€l€CTRICRl CHRRRCT€RISTICS v s = ±15V, V C m = 0V, T A = 25°C, unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS (Note 1) 


MIN 


LT1169A 
TYP 


MAX 


MIN 


LT1169 
TYP 


MAX 


UNITS 


Vos 


Input Offset Voltage 


V s = ±5V 




0.50 
0.55 


1.5 
1.7 




0.60 
0.65 


2.0 
2.2 


mV 
mV 


los 


Input Offset Current 


Warmed Up (Note 2) 
Tj = 25°C (Note 5) 




1.5 
0.5 


7 
2 




2.5 
0.7 


15 
4 


pA 
pA 


Ib 


Input Bias Current 


Warmed Up (Note 2) 




3 


10 

3 




4.0 
1.5 


20 
5 


pA 

pA 


e n 








2.A 


uVp.p 




Input Noise Voltage Density 


f =10Hz 
f = 1000Hz 




17 
6 


8 


17 

6 8 


nV/VHz 
nV/VHz 


in 


Input Noise Current Density 


f =10Hz, f =1kHz (Note 3) 


0.8 


1 


fA/Vfiz 


RlN 


Input Resistance 
Differential Mode 
Common Mode 


V C M = -10V to 13V 


10" 
10" 


10 14 
10 13 


n 
a 




Input Capacitance 


V S = ±5V 


1.5 
2.0 


1.5 

2.0 


PF 
PF 


VCM 


Input Voltage Range (Note 4) 




13.0 
-10.5 


13.5 
-11.0 




13.0 
-10.5 


13.5 
-11.0 




V 
V 


CMRR 


Common-Mode Rejection Ratio 


V CM = -10V to 13V 


85 


98 




82 


95 




dB 


PSRR 


Power Supply Rejection Ratio 


V S = ±4.5V to ± 20V 


86 100 


83 


98 




dB 


AvOL 


Large-Signal Voltage Gain 


V = ±12V, R L = 10k 
V o = ±10V, R L =1k 


1200 
600 


4800 
4000 




1000 
500 


4500 
3000 




V/mV 
V/mV 


VOUT 


Output Voltage Swing 


R L = 10k 
R L =1k 


±13.0 
±12.0 


±13.8 
±13.0 




±13.0 
±12.0 


±13.8 
±13.0 




V 
V 


SR 


Slew Rate 


Rl> 2k (Note 6) 


2.4 


4.2 




2.4 


4.2 




V/ps 


GBW 


Gain-Bandwidth Product 


f = 100kHz 


3.3 


5.3 




3.3 


5.3 




MHz 




Channel Separation 


f =10Hz. V = ±10V, R L = 1k 


130 


126 


dB 


Is 


Supply Current per Amplifier 


V S = ±5V 




5.3 
5.3 


6.25 
6.20 




5.3 
5.3 


6.50 
6.45 


mA 
mA 



2-56 



LT1169 



€l€CTRICm CHflRflCT€RISTICS V s = ±15V, V CM = OV, T A = 25 C, unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS (Note 1 1 


MIN 


LT1169A 
TYP 


MAX 


MIN 


LT1169 
TYP 


MAX 


UNITS 


AV 0S 


Offset Voltage Match 






0.8 


2.7 




0.8 


35 


mV 


Al B + 


Noninverting Bias Current Match 


Warmed Up (Note 2) 




2 


8 




3 


20 


PA 


ACMRR 


Common-Mode Rejection Match 


Note 8 1 


81 


94 




78 


94 




dB 


APSRR 


Power Supply Rejection Match 


(Note 8) 


82 


95 




80 95 


dB 


V s = ±15V, V CM = OV, 0°C < T A < 70°C, (Note 9), unless otherwise noted. 


SYMBOL 


PARAMETER 


CONDITIONS (Note 1 1 


MIN 


LT1169A 
TYP 


MAX 


MIN 


LT1169 
TYP 


MAX 


UNITS 


Vos 


Input Offset Voltage 


Vf - + SV 


• 




0.6 

0.7 


2.9 
3.1 


0.7 3.2 
0.8 3.4 


mV 
mV 


AV 0S 

ATemp 


Average Input Offset 

Vnltanp D rift 
v ui Layc Ul M I 


(Note 5) 






15 


40 




20 


50 


u.V/°C 


los 


Input Offset Current 






8 40 




10 


50 


PA 


Ib 


Input Bias Current 








100 


200 




180 


400 


pA 


V C M 


Input Voltage Range 






12.9 
-10.0 


13.4 
-10.8 




12.9 
-10.0 


13.4 
-10.8 




V 
V 


CMRR 


Common-Mode Rejection Ratio 


V CM = -10V to 12.9V 




81 


97 




79 


94 




dB 


PSRR 


Power Supply Rejection Ratio 


V S = ±4.5V to±20V 




83 


99 




81 


97 




dB 


%>L 


Large-Signal Voltage Gain 


V = ±12V, R L = 10k 
V = ±10V, R L =1k 




900 
500 


3600 
2600 




800 
400 


3400 
2400 




V/mV 
V/mV 


VoUT 


Output Voltage Swing 


R L = 10k 
R L = 1k 




±12.5 
±11.5 


±13.5 
+12.7 




±12.5 
+11.5 


±13.5 
±12.7 




V 
V 


SR 


Slew Rate 


R L >2k(Note 6) 




2.3 


4 




1.9 4 


V/^s 


GBW 


Gain-Bandwidth Product 


f = 100kHz 




3 


4.2 




3 


4.2 




MHz 


is 


Supply Current per Amplifier 


V s = ±5V 






5.3 
5.3 


6.35 
6.30 




5.3 
5.3 


6.55 
6 50 


mA 
mA 


AVcs 


Offset Voltage Match 








1 


4 




1.5 


5 


mV 


Al B * 


Noninverting Bias Current Match 








3.5 


35 




5.5 


50 


pA 


ACMRR 


Common-Mode Rejection Match 


(Note 8) 




76 93 


74 


93 




dB 


APSRR 


Power Supply Rejection Match 


(Note 8) 




79 


93 




77 


93 




dB 


V s = ±15V, V CM = OV, -40°C < T A < 85°C, (Note 7), unless otherwise noted. 


SYMBOL 


PARAMETER 


CONDITIONS (Note 1) 


MIN 


LT1169A 
TYP 


MAX 


MIN 


LT1169 
TYP 


MAX 


UNITS 


Vos 


Input Offset Voltage 


V S = ±5V 


• 
• 




0.7 

0.8 


3.5 
3.7 




0.8 
0.9 


3.8 
4.0 


mV 
mV 


AV 0S 

ATemp 


Average Input Offset 
Voltage Drift 




• 




15 


40 




20 


50 


fiV/°C 


los 


Input Offset Current 










100 




30 


200 


pA 


Ib 


Input Bias Current 




• 




280 


600 




320 


1200 


pA 


Vcm 


Input Voltage Range 




• 
• 


12.6 
-10.0 


13.0 
-10.5 




12.6 
-10.0 


13.0 
-10.5 




V 
V 


CMRR 


Common-Mode Rejection Ratio 


V CM = -10V to 12.6V 


• 


80 


96 




78 


93 




dB 


PSRR 


Power Supply Rejection Ratio 


V s = ±4.5Vto +20V 


• 


81 98 


79 


96 




dB 



XTU393B 



2-57 



LT1169 



€l€CTRICfll CHARACTCRISTICS 



V s = :15V. V CM = OV, -40 C < T A < 85 C. (Note 7), unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS (Note 1) 


MIN 


1 T11RQA 
L I I I Dan 

TYP 


MAX 


MIN 


1 T11RQ 

LI 1 103 

TYP 


MAX 


UNITS 


AvOL 


Large-Signal Voltage Gain 


V = ±12V, R L = 10k 
V = ±10V, R L = 1k 




850 
400 


3300 
2200 




750 
300 


3000 
2000 




V/mV 
V/mV 


VOUT 


Output Voltage Swing 


R L = 1 0k 
R L = 1k 




±12.5 
±11.3 


±12.5 
+12.0 




±12.5 
±11.3 


±12.5 
±12.0 




V 
V 


SR 


Slew Rate 


R L >2k 




2.2 


3.8 




1.8 


3.8 




V/us 


GBW 


Gain-Bandwidth Product 


f = 100kHz 




2.7 


4 




2.7 


4 




MHz 


Is 


Supply Current per Amplifier 








5.30 
5.25 


6.35 
6.30 




5.30 
5.25 


6.55 
6.50 


mA 
mA 


AV S 


Offset Voltage Match 




• 




1.6 


5 




1.8 


6 


mV 


Al B + 


Noninverting Bias Current Match 






8 80 




10 


180 


pA 


ACMRR 


Common-Mode Rejection Match 


(Note 8) 




76 


93 




73 


93 




dB 


APSRR 


Power Supply Rejection Match 


(Note 8) 




77 


92 




75 


92 




dB 



The • denotes specifications which apply over the full operating 
temperature range. 

Note 1: Typical parameters are defined as the 60% yield of parameter 
distributions of individual amplifiers, i.e., out of 100 LT1 1 69s (200 op 
amps) typically 120 op amps will be better than the indicated specification. 
Note 2: l B and los readings are extrapolated to a warmed-up temperature 
from 25°C measurements and 45°C characterization data. 
Note 3: Current noise is calculated from the formula: 
in = (2ql B ) 1/2 

where q = 1.6 x 10~ 19 coulomb. The noise of source resistors up to 200M 
swamps the contribution of current noise. 
Note 4: Input voltage range functionality is assured by testing offset 
voltage at the input voltage range limits to a maximum of 2.3mV (A grade), 
to 2.8mV (C grade). 

Note 5: This parameter is not 100% tested. 



Note 6: Slew rate is measured in Ay = -1 ; input signal is ±7.5V, output 
measured at +2.5V. 

Note 7: The LT1 1 69 is not tested and not quality assurance sampled at 
85°C and at -40°C. These specifications are guaranteed by design, 
correlation and/or inference from -55°C, 25°C, and/or 125°C 
characterization and 0°C, 70°C tests. 
Note 8: ACMRR and APSRR are defined as follows: 

(1) CMRR and PSRR are measured in jiV/V on the individual 
amplifiers. 

(2) The difference is calculated between the matching sides in |iV/V. 

(3) The result is converted to dB. 

Note 9: The LT1169 is measured in an automated tester in less than one 
second after application of power. Depending on the package used, power 
dissipation, heat sinking, and air flow conditions, the fully warmed-up chip 
temperature can be 10°C to 50°C higher than the ambient temperature. 



typical i>€RFORmnncc chrractcristics 



0.1Hzlo10Hz Voltage Noise 



4 6 
TIME (SEC) 



1kHz Input Noise Voltage 
Distribution 



I I I I 

T A = 25°C 












Vs = ±15V 

510 OP AMPS TFRTFD 




































- 
























1- 






























































































































2 J 


6 5 


5 


4 5 


8 6 


2 6 


6 7 


/ 


- ! 7 


8 8. 



INPUT VOLTAGE NOISE (nV«TE) 



Voltage Noise vs Frequency 




100 

FREQUENCY (H?) 



LT11WTPOJ1 



LI1169.TPOK 



2-58 



LT1169 



TYPICAL P€RFORmnnC€ CHRRRCTCRISTICS 



Voltage Noise vs Chip Temperature 





US 































































































































3 
2 

-75 -50 -25 25 50 75 100 125 
TEMPERATURE (°C) 

LT11B9-TPC04 

Common-Mode Limit 
vs Temperature 



-o 

-5-1. 
■Jk. 

!l- 

3 O 
3 Q- 

= ° 3 

11 o 

3 LU 

>£ 2 

1 

V"+1 





















































V* 


= 5V 


TO 2 


ov 


















































































































V" = -5VT0-20V 















Input Bias and Offset Currents 
vs Chip Temperature 



Input Bias and Offset Currents 
Over the Common-Mode Range 



30n 
I ion 
E 3n 
\ 1n 

3 

;300p 
^100p 
: 30p 
I 10p 
5 3P 
I 1p 
3p 



V S = ±15V 








"V C M = - 


1 TO 1 3 


V 




















BIA 


S / 








CURRENT/ 




















^OFFSET 










CURRE 


ill 























25 50 75 100 125 
TEMPERATURE ("C) 

LT116S-TPC05- 

Common-Mode Rejection Ratio 
vs Frequency 



-20 20 60 100 140 
TEMPERATURE (°C) 

LT11S9-TPC07 




10k 100k 1M 

FREQUENCY (Hz) 



T A = 25 D C 












15V 


























BIAS C 


URREN 


T 












r 






OFFS 


TCURF 


ENT- 



















































-15 -10 -5 5 10 15 
COMMON-MODE RANGE (V) 

LT1169-TPCOS 

Power Supply Rejection Ratio 
vs Frequency 



120 
' 100 
80 
60 
40 
20 












Ta 


25°C 










SRR 






-PSR 















































mni'i-VP;;;* 



10 100 1k 10k 100k 1M 10M 
FREQUENCY (Hz) 

LT116S-rPEM 




2-59 



LT1169 




Output Voltage Swing 
vs Load Current 



f -0.8 
-1.0 
r-1.2 
[-1.4 
' -1.6 
j 1.4 

: 1.2 
! 10 

l 0.8 
0.6 
-+0.4 









2 


5-C 






1 

125"C 














55°t 




















































Ys = 


tSV 


TO i 


20V 


























































5'C 


































1 


26 C 




25°C 
1 









-10 -8 -6 -4 -2 2 4 6 8 10 
' SINI < OUTPUT CURRENT (mA) 'SOURCE 



Capacitive Load Handling 



1 1 1 — 

V S = ±15V 
T A = 25"C 
-R L >10k 
Vq = 100mVp.p 
A v = *10, R F = 10k, C F = 20pF 



A v =1 



Ay = 10 



LT11S9.IPC16 



1 10 100 1000 10000 
CAPACITIVE LOAD (pF) 

, 



Slew Rate and Gain-Bandwidth 
Product vs Temperature 



5 

a 4 
. . 

£ 3 

ec 

3 

S 2 
1 
























SLEW 


RATE 














GAIf 


-BAH 


NMD 


rH 























































-75 -50 -25 25 50 75 100 125 
TEMPERATURE (°C) 

LTiira-TPCia 



o M 



Distribution of Offset Voltage Drift 
with Temperature 



V S = ±15V 












13d 


OP A 


HPS 


















r 





















































































































Warm-Up Drift 



-50 -40 -30 -20 -10 10 20 30 
OFFSET VOLTAGE DRIFT WITH TEMPERATURE (nW°C) 

Lms9-rpci9 



1 

T A = 25°C 
V s = i15V 
N8 PACKAGE 



































































1 2 3 4 6 6 
TIME AFTER POWER ON (MIN) 

LI11W-TPOO 



Channel Separation vs Frequency 




10 100 1k 10k 100k 1M 10M 
FREQUENCY (Hz) 



LIH69-TP01 



2-60 



LT1169 



TYPicni p€RFORmnnc€ charactcristics 



THD and Noise vs 

Frequency for Noninverting Gain 



"0.0001 




THD and Noise vs 
Frequency for Inverting Gain 



= Z L = 2kl|15pF 
V = 20V P . P 
A v = -1.-10, -100 
MEASUREMENT BANDWIDTH; 
10Hz TO 80kHz 




FREQUENCY (Hz) 



THD and Noise vs Output 
Amplitude for Inverting Gain 



Z L = 2k 1 1 15pF 
f = 1 kHz 

A v = -1. -10, -100 
MEASUREMENT BANDWIDTH IMk 
= 10HzTO 22kHz 




1 10 
OUTPUT SWING (Vp.p) 



THD and Noise vs Output 
Amplitude for Noninverting Gain 




OUTPUT SWING (Vp.p) 



CCIF IMD Test (Equal Amplitude 
Tones at 13kHz, 14kHz)* 




02 0.1 1 10 30 

OUTPUT SWING (Vp.p) 

'SEE LT1115 DATA SHEET FOR DEFINITION OF 
CCIF TESTING 



application inFonmnTion 

LT1169 vs the Competition 

With improved noise performance, the LT1 1 69 dual in the 
plastic DIP directly replaces such JFET op amps as the 
OPA21 1 1 , OPA2604, 0P21 5, and the AD822. The combi- 
nation of low current and voltage noise of the LT1169 
allows it to surpass most dual and single JFET op amps. 
The LT1 1 69 can replace many of the lowest noise bipolar 
amps that are used in amplifying low level signals from 
high impedance transducers. The best bipolar op amps 
will eventually lose out to the LT1169 when transducer 
impedance increases due to higher current noise. 



The extremely high input impedance (1 1 3 Q) assures that 
the input bias current is almost constant over the entire 
common-mode range. Figure 1 shows how the LT1169 
stands upto the competition. Unlikethe competition, as the 
input voltage is swept across the entire common-mode 
range the input bias current of the LT1 1 69 hardly changes. 
As a result the current noise does not degrade. This makes 
the LT1169 the best choice in applications where an 
amplifier has to buffer signals from a high impedance 
transducer. 



XTffiAg 



2-61 



LT1169 



nppucOTions mFORmnnon 



100 
80 



£ 20 



-60 
-80 
-100 



CURR 


NT NOISE - \2 








































DP215, 














H169 , 
















AD82 


2 













































-15 -10 -5 5 10 15 
COMMON-MODE RANGE (V) 



Figure 1. Comparison of LT1169, OP215, and AD822 
Input Bias Current vs Common-Mode Range 

Amplifying Signals from High Impedance Transducers 

The low voltage and current noise offered by the LT1 1 69 
makes it useful in a wide range of applications, especially 
where high impedance, capacitive transducers are used 
such as hydrophones, precision accelerometers, and 
photodiodes. The total output noise in such a system is 
the gain times the RMS sum of the op amp's input referred 
voltage noise, the thermal noise of the transducer, and the 
op amp's input bias current noise times the transducer 
impedance. Figure 2 shows total input voltage noise 
versus source resistance. In a low source resistance 
(< 5k) application the op amp voltage noise will dominate 




100 1k 10k 100k 1M 10M 100M 1G 
SOURCE RESISTANCE (12) 



SOURCE RESISTANCE = 2Rg = R 
• PLUS RESISTOR 

f PLUS RESISTOR II 1000pF CAPACITOR 
V„ = A v Vv„ 2 , PAMP|t4kTRt2iil B R 2 

Figure 2. Comparison of LT1169 and LT1124 Total Output 
1kHz Voltage Noise vs Source Resistance 



the total noise. This meansthe LT1 169 is superiorto most 
dual JFET op amps. Only the lowest noise bipolar op amps 
have the advantage at low source resistances. As the 
source resistance increases from 5k to 50k, the LT1169 
will match the best bipolar op amps for noise perfor- 
mance, since the thermal noise of the transducer (4kTR) 
begins to dominate the total noise. A further increase in 
source resistance, above 50k, is where the op amp's 
current noise component (2ql B R 2 ) will eventually domi- 
nate the total noise. At these high source resistances, the 
LT1 1 69 will out perform the lowest noise bipolar op amps 
due to the inherently low current noise of FET input op 
amps. Clearly, the LT1169 will extend the range of high 
impedance transducers that can be used for high signal- 
to-noise ratios. This makes the LT1 1 69 the best choice for 
high impedance, capacitive transducers. 

Optimization Techniques for Charge Amplifiers 

The high input impedance JFET front end makes the 
LT1169 suitable in applications where very high charge 
sensitivity is required. Figure 3 illustrates the LT1 1 69 in its 
inverting and noninverting modes of operation. A charge 
amplifier is shown in the inverting mode example; the gain 
depends on the principal of charge conservation at the 
input of the LT1169. The charge across the transducer 
capacitance Cs is transferred to the feedback capacitor Cp 
resulting in a change in voltage dV, which is equal to dQ/Cp. 
The gain therefore is 1 + Cp/Cs- For unity-gain, the Cp 
should equal the transducer capacitance plus the input 
capacitance of the LT1 1 69 and R F should equal Rg. 

In the noninverting mode example, the transducer current 
is converted to a change in voltage by the transducer 
capacitance, Cs. This voltage is then buffered by the 
LT1 1 69 with a gain of 1 + R1/R2. A DC path is provided by 
Rs, which is either the transducer impedance or an 
external resistor. Since Rs is usually several orders of 
magnitude greater than the parallel combination of R1 
and R2, Rb is added to balance the DC offset caused by the 
noninverting input bias current and Rs. The input bias 
currents, although small at room temperature, can create 
significant errors over increasing temperature, especially 
with transducer resistances of up to "lOOOMfl or more. 
The optimum value for R B is determined by equating the 
thermal noise (4kTR s ) to the current noise (2ql B ) times 
R s 2 . Solving for R s results in R B = R s = 2V T /I B . A parallel 



2-62 



LT1169 



nppucATions inFORmmion 



R2 
1k 

■vw 

C1 




C1 =C L <0.1nF 

OUTPUT SHORT CIRCUIT CURRENT (- 30mA) WILL LIMIT THE RATE 
AT WHICH THE VOLTAGE CAN CHANGE ACROSS LARGE CAPACITORS 



Figure 3. Inverting and Noninverting Gain Configurations 



Input: ±5.2 Sine Wave LT1169 Output 0PA2111 Output 




Figure 4. Voltage Follower with Input Exceeding the Common-Mode Range (V s = ±5V) 



amps. Two or three op amp instrumentation amplifiers, 
tracking voltage references and low drift active filters 
are some of the circuits requiring matching between two 
op amps. 

The well-known triple op amp configuration in Figure 5 
illustrates these concepts. Output offset isafunctionofthe 
difference between the two halves of the LT1 1 69. This error 
cancellation principle holds for a considerable 
number of input referred parameters in addition to 
offset voltage and bias current. Input bias current will 
be the average of the two noninverting input currents (Ib + ). 
The difference between these two currents (AIb + ) 
is the offset current of the instrumentation amplifier. Com- 
mon-mode and power supply rejections will be 
dependent only on the match between the two amplifiers 
(assuming perfect resistor matching). 

The concepts of common-mode and power supply 
rejection ratio match (ACMRR and APSRR) are best dem- 
onstrated with a numerical example: 



capacitor C B , is used to cancel the phase shift caused by 
the op amp input capacitance and Rb. 

Reduced Power Supply Operation 

To take full advantage of a wide input common-mode 
range, the LT1 1 69 was designed to eliminate phase rever- 
sal. Referring to the photographs in Figure 4, the LT1169 
is shown operating in the follower mode (A v = 1 ) at ±5V 
supplies with the input swinging ±5.2V. The output of the 
LT1 1 69 clips cleanly and recovers with no phase reversal, 
unlike the competition as shown by the last photograph. 
This has the benefit of preventing lockup in servo systems 
and minimizing distortion components. The effect of input 



and output ov 
er, as 




rdrive on one amplifier has no effect on the 
is bias 



itched Dual Op Amps 

In many applications the performance of a system 
depends on the matching between two operational ampli- 
fiers ratherthan the individual characteristics of the two op 



2-63 



LT1169 



nppucOTions iofor 




Cl 



GAIN - 100 - 
BANDWIDTH - 330kHz 
INPUT REFERRED NOISE = 8.7nW>/Hz AT 1kHz 
WIDEBAND NOISE DC TO 330kHz = 5.3nV nM s 
C L <0.01 M F 



Figure 5. Three Op Amp Instrumentation Amplifier 



Assume CMRR A = 50uA//V or 86dB, 
and CMRR B = 39u.V/Vor88dB, 
then ACMRR = 11nV/Vor99dB; 
if CMRR B = -39uV/V which is still 88dB, 
then ACMRR = 89|iV/Vor81dB 

By specifying and guaranteeing all of these matching 
parameters, the LT1169 can significantly improve the 
performance of matching-dependent circuits. 

Typical performance of the instrumentation amplifier: 

Input offset voltage = 0.8mV 

Input bias current = 4pA 



Input offset current = 3pA 
Input resistance = 10 13 Q 
Input noise = 3.4|iVp.p 

High Speed Operation 

The low noise performance of the LT1 1 69 was achieved by 
enlarging the input JFET differential pair to maximize the 
first stage gain. Enlarging the JFET geometry also increases 
the parasitic gate capacitance, which if left unchecked, can 
result in increased overshoot and ringing. When the feed- 
back around the op amp is resistive (Rp), a pole will be 
created with R F , the source resistance and capacitance 
(Rs.Cs), and the amplifier input capacitance (Cin = 1 .5pF). 
In closed-loop gain configurations with R$ and Rp in the 
MQ range (Figure 6), this pole can create excess phase shift 
and even oscillation. A small capacitor (Cp) in parallel with 
R F eliminates this problem. With R s (Cs + C| N ) = RpCp, the 
effect of the feedback pole is completely removed. 




OUTPUT 



Figure 6. 



typical nppucmions 



Unity-Gain Buffer with Extended Load Capacitance 
Drive Capability 




VOUT 



C1 =C L <0.1nF 

OUTPUT SHORT CIRCUIT CURRENT (- 30mA) WILL LIMIT THE RATE 
AT WHICH THE VOLTAGE CAN CHANGE ACROSS LARGE CAPACITORS 

= cf) 



Light Balance Detection Circuit 




V.0UT=1Mx(ll-lz) 

PD, PD 2 . HAMAMATSU S1336-5BK 

WHEN EQUAL LIGHT ENTERS PHOTODIODES. V 0U T < 3mV. 



2-64 



LT1169 



TVPicni nppucnnons 

Low Noise Hydrophone Amplifier with DC Servo 
i Wv 1 




Paralleling Amplifiers to Reduce Voltage Noise 




5. NOISE CURRENT AT INPUT INCREASES vn TIMES ,, ,, 

6. IF n = 5, GAIN = 1000, BANDWIDTH = 1 10kHz, RMS NOISE. DC TO 1 MHz = = 1 0(1 V 

LT1169-TA06 



2-65 



LT1169 



TVPicnt nppucflTions 



Acci 



i DC Servo 



ACCELEROMETER 
B & K MODEL 4381 
OR EQUIVALENT 
(800)442-1030 



R1 
100M 




R4C2 = R5C3 > R1 (1 + R2/R3) C1 
OUTPUT = 0.8mV/pC = 8.0mV/g" 
DC OUTPUT < 1.9mV 
OUTPUT NOISE = 8nV/*z AT 1kHz 

"PICOCOULOMBS 

■•g = EARTH'S GRAVITATIONAL CONSTANT 



10Hz Fourth Order Chebyshev Lowpass Filter (0.01 dB Ripple) 

237k 




1% TOLERANCES 

FOR V iN = 1 0Vp.p, V ut = -121dB AT ( > 330Hz 
= -6dB ATf = 16.3Hz 

LOWER RESISTOR VALUES WILL RESULT IN LOWER THERMAL NOISE AND LARGER CAPACITORS 



2-66 



urn 



LT1178S8 



TECHNOLOGY 20liA Max, Dual 

SO-8 Package, Single Supply 
Precision Op Amp 



F€RTUR€S 

■ 8-Pin SO Package 

■ 20|aA Max Supply Current per Amplifier 

■ 180liV Max Offset Voltage 

■ 350pA Max Offset Current 

■ 0.9uVp. P , 0.1 Hz to 10Hz Voltage Noise 

■ 1.5pAp. P , 0.1Hz to 10Hz Current Noise 

■ 0.6liV/°C Offset Voltage Drift 

■ Single Supply Operation: 

- Input Voltage Range Includes Ground 

- Output Swings to Ground While Sinking Current 

- No Pull-Down Resistors Are Needed 

■ Output Sources and Sinks 5mA Load Current 

PRCKRG€/ORD€R IflFORfTlflTIOn 



TOP VIEW 




S8 PACKAGE 
8-LEAD PLASTIC SOIC 

TjMAX-150°C,ejA.200°C/W 



ORDER PART 
NUMBER 



LT1178S8 



PART MARKING 



1178 



Please note that the LT1178S8 surface mount pinout differs from that of 
the LT1 178 standard plastic or ceramic dual-in-line packages. 
Consult factory for Industrial and Military grade parts. 



DCSCRIPTIOn 

The LT1 1 78S8 is a micropower dual op amp in the surface 
mount 8-pin package. It is optimized for single supply 
operation at 5V. Specifications are also provided at ±1 5V 
supplies. 

The extremely low supply current is combined with true 
precision specifications: offset voltage is 60llV, offset 
current is 50pA. Both offset parameters have low drift with 
temperature. The 1 .5pA P . P current noise and picoampere 
offset current permit the use of megohm level source 
resistors without introducing serious errors. Voltage noise 
at 0.9liV p .p is remarkably low considering the low supply 
current. 

The LT1 1 78S8 can be operated from a single supply as low 
as one lithium cell ortwo Ni-Cad batteries. The input range 
goes below ground. The all-NPN output stage swings to 
within a few millivolts of ground while sinking current- 
no power consuming pull-down resistors are needed. 

For applications where three times higher supply current 
is acceptable, the micropower LT1077 single, LT1078 
dual and LT1079 quad are recommended. The LT1077/ 
LT1078/LT1 079 havesignificantlyhigherbandwidth, slew 
rate; lowervoltagenoiseandbetteroutputdrive capability. 



€L€CTRICRL CHRRRCTCRISTICS 

Far electrical specifications not listed below, refer to the standard LT1178C data sheet with the changes noted on this page. 



SYMBOL 


PARAMETER 


CONDITIONS 


MIN TYP MAX 


UNITS 


Vos 


Input Offset Voltage 


V S = 5V,0V T A = 25°C 

V S = 5V,0V 0°C<T A <70°C 

V S = ±15V T A = 25°C 

V S = ±15V 0°C<T A <70°C 


60 180 
85 350 
120 350 
150 540 


nv 
uv 

pV 
uV 


AV 0S 
AT 


Input Offset Voltage Drift (Note 1) 


V S = 5V,0V 0°C<T A <70°C 
V S = ±15V 0°C<T A <70°C 


9 S 


HV/°C 

nwc 



Note 1: Not 10i 



TECHNOLOGY 



LT1413 

Single Supply, Dual 
Precision Op Amp 



FCHIUMS 

Single Supply Operation: 

■ Input Goes Below Ground 

■ Output Swings to Ground Sinking Current 

■ No Pull-Down Resistors Needed 

■ Phase Reversal Protection 

At 5V, OV Low Cost Grade Specifications: 

■ 280uV Max Offset Voltage 

■ 380pV Max in S8 Package 

■ 0.8nA Max Offset Current 

■ 480|aA Max Supply Current per Amplifier 

■ 0.5nV/°C Drift 

■ 1.4 Million Voltage Gain 

■ 950kHz Gain-Bandwidth Product 

■ 0.55u.Vp.p, 0.1 Hz to 10Hz Noise 



nppucOTions 



Single Supply Systems 

Two and Three Op Amp Instrumentation Amplifiers 
Active Filters 

Battery-Powered Systems 

Strain Gauge and Bridge Amplifiers 



D€SCRIPTIOH 

The LT1413 is a low cost, upgraded version of Linear 
Technology's industry standard LT1 01 3 dual, single sup- 
ply op amp. The LT1413 is optimized for single 5V appli- 
cations, although ±15V specifications are also provided 
for completeness. 

In the design of the LT1 41 3, particular emphasis has been 
placed on low cost plastic and S0-8 package performance: 
60p.V offset voltage, 0.1 nA offset current, in excess of 
1 0mA output current at 330uA supply current and 1 40dB 
channel separation are some of the specifications achieved. 

Other dual, single supply amplifiers are available to 
complementthe LT1 41 3family: the micropower LT1 078's 
supply current is 10 times lower with a 4.5 fold speed 
performance degradation compared to the LT1413. Con- 
versely, the LT1 21 1 , LT1 21 3 and LT1 21 5 duals have 4 to 
1 4 times higher supply current, but also 1 3 to 50 times 
higher speed. 

Protected by U.S. Patent 4,775.884. 



TYPICAL flPPUCOTIOn 



+90V, -3V Common-Mode Range 
Difference Amplifier (A v = 1) 



10M 

-vw 




10M — 1M 
+ — VW 



OUTPUT OFFSET = 1 .5mV 
(INPUT REFERRED = 125(iV) 
INPUT RESISTANCE = 1 1 M 
BANDWIDTH = 80kHz 



(THE 0.1nA TYPICAL OFFSET CURRENT 
PERMITS THE USE OF 1MQ RESISTORS) 



Distribution of Input Offset Voltage 
(In Plastic DIP, N8 Package) 



30 
25 
1 20 
£ 15 

K 

a 10 

5 



U s = 5V, 0V 
Ta = 25°C 





















































































-300 -200 -100 100 200 300 
INPUT OFFSET VOLTAGE (|jV) 



2-68 



jtwm 



LT1413 



RBsoiuT€ mnximum rrtmgs 

Supply Voltage ±22V 

Differential Input Voltage ±30V 

Input Voltage 

Equal to Positive Supply Voltage 

5V Below Negative Supply Voltage 



Output Short-Circuit Duration Indefinite 

Operating Temperature Range -40°C to 85°C 

Storage Temperature Range -65°C to 150°C 

Lead Temperature (Soldering, 10 sec) 300°C 

Note: When the input voltage exceeds the maximum ratings, the input current should be limited 
to 10mA. 



PRCKRG€/ORD€R IfiFORfTlflTIOn 



OUT A (T 
-IN A [7 



— c 


J 




ft 



jj V* 



n8 package 
8-lead plastic dip 

t jmm = ioo°c.8j A = i30°c/w 



ORDER PART 
NUMBER 



LT1413ACN8 
LT1413CN8 



+INA [T 

+IN B [3 
-IN B | 4 



J] -IN A 
T] OUT A 
T] V* 
7] OUTB 



S8 PACKAGE 
8-LEAD PLASTIC SOIC 

NOTE: THIS PIN CONFIGURATION DIFFERS FROM 
THE 8-LEAD DIP PIN LOCATIONS. INSTEAD, IT 
FOLLOWS THE INDUSTRY STANDARD LT1013DS8 
SO PACKAGE CONFIGURATION. 

TjMAX = 105°C.e JA = 200°C/W 



ORDER PART 
NUMBER 



LT1413S8 



S8 PART MARKING 



1413 



Consult factory for Industrial and Military grade parts. 



€L€CTRICRL CHRRRCT€RISTICS V s = 5V, 0V, V CM = 0.1 V. V = 1.4V, T A = 25 C. unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS {Note 1) 


LT1413ACN8 
MIN TYP 


MAX 


LT1413CN8/S8 
MIN TYP MAX 


UNITS 


Vos 


Input Offset Voltage 


LT1413N8 
LT1413S8 




50 


150 




60 
80 


280 
380 


liV 

uV 


AV 0S 

ATime 


Long-Term Input Offset 
Voltage Stability 




0.4 


0.5 


u.V/Mo 


los 


Input Offset Current 






0.1 


0.7 




0.1 


0.8 


nA 


Ib 


Input Bias Current 






9 


15 




9 


18 


nA 


e n 


Input Noise Voltage 


O.IHzto 10Hz (Note 2) 




0.55 


1.1 


0.55 


nV P .p 




Input Noise Voltage Density 


f = 10Hz(Note2) 
f = 1000Hz (Note 2) 




24 

23 


38 
30 


24 
23 


nV/Vfiz 
nV/VHz 


in 


Input Noise Current 


O.IHzto 10Hz 


2.8 


2.8 


pAp.p 




Input Noise Current Density 


f = 10Hz 
f = 1000Hz 


0.07 
0.02 


0.07 
0.02 


pA/VHz 
pAAflz 




Input Resistance 
Differential Mode 
Common Mode 


(Note 3) 


300 


500 
3 




250 


500 

3 




MQ 
G£2 




Input Voltage Range 




3.65 



3.8 
-0.3 




3.65 



3.8 
-0.3 




V 
V 


CMRR 


Common-Mode Rejection Ratio 


V CM = 0V to 3.65V 


90 


101 




88 


101 


dB 


PSRR 


Power Supply Rejection Ratio 


V S = 3.2V to 12V 


102 


118 




100 


118 




[IB 


Avol 


Large-Signal Voltage Gain 


V = 0.05V to 4V, No Load 
V = 0.05V to 3.5V. R L = 2k 


400 
300 


1400 
1000 




350 
250 


1400 
1000 




V/mV 
V/mV 



XTUSHSB 



2-69 



LT1413 



€ ICCTRICAl CHflfiflCTCfilSTICS V S = 5V, OV, V CM = 0.1 V, V = 1 .4V, T A = 25 C, unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS 


1 T-t iM 1 JIPIilO 

LT1413AIN8 
MIN TYP MAX 


1 T4 jM OPMQ /CO 

Lll413LNo/bo 
MIN TYP MAX 


UNITS 




Maximum Output Voltage Swing 


Output Low, No Load 
Output Low, 600ntoGI\ID 
Output Low, Isink = 1 m A 
Output High, No Load 
Output High, 600Q to GND 


15 25 
5 10 
220 350 
4.1 4.4 
3.4 4.0 


15 25 
5 10 
220 350 
4.1 4.4 
3.4 4.0 


mV 
mV 
mV 
V 
V 


SR 


Slew Rate 


A v = 1 


0.2 0.3 


0.2 0.3 


V/ns 


GBW 


Gain-Bandwidth Product 


f < 100kHz (Note 4) 


600 950 


600 950 


kHz 


Is 


Supply Current per Amplifier 




330 450 


330 480 


MA 




Channel Separation 


AV| N = 3V, R L = 2k (Note 5) 


125 140 


123 140 


dB 




Minimum Supply Voltage 


(Note 6) 


2.85 3.0 


2.85 3.0 


V 


V s = 5V, OV, V CM = 0.1 V, V = 1 .4V, 0°C < T A < 70°C, unless otherwise noted. 


SYMBOL 


PARAMETER 


CONDITIONS (Note 1) 


LT1413ACN8 
MIN TYP MAX 


LT1413CN8/S8 
MIN TYP MAX 


UNITS 


Vos 


Input Offset Voltage 


LT1413N8 
LT1413S8 




65 240 


80 390 
100 490 


u.V 


AV 0S /AT 


Input Offset Voltage Drift 


(Note 5) 




0.3 2.0 


0.4 2.5 


nv/°c 


'os 


Input Offset Current 






0.1 1.0 


0.1 1.2 


nA 


!b 


Input Bias Current 






10 20 


10 23 


nA 


CMRR 


Common-Mode Rejection Ratio 


V CM = 0Vto3.6V 




88 100 


85 100 


dB 


PSRR 


Power Supply Rejection Ratio 


V s = 3.45V to 12V 




100 117 


97 117 


dB 


AVOL 


Large-Signal Voltage Gain 


V = 0.07V to 3.9V, No Load 
V = 0.07V to 3.2V, R L = 2k 




300 1100 
200 800 


300 1100 
200 800 


V/mV 
V/mV 




Maximum Output Voltage Swing 


Output Low, No Load 
Output Low, Isink = 1rnA 
Output High, No Load 
Output High, 600£JtoGND 




18 32 
270 430 
4.0 4.3 
3.3 3.9 


18 32 
270 430 
4.0 4.3 
3.2 3.9 


mV 
mV 

V 
V 


Is 


Supply Current per Amplifier 




• 


350 500 


350 530 


uA 




V s = 5V, OV, Vcm = 0.1V, V = 1.4V, -40°C <T fl <85°C (Note 7) 


SYMBOL 


PARAMETER 


CONDITIONS (Note 1) 


LT1413ACN8 
MIN TYP MAX 


LT1413CN8/S8 
MIN TYP MAX 


UNITS 


Vos 


Input Offset Voltage 


LT1413N8 
LT1413S8 


• 
• 


70 300 


85 470 
110 570 


nv 
nv 


AV 0S /AT 


Input Offset Voltage Drift 






0.3 2.2 


0.4 2.8 


M-V/°C 


I OS 


Input Offset Current 






0.2 1.4 


0.2 1.7 


nA 


Ib 


Input Bias Current 






11 25 


11 30 


nA 


CMRR 


Common-Mode Rejection Ratio 


V CM = 0V to 3.4V 




85 99 


82 99 


dB 


PSRR 


Power Supply Rejection Ratio 


V S = 3.9V to 12V 




98 116 


94 116 


dB 


Avol 


Large-Signal Voltage Gain 


V = 0.08V to 3.8V, No Load 
V = 0.08V to 3.0V, R L = 2k 




220 1000 
150 700 


220 1000 
150 700 


V/mV 
V/mV 




Maximum Output Voltage Swing 


Output Low, No Load 
Output Low, Isink = 1mA 




20 38 
300 480 


20 38 
300 480 


mV 
mV 






Output High, No Load 
Output High, 600Q to GND 




3.9 4.2 
3.1 3.8 


3.9 4.2 
3.0 3.8 


V 
V 


Is 


Supply Current per Amplifier 






360 550 


360 580 


MA 



2-70 



jL-J tech wudB 



LT1413 



€l€CTRICAl CHRRflCT€RISTICS V s = =15V.T fl = 25C unless otherwise noted. 











LT1413ACN8 


LT1413CN8/S8 




bTIYlDUL 


DRDKMCTCQ 

rAHAMt I tn 


CONDITIONS (Note 1 ) 




MIN 


TYP 


MAX 


MIN 


TYP 


MAX 


UNITS 


Vos 


Input Onset voltage 


LT1413N8 
LT1413S8 




75 


280 




90 
110 


480 
580 


uV 


los 


Input Offset Current 






0.1 


0.7 




0.1 


0.8 


nA 


!b 


Input Bias Current 




8 15 


8 18 


nA 




Input Voltage Range 




13.5 
-15.0 


13.8 
-15.3 




13.5 
-15.0 


13.8 
-15.3 




V 
V 


CMRR 


Common-Mode Rejection Ratio 


V CM = 13.5V, -15V 


100 


117 




97 


114 




dB 


PSRR 


Power Supply Rejection Ratio 


V s = ±2Vto±18V 


103 


120 




100 


117 




dB 


AvoL 


Large-Signal Voltage Gain 


V = ±10V, R L = 2k 


1500 


5000 




1200 


4000 




V/mV 


VOUT 


Maximum Output Voltage Swing 


R[_ = 2k 




±13 


±14 




±12.5 


+14 




V 


SR 


Slew Rate 






0.2 


0.4 




0.2 


0.4 




V/ps 


Is 


Supply Current per Amplifier 






350 


500 




350 


550 


MA 


V s = +15V, 0°C < T A < 70°C, unless otherwise noted. 










LT1413ACN8 


LT1413CN8/S8 




SYMBOL 


PARAMETER 


CONDITIONS (Notel) 




MIN 


TYP 


MAX 


MIN 


TYP 


MAX 


UNITS 


Vos 


Input Offset Voltage 


LT1413N8 
LT1413S8 






95 


390 




110 
130 


620 
720 


uV 
U.V 


AV 0S /AT 


Input Offset Voltage Drift 


(Note 5) 






0.4 


2.5 




0.5 


3.0 


u.V/°C 


los 


Input Offset Current 








0.1 


1.0 




0.1 


1.2 


nA 


Is 


Input Bias Current 








9 


20 




9 


23 


nA 


AvOL 


Large-Signal Voltage Gain 


V = ±10V, R L = 2k 




1000 


4000 




700 


3000 




V/mV 


CMRR 


Common-Mode Rejection Ratio 


V CM = 13V,-15V 




98 


116 




94 


113 




dB 


PSRR 


Power Supply Rejection Ratio 


V s = ±2Vto+18V 




101 


119 




97 


116 




dB 




Maximum Output Voltage Swing 


Rl = 2k 




+12.5 


±13.9 




±12.0 


±13.9 




V 


Is 


Supply Current per Amplifier 








360 


550 




360 


600 


uA 


V s = ±15V, -40°C < T A < 85°C (Note 7) 










LT1413ACN8 


LT1413CN8/S8 




SYMBOL 


PARAMETER 


CONDITIONS (Note 1) 




MIN 


TYP 


MAX 


MIN 


TYP 


MAX 


UNITS 


Vos 


Input Offset Voltage 


LT1413N8 
LT1413S8 






100 


460 




120 
140 


700 
800 


U.V 
M-V 


AV 0S AT 


Input Offset Voltage Drift 








0.4 


2.8 




0.5 


3.3 


HV/°C 


los 


Input Offset Current 








0.2 


1.4 




0.2 


1.7 


nA 


Ib 


Input Bias Current 








10 


25 




10 


30 


nA 


AvOL 


Large-Signal Voltage Gain 


Vrj = ±10V, Rl = 2k 




800 


3000 




500 


2400 




V/mV 


CMRR 


Common-Mode Rejection Ratio 


V CM = 13V,-15V 




97 


115 




92 


112 




dB 


PSRR 


Power Supply Rejection Ratio 


V s ±2Vto±18V 




100 


118 




95 


115 




dB 




Maximum Output Voltage Swing 


Rl = 2k 




±12.2 


±13.8 




±11.8 


±13.8 




V 


Is 


Supply Current per Amplifier 








370 


580 




370 


630 


MA 



The • denotes specifications which apply over the full operating 
temperature range. 

Note 1: Typical parameters are defined as the 60% yield of parameter 

distributions of individual amplifiers; i.e., out of 100 LT1413s typically 120 

op amps will be better than the indicated specification. 

Note 2: This parameter is tested on a sample basis only. All noise 

parameters are tested with V s = ±2.5V, V = 0V. 

Note 3: This parameter is guaranteed by design and is not tested. 



Note 4: Gain-Bandwidth Product is not tested. It is inferred from the slew 
rate measurement. 

Note 5: This parameter is not 100% tested. 

Note 6: At the minimum supply voltage, the offset voltage changes less 

than 200nV compared to its value at 5V, 0V. 

Note 7: The LT1413 is not tested and is not quality-assurance sampled at 

-40°C and at 85°C. These specifications are guaranteed by design, 

correlation and/or inference from 0°C, 25°C and/or 70°C tests. 



2-71 



LT1413 



Tvpicfii P€RFonmnnc€ cHnnncTCRisTics 



Distribution of Input Offset Voltage 
In S8 Package) 



1 1 

V s = 5V, OV 
T A = 25"C 






















L 



















































































-4OO~30O~20O~1O0 100 200 300 
INPUT OFFSET VOLTAGE (nV) 

LTMtJ-TMI 



400 



Supply Current vs Temperature 



< 

S 350 





























V 


S = ±15 


V^ 














S = 5V. 


OV 























25 50 
TEMPERATURE (°C) 



Output Saturation vs Sink 
Current vs Temperature 




25 50 
TEMPERATURE (°C) 



250 
• 200 



E 

it 100 



S 50 




Input Offset Current vs Temperature 







































's = 5V 
M=0. 


,0V 

v y 










v c 


























^V 




v 



























































-40 -20 20 40 60 80 100 
TEMPERATURE (°C) 

LTM1WAM 



Input Bias Current vs Temperature 



-7 

-40 -20 





































V C M = 


5V.0V 

o.iv^ 








































S = ±1 


5V 























































20 40 60 
TEMPERATURE (>C) 



Input Bias Current vs 
Common-Mode Voltage 



15 

~ 10 
> 

1— J 

O 

> 

a 

o 

S 

|-5 

a 

o 

" -10 
-15 







\ 






T A = 25 

I 


c 




V S = : 


b15V 




Vs 


5V, 


V 












































i 































-2 -4 -6 -8 -10 -12 -14 -16 
INPUT BIAS CURRENT (nAj 

LT1413-TA0B 



0.1Hz to 10Hz Noise 



Noise Spectrum 



Minimum Supply Voltage 



T 
V 


I 1 1 

I = 25°C 














an 


±1 
























































H 


t 












Mi 





















































































TIME (SECONDS) 




10 100 
FREQUENCY (Hz) 



NONF 


UNCTI0 


NAL. 




V" 


= 0V 










T A = -4 


)°C 

o°c 












- T A = 

- 1*A = 


25'C 
85°C 








IV 


V 



















3 4 5 

POSITIVE SUPPLY VOLTAGE (V) 

LTHU-TAtl 



2-72 



xrurau 



LT1413 



Tvpicni p€RFonmnnc€ cHnnncTCRisTics 





140 




120 




too 








8u 






CD 


60 


--■ 




£ 


40 






> 






20 









-20 



Voltage Gainvs Frequency 













T A = 25"C 














<<L= 


Oup 






















































b15V 














V 01 













































0.01 0.1 1 10 100 1k 10k 100k 1M 10M 
FREQUENCY (Hz) 



Gain, Phase vs Frequency 



Channel Separation vs 
Frequency 




0.3 1 3 

FREQUENCY (MHz) 



100 1k 10k 100k 
FREQUENCY (Hz) 



Common-Mode Rejection Ratio 
vs Frequency 









T A = 25"C 








Vs = ±15 


/ 






V S = 5 


V.OV^ 



































120 
ST 

§ 100 
1 80 

t— 

o 

S 60 
az 

>- 

£ 40 

cn 

| 20 



Power Supply Rejection Ratio 
vs Frequency 





\Vs = 5 


V, ov* 




T A = 25°C 


N 

£ 


.GATiVE \ 
IIPPIY > 






POSITIVE 
\ SI IPPI Y 


±15V 








V\ ±1 


5V 













































Small Signal Transient 
Response, V s = ±15V 




100 1k 10k 100k 
FREQUENCY (Hz) 



1M 



1 10 100 1k 10k 100k 1M 
FREQUENCY (Hz) 



Small Signal Transient Large Signal Transient Large Signal Transient 

Response, V S = 5V, 0V Response, V s = 5V, 0V Response, V S = ±15V 




urns 



2-73 



LT1413 



nppucATions mFORmnnon 



Single Supply Operation 

The LT1413 is fully specified for single supply operation, 
i.e., when the negative supply is OV. Input common-mode 
range includes ground; the output swings within a few 
millivolts of ground. 

If the input is more than a few hundred millivolts below 
ground, two distinct problems can occur on previous 
single supply designs, such as the LM1 24, LM1 58, OP-21 
and OP-221. 



other amplifier out of negative saturation for the phase 
reversal protection to function properly. 

Since the output of the LT1413 cannot go exactly to 
ground, but can only approach ground to within a few 
millivolts, care should be exercised to ensure that the 
output is not saturated. For example, a 1mV input signal 
will cause the amplifier to set up in its linear region 
in the gain 100 configuration shown below, but is not 
enough to make the amplifier function properly in the 
voltage-follower mode. 



Gain 100 Amplifier 



j-VA-A- 



a) When the input is more than a diode drop below 
ground, unlimited current will flow from the substrate 
(V" terminal) to the input. This can destroy the unit. On 
the LT1413, the 400Q resistors, in series with the input 
(see Schematic Diagram), protect the devices even when 
the input is 5V below ground. 

b) When the input is more than 400mV below ground 
(at 25°C), the input stage saturates (transistors Q3 and 
Q4) and phase reversal occurs at the output. This can 
cause lock-up in servo systems. Due to a unique phase 
reversal protection circuitry (Q21, Q22, Q27, Q28), the 
LT1413 outputs do not reverse, as illustrated below, 
even when the inputs are at -1 .5V. Keep the output of the 

Voltage Follower with Input Exceeding the Negative Common-Mode Range 



Voltage Follower 




Figure 1. 
Comparator Applications 

The single supply operation of the LT1413 lends itself to 
its use as a precision comparator with TTL compatible 
output; the response time is shown below. 






6V P .p INPUT, -1.5V TO 4.5V 



LM324, LM358. OP-221 
EXHIBIT OUTPUT PHASE REVERSAL 

LTU13.rft22 



LT1413 
NO PHASE REVERSAL 



Comparator Rise Response Time 
10mV, 5mV, 2mV Overdrives 



Comparator Fall Response Time 
to 10mV, 5m V, 2mV Overdrives 





2-74 



rrunm 

TECHNOLOGY 




2-75 




TECHNOLOGY 



LT1457 



Dual, Precision 
JFET Input Op Amp 



F€RTUR€S 

■ Handles 10, OOOpF Capacitive Load 

■ 450ltV Max Offset Voltage 

■ 1200liV Max Offset Voltage in S8 Package 

■ 50pA Bias Current at 70 C 

■ 13nV/VHz Voltage Noise 

■ 4V/ps Slew Rate 

■ 4liV/°C Drift 

■ 130dB Channel Separation 

nppucOTions 

■ Sample-and-Hold (Drives Large Hold Capacitors) 

■ A/D and D/A Converters 

■ Photodiode Amplifiers 

■ Voltage-to-Frequency Converters 



D€SCRIPTIOn 

The L.T1457 is a dual, JFET input op amp optimized for 
handling large capacitive loads in combination with preci- 
sion performance. 

Precision specifications include 220|iV offset voltage in 
plastic and surface mount packages. At 70°C input bias 
current is 50pA, input offset current is 20pA. Channel 
separation is 130dB. 

Other dual JFET input op amps from Linear Technology 
include the LT1057, which is three times faster than the 
LT1 457 but at the expense of significantly lower capacitive 
load handling capability; and the LT1113 with 4.5nV/VHz 
voltage noise. 



TVPICflL P€RFORITinnC€ CHARACTERISTICS 



Capacitive Load Handling 




1 10 
CAPACITIVE LOAD (nF) 



input Offset Voltage Distribution 
S8 Package 



V S = ±15V 
t. - r>z°r 






400 DUALS 
(800 OP AMPS) 
TESTED FROM 
3 RUNS 










































































I 


■ 


I 


r 


■ 


■ 




1 


I 


■ 



MP' i 



-1 .0-0.8 -0.6-0.4 -0.2 0.2 0.4 0.6 0.8 1.0 
INPUT OFFSET VOLTAGE (mV) 



2-76 



LT1457 



rbsolutc mnximum rrtirgs 

Supply Voltage ±20V 

Differential Input Voltage ±40V 

Input Voltage Equal to Supply Voltages 

Output Short-Circuit Duration Indefinite 

Operating Temperature Range -40°C to 85°C 

Storage Temperature Range -65°C to 150°C 

Lead Temperature (Soldering, 10 sec) 300°C 



PRCKRG€/ORD€R IflFORmflTIOn 




N8 PACKAGE 
8-LEAD PLASTIC DIP 
TjMAX = 1'5 ,, C.ej J = 130°C/W 



TOP VIEW 



♦IN A [T 
tINB [¥ 

-in b it 



_>>-!_ 



jFJ -IN A 
7] OUT A 

T\ v* 

T] OUTB 



S8 PACKAGE 
8-LEAD PLASTIC SOIC 

NOTE: THIS PIN CONFIGURATION DIFFERS FROM 
THE 8-LEAD DIP PIN LOCATIONS. INSTEAD, IT 
FOLLOWS THE INDUSTRY STANDARD LT1013DS8 
SO PACKAGE CONFIGURATION. 

Tjmax = 130°C, 9ja = 190"C/W 



ORDER PART 
NUMBER 



LT1457ACN8 
LT1457CN8 



LT1457S8 



S8 PART MARKING 



1457 



Consult factory for Industrial and Military grade parts. 



€l€CTRICRl CHRRRCTCRISTKS V s = ±15V, T A = 25 C,V CM = 0V unless otherwise noted. (Note 1) 



SYMBOL 


PARAMETER 


CONDITIONS 


LT1457AC 
MIN TYP MAX 


LT1457C/LT1457S8 
MIN TYP MAX 


UNITS 


Vos 


Input Offset Voltage 


LT1457AC/C 
LT1457S8 


150 450 


200 800 
220 1200 


uV 
uV 


los 




Input Offset Current 


Fully Warmed Up 


3 40 


4 50 


PA 


Ib 


Input Bias Current 


Fully Warmed Up 


+5 +50 


±7 ±75 


PA 




Input Resistance-Differential 

-Common-Mode 


V CM = -11Vto 8V 
V C M = 8Vto11V 


10 12 
10 12 
10 11 


10 12 
10 12 
10 11 


£2 

a 
n 




Input Capacitance 




4 


4 


PF 




Input Noise Voltage 


O.IHzto 10Hz 


2.0 


2.1 


uVp-p 


e„ 


Input Noise Voltage Density 


f = 10Hz 

f = 1kHz (Note 2) 


26 

13 22 


28 

14 24 


nV, .Hz 
nV/VHz 


in 


Input Noise Current Density 


f = 10Hz, 1kHz (Note 3) 


1.5 4 


1.8 6 


(A/VHz 


AVOL 


Large-Signal Voltage Gain 


V = ±10V, R L = 2k 
V = ±10V. R|_ = 1k 


150 350 
120 250 


100 300 
80 220 


V/mV 
V/mV 




Input Voltage Range 




+10.5 14.3 
-11.5 


±10.5 14.3 
-11.5 


V 
V 


CMRR 


Common-Mode Rejection Ratio 


V CM = ±10.5V 


86 100 


82 98 


dB 


PSRR 


Power Supply Rejection Ratio 


V s = ±4.5Vto±18V 


88 103 


86 102 


dB 


VOUT 


Output Voltage Swing 


R L = 2k 


±12 ±13 


±12 ±13 


V 


SR 


Slew Rate 




2 4 


2 4 


V/us 



2-77 



LT1457 



€l€CTRKRl CHARACTERISTICS V s = +.15V, T A = 25 C,V CM = OV unless otherwise noted. (Note 1) 



SYMBOL 


PARAMETER 


CONDITIONS 


LT1457AC 
MIN TYP MAX 


LT1457C/LT1457S8 
MIN TYP MAX 


UNITS 


GBW 


Gain-Bandwidth Product 


(Note 5) 


1.0 1.7 


1.0 1.7 


MHz 


is 


Supply Current Per Amplifier 




1.8 3.0 


1.8 3.0 


mA 




Channel Separation 


DC to 5kHz, V IN = ±10V 


132 


130 


dB 


€l€CTR ICR I CHARACTERISTICS V s = +15V, V CM = OV, 0°C < T A < 70 C. unless otherwise noted. 


SYMBOL 


PARAMETER 


CONDITIONS 


LT1457AC 
MIN TYP MAX 


LT1457C/LT1457S8 
MIN TYP MAX 


UNITS 


Vos 


Input Offset Voltage 


LT1457AC/C 
LT1457S8 


• 
• 


250 900 


330 1500 
400 1900 


uV 
pV 




Average Temperature Coefficient of 
Input Offset Voltage (Note 4) 




• 


3 10 


4 16 


u.V/°C 


los 


Input Offset Current 


Warmed Up, T A = 70°C 




18 150 


20 250 


pA 


Ib 


Input Bias Current 


Warmed Up, T A = 70°C 




±50 ±250 


±60 ±350 


pA 


AvOL 


Large-Signal Voltage Gain 


V = ±10V, R[_ = 2k 




70 220 


50 200 


V/mV 


GMRR 


Common-Mode Rejection Ratio 


V CM = ±10.4V 




85 98 


80 96 


dB 


PSRR 


Power Supply Rejection Ratio 


V s = ±4.5Vto+18V 




87 102 


84 100 


dB 


Vout 


Output Voltage Swing 


R L = 2k 




±12 ±12.8 


+12 +12.8 


V 


Is 


Supply Current Per Amplifier 


T A = 70°C 




3.2 

1.7 


3.2 

1.7 


mA 
mA 



€L€CTRICRL CHARACTERISTICS 



V s = ±15V, V C m = 0V, -40°C < T A < 85°C, unless otherwise noted. (Note 6) 



SYMBOL 


PARAMETER 


CONDITIONS 


MIN 


LT1457AC 
TYP 


MAX 


LT1457C/LT1457S8 
MIN TYP MAX 


UNITS 


Vos 


Input Offset Voltage 


LT1457AC/C 
LT1457S8 


• 
• 




350 


1100 




400 
500 


1800 
2300 


UV 
u.V 




Average Temperature Coefficient of 
Input Offset Voltage 




• 




3 


10 




4 


16 


U.WC 


los 


Input Offset Current 


Warmed Up, T A = 85°C 






0.1 


0.5 




0.1 


0.6 


nA 


Ib 


Input Bias Current 


Warmed Up, T A = 85°C 






±0.2 


±0.7 




±0.2 


±0.9 


nA 


AvOL 


Large-Signal Voltage Gain 


V = ±10V, R L = 2k 


• 


40 


120 




30 


110 




V/mV 


CMRR 


Common-Mode Rejection Ratio 


V CM = ±10.4V 


• 


84 


97 




80 95 


dB 


PSRR 


Power Supply Rejection Ratio 


V s = ±5Vto±17V 


• 


86 100 


83 98 


dB 


Vout 


Output Voltage Swing 


R L = 2k 


• 


±12 


±12.7 




±12 


±12.6 




V 


Is 


Supply Current Per Amplifier 


T A = -40°C 
T A = 85°C 






1.7 


3.8 




1.7 


3.8 


mA 
mA 



The • denotes the specifications which apply over the full operating 
temperature range. 

Note 1: Typical parameters are defined as the 60% yield of distributions of 

individual amplifiers; i.e., out of 100 LT1457s (200 op amps) typically 120 

will be better than the indicated specification. 

Note 2: This parameter is tested on a sample basis only. 

Note 3: Current noise is calculated from the formula: i n = (2qlb)" 2 , where 

q = 1.6 x 10" 19 coulomb. The noise of source resistors up to 1G£2 

swamps the contribution of current noise. 



Note 4: This parameter is not 100% tested. 

Note 5: Gain-Bandwidth product is not tested. It is guaranteed by design 

and by inference from the slew rate measurement. 

Note 6: The LT1457 is not tested and not quality-assurance-sampled at 

-40°C and at 85°C. These specifications are guaranteed by design, 

correlation, and/or inference from 0°C, 25°C, and 70°C tests. 



2-78 



LT1457 



TYPICAL P€RFORfTinnC€ CHRRRCKRISTICS 

Input Bias and Offset Current vs 



1000 

i 300 

c 
c 

i too 



1 

V S = ±15V 

v CM = ov 

\fl/nDfiflcn i id 
















BIASC 


JRRENT/ 
















-^OFFSET 


URRENT 



25 50 75 100 

AMBIENT TEMPERATURE (-C) 



LTM57-TPC01 



Input Offset Voltage Distribution 
N8 Package 



V S = ±15V 
■ T A = 25'C - 



_ 



900 DUALS 
(1800 OP AMPS) 
TESTED FROM 3 
RUNS 



-0 8 -0.6 -0.4 -0.2 0.2 0.4 0.6 0.8 
INPUT OFFSET VOLTAGE (mV) 



Input Bias Current Over 
the Common-Mode Range 



140 
5 120 
t; 100 

£ 80 

rD 

% 60 

t 40 
a. 

5 20 


-20 



V S = ±15V 








I 






























T 


, = 70°C 
















I 




































25°C " 










Ta = 



-15 -10 -5 5 10 15 
COMMON-MODE INPUT VOLTAGE (V) 



lt1«7.TPCIB 



Voltage Gain vs Temperature 



g- 300 

E 











15V — 








= 2k — 


-V s = j 






— R L 


:v = 


10V_ 























































































































-50 -25 25 50 75 100 
TEMPERATURE (°C) 



Warm-Up Drift 



3 120 



v s = 
t a =: 


15V 
5°C 














'. S8 PAC 


KAGE 


























N8PAC 


(AGE 













1 2 3 4 5 

TIME AFTER POWER ON (MINUTES) 



Long Term Drift of 
Representative Units 




12 3 4 

TIME (MONTHS) 



Voltage Noise vs Frequency 



0.1Hz to 10Hz Noise 



Channel Separation vs Frequency 





100 


i 


70 


> 






50 


Co 




0-1 




CD 




co 
O 


30 










< 

i — ■ 


20 


o 




> 




iJ-J 




EE 





— V S = ±15 
_T A = 25° 

I 












V 












































































1/fC 


I 

3RNEP 


= 28H 










z 









3 10 30 100 300 1k 3k 10k 
FREQUENCY (Hz) 



I I I 
Vs=i15V 














7 


« = 


5 C 




























































V 


\ 



















































































































2 4 6 8 

TIME (SECONDS) 




10 100 1k 10k 100k 1M 
FREQUENCY (Hz) 



2-79 



LT1457 



TVPicni p€RFORmnnc€ cHnnncrcmsTics 



Common-Mode Rejection Ratio 
vs Frequency 



120 
100 
80 
60 
40 
20 












Ta = 


t15V 
25°C _ 































































Common-Mode Range vs 
Temperature 



1k 10k 100k 
FREQUENCY (Hz) 



1M 10M 



15 
14 

S 13 
S 12 

1 11 

8 ±io 
s 

i -11 

O 

1-12 
o 

o -13 
-14 
-15 



































































































■Vs= 












f15V - 











Common-Mode and Power Supply 
Rejections vs Temperature 



Vs 

_v s 


±5VT 
±15V, 


)±17V 
'CM = i 


l 

OR PSRR 
10.5V FOR CMF 


R 








PSR 


R 










CMF 


R 





























-25 25 50 
TEMPERATURE (°C) 



-50 -25 25 50 75 100 
TEMPERATURE (°C) 



Slew Rate, Gain-Bandwidth 
Product vs Temperature 











V S = ±15V_ 


















SLEW FALL 






















GBW 


























RISE - 










- SLEW 















-50 -25 25 50 75 100 
TEMPERATURE (°C) 

LTU57.TPC1B 



Supply Current vs Temperature 



S EE 
1.5 1 I 





















hv s 


= ±15V 






v s = ± 










5V 

































-25 25 50 75 
TEMPERATURE (°C) 



T A = -40°C 



7" 



■T A = 25°C 



T A = 85'C 



ITH57-TPCH 



Short-Circuit Current vs Time 
(One Output Shorted to Ground) 

50 
40 

30 
20 
10 

-10 
-20 
-30 
-40 
-50 

12 3 

TIME FROM OUTPUT SHORT TO GROUND (MINUTES) 

LTI«T<TFCI5 



V S = i15V " 
I I 



. T A = 85°C 



T A = -40°C 




2-80 



LT1457 



TVPicni P€RFORmnncc charactcristics 



Large-Signal Response 
A v = 1. C L = 100pF 



Small-Signal Response 
A u = 1. C L = 1000pF 



Small-Signal Response 
A u = 1, C L = 10.000pF 





Wt — 



IIHS7TO0 



application inFORmnnon 

Phase Reversal Protection 

Most industry standard JFET input single, dual, and quad 
op amps (e.g., LF156, LF351, LF353, LF411, LF412, 
OP-1 5, OP-1 6, OP-21 5, and TL084) exhibit phase reversal 
at the output when the negative common-mode limit at the 
input is exceeded (i.e., below -12V with ±15V supplies). 
The photos show a +1 6V sine wave input (A), the response 



of an LF41 2A in the unity gain follower mode (B), and the 
response of the LT1457 (C). 

The phase reversal of photo (B) can cause lock-up in servo 
systems. The LT1457 does not phase-reverse due to a 
unique phase reversal protection circuit. 






(A) ±16V Sine Wave Input 



(B) LF412A Output 



(C) LT1457 Output 



All Photos 5V/Div Vertical Scale, 50+is/Div Horizontal Scale 



2-81 



LT1457 



nppucOTions inFORmnnon 



High Speed Operation 

When the feedback around the op amp is resisitive (Rp), a 
pole will be created with Rp, the source resistance and 
capacitance (Rg, Cs), and the amplifier input capacitance 
(Cin = 4pF). In low closed loop gain configurations and 
with Rs and Rp in the kilohm range, this pole can create 
excess phase shift and even oscillation on high speed 
amplifiers. Because the LT1457's phase margin is very 
high, this problem is minimal. However, a small capacitor 
(Cp) in parallel with R F eliminates this problem. With Rs(Cs 
+ Cin) = RfCf, the effect of the feedback pole is completely 
removed. 




2-82 



ITLIfKAB INDEX 

J^mW TECHNOLOGY I INULA 



SECTION 2— AMPLIFIERS 

HIGH SPEED AMPLIFIERS 

L11122, Fast Settling, JFET Input Operational Amplifier 2-84 

LT1187, Low Power Video Difference Amplifier 2-92 

LT1189, Low Power Video Difference Amplifier 2-104 

L 11 195, Low Power, High Speed Operational Amplifier 2-116 

L T1201/L 11202, Dual and Quad 1mA, 12MHz, 50V/^is Op Amps 2-127 

LT1206, 250mA/60MHz Current Feedback Amplifier 2-137 

L T1208/L 11209, Dual and Quad 45 MHz. 400V /us Op Amps 2-150 

L11211/L11212, 14MHz, 7V//js, Single Supply Dual and Quad Precision Op Amps 2-160 

L11213/L112U, 28MHz, 12V Ips, Single Supply Dual and Quad Precision Op Amps 2-176 

L11215/L11216, 23MHz, 50V/ps, Single Supply Dual and Quad Precision Op Amps 2-192 

L11227, 140MHz Video Current Feedback Amplifier 2-208 

L11251/L112S6, 40MHz Video Fader and DC Gain Controlled Amplifier 2-219 

L11252, Low Cost Video Amplifier 2-242 

L 11253/L 11254, Low Cost Dual and Quad Video Amplifiers 2-249 

L11259/L11260, Low Cost Dual and Iriple 130MHz Current Feedback Amplifiers with Shutdown 2-256 

L11354, 12MHz, 400V/us Op Amp 2-267 

L11355/L11356, Dual and Quad 12MHz, 400V/ps Op Amps 2-278 

L11357, 25MHz, 600V Ips Op Amp 2-289 

L 11358/L 11359, Dual and Quad 25MHz, 600V /ys Op Amps 2-300 

L113B0, 50MHz, 800V/us Op Amp 2-311 

L113B1/L11302, Dual and Quad 50MHz, 800V/us Op Amps 2-322 

L11363, 70MHz, 1000Vfcs Op Amp 2-333 

L 11364/L 11385, Dual and Quad 70MHz, tOOOV/iss Op Amps 2-344 



rr\m& 2-83 



rrwmi 

Jk«/ TECHNOLOGY 



F€f1TUR€S 

■ 100% Tested Settling Time 340ns Typ 
to 1mV at Sum Node, 10V Step 540ns Max 
Tested with Fixed Feedback Capacitor 

■ Slew Rate 60V/lis Min 

■ Gain Bandwidth Product 14MHz 

■ Power Bandwidth (20Vp-p) 1.2 MHz 

■ Unity Gain Stable; Phase Margin 60° 

■ Input Offset Voltage 600p.VMax 

■ Input Bias Current 25°C 75pAMax 

70°C 600pA Max 

■ Input Offset Current 25°C 40pAMax 

70°C 150pAMax 

■ Low Distortion 



applicators 

■ Fast 1 2-Bit D/A Output Amplifiers 

■ High Speed Buffers 

■ Fast Sample and Hold Amplifiers 

■ High Speed Integrators 

■ Voltage to Frequency Converters 

■ Active Filters 

■ Log Amplifiers 

■ Peak Detectors 



TVPICAl applicator 



12-Bit Voltage Output D/A Converter 




12-BIT CURRENT OUTPUT D/A CONVERTER 
C,= 5pFT017pF 

(DEPENDING ON D/A CONVERTER USED) imw™ 



LT1122 

Fast Settling, JFET Input 
Operational Amplifier 

DCSCRIPTIOA 

The LT1122 JFET input operational amplifier combines 
high speed and precision performance. 

A unique poly-gate JFET process minimizes gate series 
resistance and gate-to-drain capacitance, facilitating wide 
bandwidth performance, without degrading JFET transis- 
tor matching. 

It slews at 80V/|iS and settles in 340ns. The LT1122 is 
internally compensated to be unity gain stable, yet it has a 
bandwidth of 1 4MHz at a supply current of only 7mA. Its 
speed makes the LT1122 an ideal choice for fast settling 
12-bit data conversion and acquisition systems. 

The LT1122 offset voltage of 120|iV, and voltage gain of 
500,000 also support the 12-bit accurate applications. 

The input bias current of 1 0pA and offset current of 4pA 
combined with its speed allow the LT1 1 22 to be used in 
such applications as high speed sample and hold amplifi- 
ers, peak detectors, and integrators. 



Large-Signal Response 




200ns/DIV 
AV = -1 

I1HTA07 



2-84 



LT1122 



rbsoiutc mnximum rrtirgs 

Supply Voltage ±20V 

Differential Input Voltage • 40V 

Input Voltage ±20V 

Output Short Circuit Duration Indefinite 

Lead Temperature (Soldering, 1 sec.) 300°C 



Operating Temperature Range 

LT1 1 22AM/BM/CM/DM - 55°C to 1 25°C 

LT1 1 22AC/BC/CC/DC/CS/DS - 40°C to 85°C 

Storage Temperature Range 
All Devices -65 C to 1 50' C 



PRCKRG€/ORD€R IRFORmflTIOn 



m SPEED BOOST/ 
OVERCOMP 




N8 PACKAGE J8 PACKAGE 

8-LEAO PLASTIC OIP 8-LEAD HERMETIC DIP 



T JMAX = 150"C.e JA =130"C/W(N8) 
Tjmsx = 175-C, 8 JA = 100°C/W(J8) 



ORDER PART 
NUMBER 



LT1122AMJ8 
LT1122BMJ8 
LT1122CMJ8 
LT1122DMJ8 
LT1122ACJ8 
LT1122BCJ8 



LT1122CCJ8 
LT1122DCJ8 
LT1122ACN8 
LT1122BCN8 
LT1122CCN8 
LT1122DCN8 



TRIM LL 
-IN [7 

+ IN [T 



B SPEED BOOST/ 
OVERCOMP 

T] OUT 
T\ V os TRIM 



S8 PACKAGE 
8-LEAD PLASTIC SOIC 

TjMAX = 150"C,ej 4 = 190-C/W 



ORDER PART 
NUMBER 



LT1122CS8 
LT1122DS8 



PART MARKING 



1122C 
1122D 



Consult factory tor Industrial grade parts. 



€L€CTRICRL CHARACTERISTICS V s = + 15V, T A = 25°C, V cm = 0V unless otherwise noted. (Note 1) 



SYMBOL 


PARAMETER 


CONDITIONS 


LT1122AM/BM 
LT1122AC/BC 

MIN TYP MAX 


LT1122CM/DM 
LT1122CC/DC 
LT1122CS/DS 

MIN TYP MAX 


UNITS 


Vos 


Input Offset Voltage 




120 600 


130 900 


U.V 


'OS 


Input Offset Current 




4 40 


5 50 


PA 


Ib 


Input Bias Current 




1C "5 


12 100 


pA 




Input Resistance 
Differential 
Common Mode 


V CM = -10Vto + 8V 
V CM = + 8Vto + 11V 


10 12 
10 12 
10 11 


10 12 
10 12 
10" 


n 
a 
a 




Input Capacitance 




4 


4 


PF 


Sr 


Slew Rate 


A v = -1 


60 80 


50 75 


V/ns 




Settling Time (Note 2) 


+ 1 0V to 0V. -10V to 0V 
100% Tested: A and C Grades 

to ImVatSum Node 
B and D Grades to 1mV at Sum Node 
All Grades to 0.5mV at Sum Node 


340 540 

350 

450 


350 590 

360 

470 


ns 
ns 
ns 


GBW 


Gain Bandwidth Product 
Power Bandwidth 


Vout =20Vp-p 


14 
1.2 


13 
1 1 


MHz 

MHz 


AVOL 


Large Signal Voltage Gain 


Vout = ±10V. R L = 2kn 
V 0UT = ± 10V. R L = 600fi 


180 500 
130 250 


150 450 
110 220 


V/mV 
V/mV 


CMRR 


Common Mode Rejection Ratio 


V CM = + 10V 


83 99 


80 98 


dB 




Input Voltage Range 


(Note 3) 


+ 10.5 ±11 


±10.5 ±11 


V 


PSRR 


Power Supply Rejection Ratio 


V s = ±10Vto±18V 


86 103 


82 101 


dB 




Input Noise Voltage 


0.1Hz to 10Hz 


3.0 


3.3 


uVp-p 


Input Noise Voltage Density 


f = 100Hz 
f = 10kHz 


25 
14 


27 
15 


nV/VHz 
nV/v'Hz 


Input Noise Current Density 


f = 100Hz, t = 10kHz 


2 


2 


W-Jvta 



2-85 



LT1122 



€ l€CTRICfll CHflRflCTCRISTICS V s = ± 15V, T A = 25 C, V CM = OV unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS 


LT1122AM/BM 
LT1122AC/BC 
MIN TYP MAX 


LT1122CM/DM 
LT1122CC/DC 
LT1122CS/DS 
MIN TYP MAX 


UNITS 


V OUT 


Output Voltage Swing 


R L = 2k£i 
R L = 600£2 


±12 
±11.5 


±12.5 
+ 12 


±12 ±12.5 
±11.5 ±12 


V 
V 


Is 


Supply Current 




7.5 10 


7.8 11 


mA 




Minimum Supply voltage 


(Note 4) 


±5 


±5 


V 




Offset Adjustment Range 


Rpot > 10k, Wiper to V* 


±4 


±10 


±4 ±10 


mV 


V s = ± 15V, V C m = OV, C < T A < 70°C, unless otherwise noted. (Note 1 ) 


SYMBOL 


PARAMETER 


CONDITIONS 


LT1122AC/BC 
MIN TYP MAX 


LT1122CC/DC 
LT1122CS/DS 
MIN TYP MAX 


UNITS 


Vos 


Input Offset Voltage 






350 1400 


400 2000 


uV 




Average Temperature Coefficient 
of Input Offset Voltage 






5 18 


6 25 


M.WC 


los 


Input Offset Current 






12 150 


15 200 


PA 


la 


Input Bias Current 






80 600 


90 800 


PA 


*VOL 


Large Signal Voltage Gain 


V 0U T = ± 10V, R L > 2kI2 




120 


380 


100 340 


V/mV 


CMRR 


Common Mode Rejection Ratio 


V CM = ±10V 




82 


98 


78 96 


dB 


PSRR 


Power Supply Rejection Ratio 


V s = ±10Vto±17V 




84 


101 


80 99 


dB 




Input Voltage Range 






±10 


±10.8 


±10 ±10.8 


V 


VOUT 


Output Voltage Swing 


R L = 2kO 




±11.5 


±12.4 


±11.5 ±12,4 


V 


Sr 


Slew Rate 


Ay = -1 




50 


70 


40 65 


V/jis 


V S = ± 15V, V CM = OV, - 55°C < T A < 125°C, unless otherwise noted. (Note 1) 


SYMBOL 


PARAMETER 


CONDITIONS 


LT1122AM/BM 
MIN TYP MAX 


LT1122CM/DM 
MIN TYP MAX 


UNITS 


Vos 


Input Offset Voltage 






650 2400 


800 3400 


uV 




Average Temperature Coefficient 
of Input Offset Voltage 






6 18 


7 25 


nv/°c 


■os 


Input Offset Current 






0.5 6 


0.6 9 


nA 


k 


Input Bias Current 






6 25 


7 35 


nA 


AvOL 


Large Signal Voltage Gain 


Vout = + 10V, R L 2 2k!2 




70 


230 


60 200 


V/mV 


CMRR 


Common Mode Rejection Ratio 


V CM = ±10V 




80 


97 


76 94 


dB 


PSRR 


Power Supply Rejection Ratio 


V s = ±10Vto±17V 




83 


100 


78 98 


dB 




Input Voltage Range 






±10 


±10.5 


±10 ±10.5 


V 


Vout 


Output Voltage Swing 


R L = 2kfi 




±11.3 


±12.1 


±11.3 ±12.1 


V 


Sr 


Slew Rate 


Ay— 1 




45 


60 


35 55 


V/|iS 



The • denotes the specifications which apply over the full operating 
temperature range. 

Note 1 : The LT1 1 22 is measured in an automated tester in less than one 
second after application of power. Depending on the package used, power 
dissipation, heat sinking, and air flow conditions, the fully warmed up chip 
temperature can be 10°C to 50°C higher than the ambient temperature. 
Note 2: Settling time is 1 00% tested for A and C grades using the settling 
time test circuit shown. This test is not included in quality assurance 
sample testing. 



Note 3: Input voltage range functionality is assured by testing offset 
voltage at the input voltage range limits to a maximum of 4mV (A, B 
grades), to 5.7mV (C, D grades). 

Note 4: Minimum supply voltage is tested by measuring offset voltage to 
7mV maximum at ± 5V supplies. 

Note 5: The LT1122 is not tested and not quality-assurance-sampled at 
- 40°C and at 85°C. These specifications are guaranteed by design, 
correlation and/or inference from - 55°C, 0°C, 25°C, 70°C and/or 1 25°C 



2-86 



LT1122 



€l€CTMCm CHRRRCTCRISTICS 

V s = ± 15V, V CM = OV, - 40°C < T A < 85°C, unless otherwise noted. (Note 5) 



SYMBOL 


PARAMETER 


CONDITIONS 


LT1122AC/BC 
MIN TYP MAX 


LT1122CC/DC 
LT1122CS/DS 
MIN TYP MAX 


UNITS 


Vos 


Input Offset Voltage 






450 1900 


500 2700 


uV 




Average Temperature Coefficient 
of Input Offset Voltage 






6 20 


7 28 


HWC 


'os 


Input Offset Current 






30 600 


40 900 


pA 


Ib 


Input Bias Current 






230 2000 


260 2700 


pA 


A VOL 


Large Signal Voltage Gain 


V OUT = ±10V, R L >2kfl 




95 340 


80 300 


V/mV 


CMRR 


Common Mode Rejection Ratio 


V CM = ±10V 




80 98 


76 96 


dB 


PSRR 


Power Supply Rejection Ratio 


V S = ±10V to ± 17V 




83 100 


78 98 


dB 




Input Voltage Range 






±10 ±10.6 


±10 ±10.6 


V 


Vout 


Output Voltage Swing 


Rl = 2ki2 




±11.3 ±12.2 


±11.3 ±12.2 


V 


Sr 


Slew Dale 


A v =-1 




45 65 


35 60 


V/us 



Settling Time Test Fixture 



DEVICE UNDER TEST 
5pF 




O.^F 



~ TYPICAL SUPPLY 
BYPASSING FOR 
EACH AMP/BUFFER 



luF TANT 



•THIS RESISTOR CAN BE ADJUSTED TO 
NULL OUT ALL OFFSETS AT THE SETTLING 
TIME OUTPUT. THE AUTOMATED TESTER 
USES A SEPARATE AUTOZERO CIRCUIT. 



2-87 



LT1122 



TVPICfiL P€ftFORmnnC€ CHRRflCTCRISTICS 



j Time 
(Input From -10V to OV) 



Settling Time 

(Input From +10V to OV) 





Settling Time 

(Input From OV to -10V) 



100ns/DIV 



i Signal Response 





Settling Time 

(Input From OV to +10V) 




Undistorted Output Swing vs 
Frequency 




1M 10M 
FREQUENCY (Hz) 



Voltage Gain vs Frequency 





120 




100 




80 




60 




40 


< 






20 









-20 




-40 













Vs = 


115V 














Ta = 


25°C 



































































































Gain, Phase vs Frequency 



FREQUENCY (Hz) 



10M 

FREQUENCY (Hz) 





















































































































— TA- 
Cl = 


t16 
25* 
t5p 






















F 













































100 
120 

140 S 

160 1 

3 

180 | 
200 



Common Mode Rejection vs 
Frequency 



120 
1 00 
80 
60 
40 
20 









Vs =»15V 








1 


A = 25° 


; 



















































10k 100k 1M 
FREQUENCY (Hz) 



10M 100M 



2-88 



LT1122 



TYPICAL P€RFORmflnC€ CHnRnCTCRISTICS 



Distribution of Input Offset 
Voltage 



800 



600 



3370 UN 
IN ALL F 


TS T 
ACKf 


FIT, 
GES 


U 


V S = ±15V 
T A = 25"C 
(NOT WARMEC 


UPl 








J 


1 




































































F 
















J 










k 







-900 -500 -100 100 500 900 
INPUT OFFSET VOLTAGE (jtV) 



Warm-up Drift 



250 



150 



Ta = 


t15V 
5-C 






SO PACKAGE 










N PACKAGE 










JPAC 


KAGE 


} 
















IN SI 
SOL 


ILL AIR 
1ERED ( 


(SO PA 
N i u B 


CKAGE 
ARD) 



12 3 

TIME AFTER POWER ON (MINUTES) 

LT!l2>TFCfl« 

Total Harmonic Distortion 
+ Noise vs Frequency 
Inverting Gain 




20 100 1k 10k 20k 

FREQUENCY (Hi) 



Input Bias and Offset Currents 
Over Temperature 



100K 
30K 
10K 
3K 
1K 
300 
100 
30 
10 
3 
1 









V S = ±15 
V CM = 0V 










/ 














BIAS I 








CUR 


RENT > 






























/ DFFS 


ET 








UUHHtNl 













25 50 75 100 
CHIP TEMPERATURE CO 



Noise Spectrum 




3 10 30 100 300 1k 3k 10k 
FREQUENCY (Hz) 



Total Harmonic Distortion 
+ Noise vs Frequency 
Non-Inverting Gain 



Bias and Offset Currents Over 
The Common-Mode Range 



1 20 

100 
80 
60 










V S =±15V 










Ta = 25°C 
(NOT-WARM 

1 


DUP) 








BIAS 

r\ IDDCMT 





















OFFStl 
CURRENT \ 

I \ 


i 

















20 100 



FREQUENCY (Hz) 



-15 -10 -5 5 10 15 
COMMON-MODE INPUT VOLTAGE (V) 



0.1Hz to 10Hz Noise 



2 4 6 8 

TIME (SECONDS) 

ITt 

Intermodulation Distortion 
(CCIF Method) vs Frequency 
LT1122 and LF156* 



g 0.001 




FREQUENCY (Hz) 
•SEE LT1115 DATASHEET FOR DEFINITION 
OF CCIF TESTING lmmK 



2-89 



LT1122 



APPiicflTions inFORmnTion 



Settling Time Measurements 

Settling time test circuits shown on some c 
devices' data sheets require: 

1. A "flat top" pulse generator. Unfortunately, flat top 
pulse generators are not commercially available. 

2. A variable feedback capacitor around the device under 
test. This capacitor varies over a four to one range. 
Presumably, as each op amp is measured for settling 
time, the capacitor is fine tuned to optimize settling 
time for that particular device. 

3. A small inductor load to optimize settling. 

The LT1122's settling time is 100% tested in the test 
circuit shown. No "flattop" pulse generator is required. 
The test circuit can be readily constructed, using commer- 
cially available ICs. Of course, standard high frequency 
board construction techniques should be followed. All 
LT1 122s are measured with a constant feedback capaci- 
tor. No fine tuning is required. 

Speed Boost/Overcompensation Terminal 

Pin 8 of the LT1 1 22 can be used to change the input stage 
operating current of the device. Shorting pin 8 to the 
positive supply (Pin 7) increases slew rate and bandwidth 
by about 25%, but at the expense of a reduction in phase 
margin by approximately 18 degrees. Unity gain capaci- 
tive load handling decreases from typically 500pF to 
100pF. 

Conversely, connecting a 15k resistor from pin 8 to 
ground pulls 1mA out of pin 8 (with V + = 15V). This 
reduces slew rate and bandwidth by 25%. Phase margin 
and capacitive load handling improve; the latter typically 
increasing to 800pF. 

High Speed Operation 

As with most high speed amplifiers, care should be taken 
with supply decoupling, lead dress and component 
placement. 



The power supply connections to the LT1 1 22 must main- 
tain a low impedance to ground over a bandwidth of 
20MHz. This is especially important when driving a signifi- 
cant resistive or capacitive load, since all current delivered 
to the load comes from the power supplies. Multiple high 
quality bypass capacitors are recommended for each 
power supply line in any critical application. A 0.1|iF 
ceramic and a 1 uf electrolytic capacitor, as shown, placed 
as close as possible to the amplifier (with short lead 
lengths to power supply common) will assure adequate 
high frequency bypassing, in most applications. 




When the feedback around the op amp is resistive (Ftp), a 
pole will be created with Rp the source resistance and 
capacitance (Rs, Cs), and the amplifier input capacitance 
(Cin « 4pF). In low closed loop gain configurations and 
with Rs and Rp in the kilohm range, this pole can create 
excess phase shift and even oscillation. A small capacitor 
(C F ) in parallel with R F eliminates this problem. With 
Rs (Cs + Cin) = RpCp, the effect of the feedback pole is 
completely removed. 




2-90 



TVPicni nppucOTions 

Quartz Stabilized Oscillator With 9ppm Distortion 





2-91 



T1 1H7 




I II 1 1 / \L-* 



LT1 187 



Low Power 
Video Difference Amplifier 



F€HTUR€S 

« Differential or Single-Ended Gain Block (Adjustable) 
" — 3dB Bandwidth. A v = ±2 50MHz 
- Slew Rate 1 65V/u-s 

13mA 
±20mA 
40dB 



■ Low Supply Current 

■ Output Current 

- CMRR at 1 OMHz 

- LT1 193 Pin Compatible 

■ Low Cost 

■ Single 5V Operation 

■ Drives Cables Directly 

- Output Shutdown 

nppLicnnons 

■ Line Receivers 

- Video Signal Processing 
« Cable Drivers 

■ Tape and Disc Drive Systems 



D€scniPTion 

The LT1 1 87 is a difference amplifier optimized for opera- 
tion on ±5V, or a single 5V supply, and gain ^2. This 
versatile amplifier features uncommitted high input im- 
pedance ( + ) and (— ) inputs, and can be used in differential 
or single-ended configurations. Additionally, a second set 
of inputs give gain adjustment and DC control to the 
difference amplifier. 

The LT1187s high slew rate, 165V/p.s, wide bandwidth. 
50MHz. and ±20mA output current require only 1 3mA of 
supply current. The shutdown feature reduces the power 
dissipation to a mere 1 5mW. and allows multiple amplifi- 
ers to drive the same cable. 

The LT1 1 87 is a low power version of the popular LT1 1 93, 
and Is available in 8-pin mintDIPs and SO packages. For 
applications with gains of 10 or more, see the LT1189 
data sheet. 



Cable Sense Amplifier for Loop Through Connections 
with DC Adjust 



Closed-Loop Gain vs Frequency 





2-92 



UEtEOB 



LT1187 



ABSOLUTE mnximum RRTIRGS PRCKRG€/ORD€R IflFORfRRTIOn 

Total Supply Voltage (V + to V") 18V 

Differential Input Voltage +6V 

Input Voltage ±V S 

Output Short Circuit Duration (Note 1) Continuous 

Operating Temperature Range 

LT1187M -55°Cto150°C 

LT1187C 0°Cto70°C 

Junction Temperature (Note 2) 

Plastic Package (CN8.CS8) 150°C 

Ceramic Package (CJ8,MJ8) 175°C 

Storage Temperature Range -65°C to 150°C 

Lead Temperature (Soldering, 10 sec.) 300°C 

— 

±5V CL6CTRICRL CHRRRCT6RISTICS t a = 25 c, ( No.e3» 



V s = +5V, V REF = 0V, Rfbi = 900l> from pins 6 to 8, R F B2 = 100Q from pin 8 to ground, R L = R FB i + Rfb2 = 1k, C L < lOpF pin 5 open. 

. 1 1 1 



SYMBOL 




PARAMETER 


CONDITIONS 


1 T11R7M/P 

Li iio/m/u 
MIN TYP MAX 


UNITS 


Vos 


Input Offset Voltage 


Either Input, (Note 4) 
SOIC Package 


2.0 10 
2.0 11 


mV 
mV 


los 


Input Offset Current 


Either Input 


0.2 1.0 


u.A 


It 


Input Bias Current 


Either Input 


±0.5 ±2.0 


uA 


e n 


Input Noise Voltage 


f = 10kHz 


65 


nWVHi 


in 


Input Noise Current 


f = 10kHz 


1.5 


pA/x/Hz 


R|N 


Input Resistance 


Differential 


100 


kfl 


C|N 


Input Capacitance 


Either Input 


2.0 


PF 


V|N LIM 


Input Voltage Limit 


(Note 5! 


±380 


mV 




Input Voltage Range 




-2.5 3.5 


V 


CMRR 


Common-Mode Rejection Ratio 


V C y = -2.5V to 3.5V 


70 100 


dB 


PSRR 


Power Supply Rejection Ratio 


V s = 12.375V to ±8V 


70 85 


dB 


VflUT 


Output Voltage Swing 


V S = ±5V, R L = 1 k, A v = 50 


±3.8 ±4.0 


V 


V S = ±8V, R L = 1k,A v = 50 


±6.7 ±7.0 


V S = ±8V, R L = 300n, A v = 50, (Note 3) 


±6.4 ±6.8 


Ge 


Gain Error 


V = ±1 V, A v = 1 0, R L = 1k 


0.2 1.0 


% 


SR 


Slew Rate 


(Note 6, 10) 


100 165 


Whs 


FPBW 


Full Power Bandwidth 


V = 1V P .p, (Note7) 


53 


MHz 


BW 


Small Signal Bandwidth 


A v = 10 


5.7 


MHz 


Uf 


Rise Time, Fall Time 


A v = 50, V == +1 .5V, 20% to 80% (Note 1 0) 


150 230 325 


ns 


tpD 


Propagation Delay 


R L =1k, V = ±125mV, 50% to 50% 


26 


ns 




Overshoot 


V = ±50mV 





% 


% 


Settling Time 


3V Step, 0.1%, (Note 8) 


100 


ns 


Diff Ay 


Differential Gain 


R L = 1 k, A v = 4, (Note 9) 


0.6 


% 


Diff Ph 


Differential Phase 


R L = 1k, A v = 4, (Note 9) 


0.8 


DEGp-p 


Is 


Supply Current 




13 16 


mA 




Shutdown Supply Current 


Pin 5 at V- 


0.8 1.5 


mA 





TOP VIEW 




nnnr-D DADT 

UnUtn rAn I 
NUMBER 


+/REF fT 
-IN |T 
+IN |T 

v- \7_ 




T\ -/FB 

S vt 

J] OUT 

T\ SID 


LT1187CJ8 
LT1187CN8 
LT1187CS8 
LT1187MJ8 


J8 PACKAGE N8 PACKAGE 
8-LEAD HERMETIC DIP 8-LEAD PLASTIC DIP 

S8 PACKAGE 
8-LEAD PLASTIC SOIC 

LT1187-POIQ1 

TjMAX=150»C,e Jfl = 100°C/W(J8) 
TjMAX = 150°C,ej A =100°C/W(N8) 
T JMA x = 150"C,e JA = 150"C/W (S8) 


S8 PART MARKING 


1187 



Consult factory for Industrial grade parts. 



UchnSldB 



2-93 



LT1187 



±5V €L€CTRICRL CHflRflCT€RISTICS t a = 25 °c, (Notes) 



V s = ±5V, Vref = OV, R FB i = 900O Irom pins 6 to 8, R FB 2 = 1 "OA from pin 8 to ground, R L = R F bi + Rfb2 = 1 k, C L < 1 0pF, pin 5 open. 



SYMBOL 


PARAMETER 


CONDITIONS 


LT1187M/C 
MIN TYP MAX 


UNITS 


m 


Shutdown Pin Current 


Pin 5 at V - 


5 25 


uA 


m 


Turn On Time 


Pin 5 from V~to Ground, R L = 1k 


500 


ns 


t-OFF 


Turn Off Time 


Pin 5 from Ground toV", R L = 1k 


600 


ns 


5V €L< 

V S + =5V,V S 




ECTRICRl CHRRRCT€RISTICS t a = 25 c, (Note 3) 

- = QV, V REF = 2-5V, Rfbi = 900n from pins 6 to 8, R F B2 = 100n Irom pin 8 to V REF , R L = Rfbi + "fb2 = 1k, C L < 10pF, pin 5 open. 


SYMBOL 


PARAMETER 


CONDITIONS 


LT1187M/C 
MIN TYP MAX 


UNITS 


v s 


Input Offset Voltage 


Either Input, (Note 4) 
SOIC Package 


2.0 10 
2.0 12 


mV 
mV 






Either Input 


0.2 1.0 


u.A 


los 


Input Offset Current 


ll 


Input Bias Current 


Either Input 


±0.5 ±2.0 


fiA 




Input Voltage Range 




2.0 3.5 


V 


CMRR 


Common-Mode Rejection Ratio 


V CM = 2.0V to 3.5V 


70 100 


dB 


VOUT 


Output Voltage Swing 


R L = 300£2 to Ground 
(Note 3) 


Vout High 


3.6 4.0 


V 


Vout Low 


0.15 0.4 


SR 


Slew Rate 


V = 1.5V to 3.5V 


130 


V/p-S 


BW 


Small-Signal Bandwidth 


A v = 10 


5.3 


MHz 


Is 


Supply Current 




12 15 


mA 




Shutdown Supply Current 


Pin 5 at V" 


0.8 1.5 


mA 


Is/o 


Shutdown Pin Current 


Pin 5 at V" 


5 25 


HA 



±5V CL6CTRICRL CHRRRCTCRISTICS -55 c<t a < 125 c (Notes) 

Vs = ±5V, V REF = 0V, R F bi = 900Q Irom pins 6 to 8, R F B2 = 1 0012 Irom pin 8 to ground, R L = R F bi + Rfb2 = 1k, Cl< lOpF, pin 5 open. 



SYMBOL 


PARAMETER 


CONDITIONS 


LT1187M 
MIN TYP MAX 


UNITS 


Vos 


Input Offset Voltage 


Either Input, (Note 4) 


2.0 15 


mV 


AV 0S /AT 


Input Vos Drift 




8.0 


u.V/°C 


los 


Input Offset Current 


Either Input 


0.2 1.5 


\iA 


Ib 


Input Bias Current 


Either Input 


±0.5 ±3.5 


u.A 




Input Voltage Range 




-2.5 3.5 


V 


CMRR 


Common-Mode Rejection Ratio 


V CM = -2.5V to 3.5V 


70 100 


dB 


PSRR 


Power Supply Rejection Ratio 


V s = ±2.375Vto±8V 


60 85 


dB 


VOUT 


Output Voltage Swing 


V S = ±5V, R L = 1k,A v = 50 


±3.7 ±4.0 


V 


V S = ±8V, R L = 1k,A v = 50 


±6.6 +7.0 


V s = ±8V, R L = 300Q, A v = 50, (Note 3) 


±6.4 ±6.8 


Ge 


Gain Error 


V = ±1V,A V = 10, R[_ = 1k 


0.2 1.2 


% 


Is 


Supply Current 




13 17 


mA 




Shutdown Supply Current 


Pin 5 at V", (Note 11) 


0.8 1.5 


mA 


Is/D 


Shutdown Pin Current 


Pin 5 at V" 


5 25 


M-A 



2-94 



LT1187 



±5V €l€CTRICfil CHRRRCTCRISTICS o c.t a : 70 c. .Notes. 

V s = ±5V, V REF = OV, R F bi = 900n from pins 6 to 8, R FB2 = 100Q trom pin 8 to ground, R L = R FB i + Rfb2 = 1k. Cl s 10pF, pin 5 open. 



SYMBOL 


PARAMETER 


CONDITIONS 


LT1187C 

■ ■111 Ti/n ■jaw 

MIN TYP MAX 


UNITS 


Vos 


Input Offset Voltage 


Either Input, (Note 4) 


2.0 12 


mV 


AV 0S /AT 


Input Vos Drift 




9.0 


|iV/°C 


>os 


Input Offset Current 


Either Input 


0.2 1.5 


uA 


Ib 


Input Bias Current 


either input 


+0.5 ±3.5 


uA 




Input Voltage Range 




-2.5 3.5 


V 


CMRR 


Common-Mode Rejection Ratio 


V CM = -2.5V to 3.5V 


70 100 


dB 


PSRR 


Power Supply Rejection Ratio 


V s = ±2.375Vto±8V 


65 85 


dB 


VOUT 


Output Voltage Swing 


V S = ±5V, R L = 1k,A v =50 


±3.7 ±4.0 


V 


V S = ±8V, R L = 1k,A v = 50 


±6.6 ±7.0 


V s = ±8V, R L = 300Q, A v = 50, (Note 3) 


±6.4 ±6.8 


G E 


Gain Error 


V = ±1V,A V = 10, R L = 1k 


0.2 1.0 


% 


Is 


Supply Current 




13 17 


mA 




Shutdown Supply Current 


Pin 5 at V, (Note 11) 


0.8 1.5 


mA 


'S/D 


Shutdown Pin Current 


Pin 5 at V" 


5 25 


uA 


5V €l€CTRICRl CHRRRCTCRISTICS oc<t a < 7 oc, (Notes) 

V s + = 5V, V s "= OV, V REF = 2.5V, Rfbi = 900Q trom pins 6 to 8, R^ = 100Q from pin 8 to V REF , R L = R m + = 1k, C L < 10pF, pin 5 open. 


SYMBOL 


PARAMETER 


CONDITIONS 


LT1187C 
MIN TYP MAX 


UNITS 


Vos 


Input Offset Voltage 


Either Input, (Note 4) 
SOIC Package 


2.0 12.0 
2.0 13.0 


mV 
mV 


AVos/AT 


Input V s Drift 




9.0 


uV/°C 


fos 


Input Offset Current 


Either Input 


0.2 1.5 


pA 


Ib 


Input Bias Current 


Either Input 


±0.5 ±3.5 


uA 




Input Voltage Range 




2.0 3.5 


V 


CMRR 


Common-Mode Rejection Ratio 


V CM = 2.0V to 3.5V 


70 100 


dB 


Vow- 


Output Voltage Swing 


R L = 300£2to Ground 
(Note 3) 


Vout High 


3.5 4.0 


V 


Vout Low 


0.15 0.4 


is 


Supply Current 




12 16 


mA 




Shutdown Supply Current 


Pin 5 at V", (Note 11) 


0.3 1.5 


mA 




Shutdown Pin Current 


Pin 5 at V" 


5 25 


pA 



Note 1: A heat sink may be required to keep the junction temperature below 

absolute maximum when the output is shorted continuously. 

Note 2: Tj is calculated from the ambient temperature T A and power 

dissipation P D according to the following formulas: 

LT1 1 87MJ8.LT1 1 87CJ8: Tj = T A + (P D x 1 00°C/W) 
LT1187CN8: Tj = T A + (P D x 100°C/W) 

LT1187CS8: Tj = T A + (P D x 150°C/W) 

Note 3: When R L = 1k is specified, the load resistor is Rfbi + Rr-82. hut when 

Rl = 300Q is specified, then an additional 430C2 is added to the output such 

that (RfB, + R FB2 ) in parallel with 430Q is R L = 300£2. 

Note 4: V s measured at the output (pin 6) is the contribution from both input 

pair, and is input referred. 

Note 5: V !N UM is the maximum voltage between -V| N and +V !N (pin 2 and 
pin 3) for which the output can respond. 



Note 6: Slew rate is measured between ±0.5V on the output, with a Vin step 
of+0.75V,A v = 3and R L = 1k. 

Note 7: Full power bandwidth is calculated from the slew rate measurement: 
FPBW = SR/2jtVp. 

Note 8: Settling time measurement techniques are shown in "Take the 
Guesswork Out of Settling Time Measurements," EDN, September 19, 1985. 
Note 9: NTSC (3.58MHz). 

Note 10: AC parameters are 100% tested on the ceramic and plastic DIP 
packaged parts (J8 and N8 suffix) and are sample tested on every lot of the SC 
packaged parts (S8 suffix). 

Note 11: See Application section for shutdown at elevated temperatures. Do 
not operate shutdown above Tj > 125°C. 



2-95 



LT1187 



TYPICAL P€RFOftmnnC€ CHflRflCT€RISTICS 



Input Bias Current vs 
Common-Mode Voltage 



v 




5V 




































































-5 


5"C 






























' — 2 


















i£3 o 







-5 -4 -3 -2 -1 1 2 3 4 5 
COMMON-MODE VOLTAGE (V) 

LT11B7-TPC01 



Input Bias Current vs Temperature 



_ o 





























































































































-1 


3 


















OS 




























y 











































































































-50 -25 25 50 75 100 125 
TEMPERATURE ("C) 

LT1187 • TPC02 



Common-Mode Voltage vs 
Temperature 



-50 -25 25 50 75 100 125 
TEMPERATURE (°C) 

LT11B7.TPC03 



Equivalent Input Noise Voltage vs 
Frequency 



600 
500 
400 
300 
200 
100 
























II 


II 

i5V 
25" 
























V"' 

T A = 






















i: - 


C 


2 
























































































































































































> 

















































































10 100 1k 10k 100k 
FREQUENCY (Hz) 

LT11S7-TPCW 



Equivalent Input Noise Current vs 
Frequency 



1 























in 

V s = ±5V 
Ta = 25°C 






















X 






















1 
































\ 








































































































































- 





















































































100 1k 10k 1001 

FREQUENCY (Hz) 

LT11B7-TPC05 



Supply Current vs Supply Voltage 

































'C. 




















•c_ 


















25 




































125 


X, 
































1 







































2 4 6 

±SUPPLY VOLTAGE (V) 



LT11B7-TPC0B 



s 

o 

£5 



Shutdown Supply Current vs 
Temperature 




25 50 75 100 125 
TEMPERATURE (°C) 



Gain Error vs Temperature 























i 

S = ±5V - 
OUT = ±2V- 

v = io - 




















-\ 




















L \ 




















-t 




















-f 


L = 


IK 



























































































































































































































































































































-50 -25 25 50 75 100 125 
TEMPERATURE (°C) 

LT11B7-TPC08 



Open-Loop Gain vs Temperature 



1 1 ! 

V s = ±5V 
























'0 


= ± 


V 






R 




k 


















































































= 500SZ 















































































































-50 -25 25 50 75 100 125 
TEMPERATURE (°C) 

LT11B7-TPC09 



2-96 



XTffiAg 



LT1187 



TVPICRL P€RFORmnnC€ CHRRRCTCRISTICS 



Gain, Phase vs Frequency 



















v s = 


±5V 


















Ta = 


25°C" 
1k - 


























L" 
































































































GAIN 































































































































































100k 



1M 10M 
FREQUENCY (Hz) 



LT1167-TPC11 



Gain Bandwidth Product and 
Unity Gain Phase Margin vs 
Temperature 



I 
5 

























1 

= ±5V- 






















-v 






















-R 




































a 


81 f 


R« 


\in 


Wl 


1T1- 


> 
















PRODUCT 


















































































































UN 


ITY 


g; 


IN 




















PHASE MARGIN 























































































































-50 -25 25 50 75 100 125 
TEMPERATURE (°C) 

LTiiar- Tpct3 



Open-Loop Voltage Gain vs 
Load Resistance 



~ 12k 



I I 

V s = ±5V 
V = ±3V 
T, = +25"C 























































































































































































LOAD RESISTANCE (Q) 



Output Impedance vs Frequency 



65 






100 




-o 


a 




55 






10 




m 


o 
z 








<E 

o 






> 








3D 
CD 


:_: 








i— 




45 


o 


=i 

Q_ 


1.0 




CD 


ZD 

o 



0.1 




Gain Bandwidth Product vs 
Supply Voltage 



A V 


= 20 


"IB 






I I 
T A = -55°C 


































.= 1 





































































1k 10k 100k 1M 10M 100M 
FREQUENCY (Hz) 

LT11B7-TPC1* 



2 4 6 8 10 

±SUPPLY VOLTAGE (V) 

LT11B7-TPC12 

Common-Mode Rejection Ratio 
vs Frequency 





























'C 






















-v s 

Ta 




2 




s 


















Rl 




1 






































































\ 


































s 

































































































100k 



1M 10M 
FREQUENCY (Hz) 



Power Supply Rejection Ratio vs 
Frequency 




Output Short Circuit Current vs 
Temperature 























V 


3 = 


±5 


/ 















































































































































-50 -25 25 50 75 100 125 
TEMPERATURE (°C) 

LH 1B7 -TPC17 



± Output Swing vs Supply Voltage 




2 4 6 8 10 

±SUPPLY VOLTAGE (V) 

LT1187-TPC1B 



2-97 



LT1187 



Tvpicni P€ftFonmnnc€ charactcristics 



Output Voltage Swing vs 
Load Resistance 



V s =± 


5V 






















Ta = 




55 


• 




K 


















= 2 


5 


: 


















= 125°C 










































































= 2 












Ta = 


1 


25 


• 




A I 












V V 


A = -= 

























100 

LOAD RESISTANCE (£i) 



Slew Rate vs Temperature 























I I I 
/ S = ±5V 
fa -Ik 
^O = ±0.5V- 
fy = 2 


























SL 




















|W 


RA 


TE 


















































SL 


EW 


RA 


TE 

































































































































-50 -25 25 50 75 100 125 
TEMPERATURE (X) 



Output Voltage Step vs 
Settling Time, A v = 2 



I ! I 
V S = ±5V 
















i 
R 


1 ■ 


k 






1 


Om 
























































































10n 


\ 






















w 











































40 50 60 70 80 90 100 
SETTLING TIME (ns) 



LT1187 -TPCM 



LT1187.TPC21 



Harmonic Distortion vs 
Output Voltage 



v s = 
_Ta = 

R L = 
1 = 1 

-k,- 


±5V 
25°C 












1k 
MHz 
10 - 








HD 3 



























































1 2 3 4 5 6 7 
OUTPUT VOLTAGE (V P . P ) 

LTH87.TPCM 



Large-Signal Transient Response 




INPUT IN LIMITING. A v » 3, SR = 180Wns 



Small-Signal Transient Response 



Small-Signal Transient Response 




Ay = 2, RfB = 1 k, OVERSHOOT = 25% 







— 








62 


.0"' 




1 




— 


— 


— \ 








* 

• 




— ■ 












; 
i 








\ 










j 






V 






■ 

-i— 










\ 




— 


• 












S ""-— 


BO»M 










50m 





A v = 2, Rfb = 1 k. OVERSHOOT = 25% 



2-98 



LT1187 



nppucnnons inFORmnnon 



The primary use of the LT1 1 87 is in converting high speed 
differential signals to a single-ended output. The LT1 1 87 
video difference amplifier has two uncommitted high input 
impedance (+) and (-) inputs. The amplifier has another 
set of inputs which can be used for reference and feed- 
back. Additionally, this set of inputs give gain adjust and 
DC control to the difference amplifier. The voltage gain of 
the LT1 1 87 is set like a conventional operational amplifier. 
Feedback is applied to pin 8, and it is optimized for gains 
of 2 or greater. The amplifier can be operated single-ended 
by connecting either the (+) or (-) inputs to the +/REF (pin 
1). The voltage gain is set by the resistors: (R F b + Rg)/Rg- 

Like the single-ended case, the differential voltage gain is 
set by the external resistors: (R F b + Rg)/Rg- Tn e maximum 
input differential signal for which the output will respond 
is approximately ±0.38V. 




V OUT 




V OUT 




V OUT 



Vo = m DIFF+ V|n) Vo = (SES^i) V,„ 0lfF -(^) V,„ 



Power Supply Bypassing 

The LT1187 is quite tolerant of power supply bypassing. 
In some applications a 0.1 u.F ceramic disc capacitor 
placed 1/2 inch from the amplifier is all that is required. In 
applications requiring good settling time, it is importantto 
use multiple bypass capacitors. A 0.1 u.F ceramic disc in 
parallel with a 4.7u.F tantalum is recommended. 

Calculating the Output Offset Voltage 

Both input stages contribute to the output offset voltage at 
pin 6. The feedback correction forces balance in the input 
stages by introducing an Input V s at pin 8. The complete 
expression for the output offset voltage is: 

Vout= (V os + los(Rs) + Ib(Rref)) x (Rfb+Rg)/Rg + Ib(Rfb) 

Rs represents the input source resistance, typically 75C2, 
and Rref represents the finite source impedance from the 
DC reference voltage, for V REF grounded, R RE f = OQ. The 
los is normally a small contributor and the expression 
simplifies to: 

Vout = V os (Rfb+Rg)/Rg + Ib(Rfb) 

If Rfb is limited to 1k the last term of the equation 
contributes only 2mV, since l B is less than 2uA 




Figure 1. Simplified Input Stage Schematic 



H.T1WM02 



2-99 



LT1187 



nppucATions inFORmnnon 

Operating with Low Closed-Loop Gains 

The LT1 1 87 has been optimized for closed-loop gains of 
2 or greater. For a closed-loop gain of 2 the response 
peaks about 2dB. Peaking can be eliminated by placing a 
capacitor across the feedback resistor, (feedback zero). 
This peaking shows up as time domain overshoot of 
about 25%. 



Closed-Loop Voltage Gain vs Frequency 











































( 


'■i. 


= 0pF/ 






































































'FB = 


P 






























-Fl 


= 10p 














t 


jV 






_ 








P Ta 
- A V 
Rf 




>5"C 
1 


















B 




soon 
















-Re 




yuuiz 

i iiiiii 

















100k 1M 10M 100M 

FREQUENCY (Hz) 

LT1187.AI03 



Small-Signal Transient Response 




A v = 2, OVERSHOOT = 25%, Rpg = Rq - 1 k 

LT11S7-AIW 



Small-Signal Transient Response 




A v = 2, WITH 8pF FEEDBACK CAPACITOR 

LT1ia7.M05 



Extending the Input Range 

Figure 1 shows a simplified schematic of the LT1187. In 
normal operation the REF pin 1 is grounded or taken to a 
DC offset control voltage and differential signals are ap- 
plied between pins 2 and 3. The input responds linearly 
until all of the 345u.A current flows through the 1.1k 
resistor and Q1 (or Q2) turns off. Therefore the maximum 
input swing is 380mV P or 760mV P - P . The second differen- 
tial pair, Q3 and Q4, is running at slightly larger current so 
that when the first input stage limits, the second stage 
remains biased to maintain the feedback. 

Occasionally it is necessary to handle signals larger than 
760mVp.p at the input. The LT1187 input stage can be 
tricked to handle up to 1 .5V P . P . To do this, it is necessary 
to ground pin 3 and apply the differential input signal 
between pin 1 and 2. The input signal is now applied 
across two 1 .1 k resistors in series. Since the input signal 
is applied to both input pairs, the first pair will run out of 
bias current before the second pair, causing the amplifier 
to go open-loop. The results of this technique are shown 
in the following scope photo. 



2-100 



LT1187 



nppucATions inFORmmion 



LT1187 in Unity Gain 




(A) STANDARD INPUTS, PINS 2 TO 3, V !N = 1.0V P . P 

(B) EXTENDED INPUTS, PINS 2 TO 2, V, N = 1.0V P . P 

(C) EXTENDED INPUTS, PINS 1 TO 2, V, N = 2.0V P . P 

LT1WAIM 



Using the Shutdown Feature 

The LT1 1 87 has a unique feature that allows the amplifier 
to be shutdown for conserving power, or for multiplexing 
several amplifiers onto a common cable. The amplifier will 
shutdown by taking pin 5to V~. In shutdown, the amplifier 
dissipates 1 5mW while maintaining atrue high impedance 
output state of 20k in parallel with the feedback resistors. 
For MUX applications, the amplifiers may be configured 
inverting, noninverting, or differential. When the output is 
loaded with as little 1k from the amplifier's feedback 
resistors, the amplifier shuts off in 600ns. This shutoff can 
be under the control of HC CMOS operating between 0V 
and -5V. 

The ability to maintain shutoff is shown on the curve 
Shutdown Supply Current vs Temperature in the Typical 

1MHz Sine Wave Gated Off with Shutdown Pin 




Performance Characteristics section. At very high el- 
evated temperature it is important to hold the shutdown 
pin close to the negative supply to keep the supply current 
from increasing. 

Send Color Video Over Twisted-Pair 

With an LT1187 it is possible to send and receive color 
composite video signals more than 1 000 feet on a low cost 
twisted-pair. A bidirectional "video bus" consists of the 
LT1 1 95 op amp and the LT1 1 87 video difference amplifier. 
A pair of LT1195S at TRANSMIT 1, is used to generate 
differential signals to drive the line which is back-termi- 
nated in its characteristic impedance. The LT1 1 87, twisted- 
pair receiver, converts signals from differential to single- 
ended. Topology of the LT1187 provides for cable com- 
pensation at the amplifier's feedback node as shown. In 
this case, 1000 feet of twisted-pair is compensated with 
1000pF and 5QQ. to boost the 3dB bandwidth of the 
system from 750kHzto 4MHz. This bandwidth is adequate 
to pass a 3.58MHz chroma subcarrier, and the 4,5MHz 
sound subcarrier. Attenuation in the cable can be compen- 
sated by lowering the gain set resistor Rq. At TRANSMIT 
2, another pair of LT1 1 95s serve the dual function to 
provide cable termination via low output impedance, and 
generate differential signalsforTRANSMIT2. Cable termi- 
nation is made up of a 1 5Q. and 33£2 attenuator to reduce 
the differential input signal to the LT1 1 87. Maximum input 
signal for the LT1 1 87 is 760mV P . P . 



1.5MHz Square Wave Input and Unequalized Response Through 
1000 Feet of Twisted-Pair 




A v = 2, R F0 .R G = 1k 

LT118T-W LTI187-A108 



XTUQfiS 



2-101 



LT1187 




Bidirectional Video Bus 



TRANSMIT 1 TRANSMIT 2 




2-102 




TECHNOLOGY 



LT1189 



Low Power 
Video Difference Amplifier 



F€flTUR€S 

■ Differential or Single-Ended Gain Block (Adjustable) 
■ -3dB Bandwidth, A v = ±10 35MHz 



Slew Rate 

Low Supply Current 
Output Current 
CMRR at 10MHz 
LT1193 Pin Out 
Low Cost 

Single 5V Operation 
Drives Cables Directly 
Output Shutdown 



220V/ns 
13mA 

±20mA 
48dB 



Line Receivers 

Video Signal Processing 

Cable Drivers 

Tape and Disc Drive Systems 



DCSCRIPTIOn 

The LT1 1 89 is a difference amplifier optimized for opera- 
tion on ±5V, or a single 5V supply, and gain >10. This 
versatile amplifier features uncommitted high input im- 
pedance (+) and (-) inputs, and can be used in differential 
or single-ended configurations. Additionally, a second set 
of inputs give gain adjustment and DC control to the 
difference amplifier. 

The LT1189's high slew rate, 220V/u.s, wide bandwidth, 
35MHz, and ±20mA output current require only 1 3mA of 
supply current. The shutdown feature reduces the power 
dissipation to a mere 1 5mW, and allows multiple amplifi- 
ers to drive the same cable. 

The LT1 1 89 is a low power, gain of 1 stable version of the 
popular LT1 1 93, and is available in 8-pin miniDIPs and SO 
packages. For lower gain applications see the LT1187 
data sheet. 



TYPICm APPUCflTIOn 

Cable Sense Amplifier for Loop Through Connections 
with DC Adjust 




VOUT 



Closed-Loop Gain vs Frequency 



z 30 



o 



























1 

Vo 




llll 

*5V 
































Ik 














« 


K 
































































































































1 





















































































































































0.1 1 10 100 

FREQUENCY (MHz) 

LTtlBH -TA02 



2-104 



technSudB 



LT1189 



rbsoiutc mnximum rrtirgs prckrgc/ordcr mFOfimnnon 

Total Supply Voltage (V + to V") 18V 

Differential Input Voltage +6V 

Input Voltage ±Vs 

Output Short Circuit Duration (Note 1 ) Continuous 

Operating Temperature Range 

LT1189M -55°Cto150°C 

LT1189C 0°Cto70°C 

Junction Temperature (Note 2) 

Plastic Package (CN8.CS8) 150°C 

Ceramic Package (CJ8.MJ8) 175°C 

Storage Temperature Range -65°C to 150°C 

Lead Temperature (Soldering, 10 sec.) 300°C 



±5V €L€CTRICfll CHRRRCT€RISTICS t a = 25 c, (Notes) 

V s = +5V, V REF = 0V, RpBi = 900Q from pins 6 to 8, R FB 2 = 100Q from pin 8 to ground, R L = R FB i + Rfb2 = 1k, C l < 10pF, pin 5 open. 



SYMBOL 


PARAMETER 


CONDITIONS 


MIN 


LT1189M/C 
TYP 


MAX 


UNITS 


Vos 


Input Offset Voltage 


Either Input, (Note 4) 
SOIC Package 




1.0 
1.0 


3.0 
4.0 


mV 
mV 


ks 


Input Offset Current 


Either Input 




0.2 


1.0 


HA 


Ib 


Input Bias Current 


Either Input 




±0.5 


±2.0 


u.A 


e n 


Input Noise Voltage 


f = 10kHz 


30 


nV/Vfiz 


in 


Input Noise Current 


f = 10kHz 


1.25 


pA/VHi 


R|N 


Input Resistance 


Differential 


30 


kn 


CiN 


Input Capacitance 


Either Input 


2.0 


pF 


V|N LIM 


Input Voltage Limit 


(Note 5) 


+170 


mV 




Input Voltage Range 




-2.5 




3.5 


V 


CMRR 


Common-Mode Rejection Ratio 


V CM = -2.5V to 3.5V 


80 


105 




dB 


PSRR 


Power Supply Rejection Ratio 


V S = ±2.375V to±8V 


75 


90 




dB 


V OUT 


Output Voltage Swing 


V S = ±5V, R L = 1k,A v = 50 


±3.8 


±4.0 




V 






V S = ±8V, R L = 1k, A v = 50 


±6.7 


±7.0 










V S = ±8V, R L = 300Q,A V = 50, (Note 3) 


±6.4 


±6.8 






Ge 


Gain Error 


V = ±1.0V,A V = 10 




1.0 


3.5 


% 


SR 


Slew Rate 


(Note 6, 10) 


150 


220 




v/p.s 


FPBW 


Full Power Bandwidth 


V = 2V P .p, (Note 7) 


35 


MHz 


BW 


Small Signal Bandwidth 


A v = 10 


35 


MHz 


Ut 


Rise Time, Fall Time 


A v = 50, V = +1 ,5V, 20% to 80% (Note 1 0) 


35 


50 


75 


ns 


•PD 


Propagation Delay 


R L = 1 k, V = ±125mV, 50% to 50% 


12 


ns 




Overshoot 


V = ±50mV 


10 


% 


k 


Settling Time 


3V Step, 0.1%, (Note 8) 


1 


U.S 


Biff Ay 


Differential Gain 


R L = 1k,A„=10,(Note9) 


0.6 


% 


Diff Ph 


Differential Phase 


R L = 1k,A v =10, (Note 9) 


0.75 


DEGp.p 


Is 


Supply Current 






13 


16 


mA 




Shutdown Supply Current 


Pin 5 at V" 




0.8 


1.5 


mA 





TOP VIEW 




ORDER PART 
NUMBER 


+/REF LT 
-IN IT 
tIN [T 

v- E 




JJ -/FB 

JJv* 

TJ OUT 
JJ S/D 


LT1189CJ8 
LT1189CN8 
LT1189CS8 
LT1189MJ8 


J8 PACKAGE N8 PACKAGE 
8-LEAD HERMETIC DIP 8-LEAD PLASTIC DIP 

S8 PACKAGE 
8-LEAD PLASTIC SOIC 

LTU89-POI01 

Tjmax = 150°C, e JA = 100"C/W (J8) 
TjMAX = 150 o C,e JA = 100=C/W(N8) 
W = 150"C,e JS =150°C/W (S8) 


S8 PART MARKING 


1189 



Consult factory for Industrial grade parts. 



2-105 



LT1189 



±5V €l€CTRICRl CHARACTERISTICS t a =25°c, (Notes) 



V s = ±5V, V REF = OV, R F bi = 900n from pins 6 to 8, R F B2 = 100£i from pin 8 to ground, R L = R F bi + Rr-B2 = 1k> Cl ^ 10pF, pin 5 open. 



SYMBOL 


PARAMETER 


CONDITIONS 


LT1189M/C 
MIN TYP MAX 


UNITS 


1 

■S/D 


Shutdown Pin Current 


Pin 5 at V" 


5 25 


HA 


L_ 
l on 




Turn On Time 


Pin 5 from V~to Ground, R L = 1k 


500 


ns 


t « 
l off 


Turn Off Time 


Pin 5 from Ground toV", R L = 1k 

, 


600 


ns 


5V €U 

V S + =5V,V S 


ECTRICRL CHARACTERISTICS t a = 25c, (Notes) 

- = OV, V REF = 2-5V, Rfbi = 9MK1 from pins 6 to 8, Rfb2 = 100n from pin 8 to Vref, »l = "fbi + «FB2 = 1k. C L < 10pF, pin 5 open. 


SYMBOL 


PARAMETER 


CONDITIONS 


LT1189M/C 
MIN TYP MAX 


UNITS 


Vos 


Input Offset Voltage 


Either Input, (Note 4) 
SOIC Package 


1.0 3.0 

1.0 5.0 


mV 
mV 




Input Offset Current 


Either Input 


0.2 1.0 


U.A 




Ib 


Input Bias Current 


Either Input 


±0.5 +2.0 


HA 




Input Voltage Range 




2.0 3.5 


V 


CMRR 


Common-Mode Rejection Ratio 


V CM = 2.0V to 3.5V 


80 100 


dB 


VOUT 


Output Voltage Swing 


R L = 300£1 to Ground 
(Note 3) 


Vout High 


3.6 4.0 


V 


Vqut Low 


0.15 0.4 


SR 


Slew Rate 


V = 1.5V to 3.5V 


175 


V/p.s 


BW 


Small-Signal Bandwidth 


A v = 10 


30 


MHz 


Is 


Supply Current 




12 15 


mA 




Shutdown Supply Current 


Pin 5 at V- 


0.8 1.5 


mA 


Is/D 


Shutdown Pin Current 


Pin 5 at V" 


5 25 


uA 


±5V €l€CTRICRl CHARACTERISTICS -55 c<t a <i 2 5 c, (Notes) 

V s = ±5V, Vref = OV, Rfbi = 900Q from pins 6 to 8, R F B2 = 100Q from pin 8 to ground, R L = R F bi + R F B2 = Ik, C u < 1 0pF. pin 5 open. 


SYMBOL 


PARAMETER 


CONOITIONS 


LT1189M 
MIN TYP MAX 


UNITS 


Vos 


Input Offset Voltage 


Either Input, (Note 4) 


1.0 7.5 


mV 


AVqs/AT 


Input Vos Drift 




10 


p.V/°C 


los 


Input Offset Current 


Either Input 


0.2 1.5 


uA 


Ib 


Input Bias Current 


Either Input 


±0.5 ±3.5 


HA 




Input Voltage Range 




-2.5 3.5 


V 


CMRR 


Common-Mode Rejection Ratio 


V CM = -2.5Vto 3.5V 


80 105 


dB 


PSRR 


Power Supply Rejection Ratio 


V s = ±2.375V to ±8V 


65 90 


dB 


VOUT 


Output Voltage Swing 


V S = ±5V, R L = 1k,A v = 50 


±3.7 ±4.0 


V 


V S = ±8V, R L = 1k, A v = 50 


±6.6 ±7.0 




V s = ±8V, R L = 300Q, A v = 50, (Note 3) 


±6.4 ±6.6 


Ge 


Gain Error 


V = ±1V,A V = 10, R L = 1k 


1.0 6.0 


% 


Is 


Supply Current 




13 17 


mA 




Shutdown Supply Current 


Pin 5 at V", (Note 11) 


0.8 1.5 


mA 


Is/D 


Shutdown Pin Current 


Pin 5 at V- 


5 25 


u.A 



2-106 



LT1189 



±5V €l€CTRICfll CHRRflCT€RISlHCS o c<t a£ 7oc (N.te 3) 

V s = ±5V, V REF = OV, Rpbi = 900U from pins 6 to 8, R FB 2 = 100£i from pin 8 to ground, R L = R FB i + Rfb2 = 1k, C L < 10pF, pin 5 open. 



SYMBOL 


PARAMETER 


CONDITIONS 


LT1189C 
MIN TYP MAX 


UNITS 


Vos 


Input Offset Voltage 
(Note 4) 


Either Input 
SOIC Package 


1.0 3.0 
l.U D.U 


mV 
mv 


aVos/at 


Input Vos D rift 




5.0 


t iV/°C 


los 


Input Offset Current 


Either Input 


0.2 1 .5 




■ 

Ib 


Input Bias Current 


Either Input 


±U.O 10. 


|iA 




Input Voltage Range 




-2.5 3.5 


V 


CMRR 


Common-Mode Rejection Ratio 


V CM = -2.5V to 3.5V 


80 105 


dB 


PSRR 


Power Supply Rejection Ratio 


V s = +2.375V to ±8V 


70 90 


dB 


VOUT 


Output Voltage Swing 


V S = ±5V, R L = 1k,A v = 50 


±3.7 ±4.0 


V 


V S = ±8V, R L = 1k, A v = 50 


±6.6 ±7.0 


V s = ±8V, R L = 300Q, A v = 50. (Note 3) 


±6.4 ±6.6 


Ge 


Gain Error 


V = ±1V, A v = 10, R L = 1k 


1.0 3.5 


% 


Is 


Supply Current 




13 17 


mA 




Shutdown Supply Current 


Pin 5 at V", (Note 11) 


0.8 1.5 


mA 




■s/D 


Shutdown Pin Current 


Pin 5 at V- 


5 25 


U.A 


5V €l€CTRICfll CHRRRCT€RISTICS o°c,t s£ 7o°c, (Notes) 

V s + = +5V, V s ~ = OV, V REF = 2.5V, R FB i = 900n from pins 6 to 8, R FB 2 = 100Q from pin 8 to Vref, Rl = Rfbi + "fb2 = 1k, C L < 10pF, pin 5 open. 


SYMBOL 


PARAMETER 


CONDITIONS 


LT1189C 
MIN TYP MAX 


UNITS 


Vos 


Input Offset Voltage, (Note 4) 



Either Input 


1.0 3.0 


mV 


AV 0S /AT 


Input V s Drift 




5.0 


M V/'C 


los 


Input Offset Current 


Either Input 


0.2 1.5 


uA 


Ib 


Input Bias Current 


Either Input 


±0.5 ±3.5 


HA 




Input Voltage Range 




2.0 3.5 


V 


CMRR 


Common-Mode Rejection Ratio 


V CM = 2.0Vto 3.5V 


80 100 


dB 


Vout 


Output Voltage Swing 


R L = 300Q to Ground 
(Note 3) 


Vout High 


3.5 4.0 


V 


Vqut Low 


0.15 0.4 


Is 


Supply Current 




12 16 


mA 




Shutdown Supply Current 


Pin 5 at V, (Note 11) 


0.8 1.5 


mA 


Is/D 


Shutdown Pin Current 


Pin 5 at V 


5 25 


uA 



Note 1: A heat sink may be required to keep the junction temperature below 

absolute maximum when the output is shorted continuously. 

Note 2: Tj is calculated from the ambient temperature T A and power 

dissipation P D according to the following formulas: 

LT1189MJ8, LT1 189CJ8: Tj = T A + (P D x 100-C/W) 
LT1189CN8: T, = T A + (P x 100°C/W) 

LT1 1 89CS8: Tj = T A + (P D x 1 50°C/W) 

Note 3: When R L = 1 k is specified, the load resistor is Rfbi + Rfb2. hut when 

R L = 300Q is specified, then an additional 430£1 is added to the output such 

that (R FB i + R FB2 ) in parallel with 430S2 is R L = 300Q. 

Note 4: V os measured at the output (pin 6) is the contribution from both input 

pair, and is input referred. 

Note 5: V !N UM is the maximum voltage between -V !N and +V| N (pin 2 and 
pin 3) for which the output can respond. 



Note 6: Slew rate is measured between ±1V on the output, with a Vim step of 
±0.5V,A v = 10and R L = 1 k. 

Note 7: Full power bandwidth is calculated from the slew rate measurement: 
FPBW = SR/2itVp. 

Note 8: Settling time measurement techniques are shown in "Take the 
Guesswork Out of Settling Time Measurements," EDN, September 19, 1985. 
Note 9: NTSC (3.58MHz). 

Note 10: AC parameters are 100% tested on the ceramic and plastic DIP 
packaged parts (J8 and N8 suffix) and are sample tested on every lot of the SO 
packaged parts (S8 suffix). 

Note 11 : See Application section for shutdown at elevated temperatures. Do 
not operate shutdown above Tj > 125°C. 



XT 



2-107 



LT1189 



TVPICfiL P€RFORmnnC€ CHflRflCT€RiSTICS 



Input Bias Current vs 
Common-Mode Voltage 



v 










































































55' 




















25°( 
25" 





































































-3 -2 -1 1 2 3 4 5 
COMMON-MODE VOLTAGE (V) 



Input Bias Current vs Temperature 



. Vc - ±5V 


































+1 








































































4 


























OS 







































































































































-50 -25 25 50 75 100 125 
TEMPERATURE (°C) 

LTI tfl8>TPC0Z 



Common-Mode Voltage vs 
Temperature 



v* 

-0.5 
£ -1.0 

2 -2.0 

o 
o 
s 

z 2.0 
o 

I 1-5 
o 

° 1.0 
0.5 

v- 







I I I 

— V + = 1.8V TO 9V 


























































' « 




















V* 


-1.8V 


TO-S 


V 

































-50 -25 25 50 75 100 125 
TEMPERATURE (°C) 

LTI1B9-1PCK3 



Equivalent Input Noise 
Frequency 





200 


{ 


180 








160 






<z 


140 


O 




> 


120 






o 


100 


Z 






80 






3£ 


60 








40 


1 






20 


o 


























III 1 1 
V s = i5\ 
T A =25- 
r- - no 


C 

































































































































































































100 1k 10k 
FREQUENCY (Hz) 



Shutdown Supply Current vs 
Temperature 




-50 -25 25 50 75 100 125 
TEMPERATURE ("C) 

LTllW-TPCOT 



Equivalent Input Noise Current vs 
Frequency 



1 





















II 1 1 1 1 

i/ s ■ ±5V 
r A = 25°C 































































































- 







































































































































































100 1k 10k 

FREQUENCY (Hz) 

LT11B9 ■ Tt 



Gain Error vs Temperature 



1 1 1 

-V S = ±5V 
„V 0UT = t1V 
A v =10 
































































L" 



























































































































































































































































-50 -25 25 50 75 100 125 
TEMPERATURE (°C) 

LT11B9-TPCWB 



Supply Current vs Supply Voltage 































-5 


5'C 


















'I 






































125"C 







































































2 4 6 
iSUPPLY VOLTAGE (V) 



Open-Loop Gain vs Temperature 



I I I 

V S = ±5V 








"1 


, =1K 










V 


= 




V 
































































Hi 




00 


a 

























































































































-50 -25 25 50 75 100 125 
TEMPERATURE (°C) 

LT1T89-JFCW 



2-108 



XTIJJBK 



LT1189 



TYPICAL P€RFORmnnC€ CHRRflCT€RISTICS 



Gain, Phase vs Frequency 



Open-Loop Voltage Gain vs 
Load Resistance 



Gain Bandwidth Product vs 
Supply Voltage 



-20 
100k 



















-v s = 


llll 

±5V - 










p 


HAS 


E 








25*C 


























1k 


































































\GAIN 
























































































































































k 































1M 10M 
FREQUENCY (Hz) 



LTI1M -TPC1I 



Gain Bandwidth Product and 
Phase Margin vs Temperature 























I I I 






















»S 
R 


= ±ov 

■ It r 
- 9nrfR_ 






















A, 


























































GAIN BANDWIDTH V 


















F 


SO 


DU 


CT 


















































































































^F 


HA 


SE 


M 




N 











































































































-50 -25 25 50 75 100 125 
TEMPERATURE (°C) 

LT11B9-TPC13 

Power Supply Rejection Ratio vs 
Frequency 





A.. 


= 2C 


dS 








^ ~- 

T A = - 


5°C 


















. = 2 






































= 1 















































LOAD RESISTANCE (£i) 



Output Impedance vs Frequency 



2 4 6 8 10 

tSUPPLY VOLTAGE (V) 

LT1ieS-TPC12 

Common-Mode Rejection Ratio 
vs Frequency 




1k 10k 100k 1M 10M 100M 
FREQUENCY (Hz) 

LT1I89-TPCU 

Output Short Circuit Current vs 
Temperature 



1M 10M 100M 

FREQUENCY (Hz) 

LTI189-TPC15 



10M 100M 



36 
35 
34 
33 
32 
31 
30 

-50 -25 25 50 75 100 125 
TEMPERATURE CO 

LT1199-TPC17 























V 


5 = 


±5\ 

















































































































































± Output Swing vs Supply Voltage 





































































-55°C 


I H L = 1k 

' ±1.8V<V s <i9V 






125°C 




































^s-c; 









































2 



±SUPPLY VOLTAGE (V) 



LTl1B9-~iPClB 



2-109 



LT1189 



TVPicni pcRFORmnncc char 



Output Voltage Swing vs 
Load Resistance 



I -3 





5V 


























_ 




5 


























5" 


C 
















/ 


k 


= 25°C 
















































h 


= -55'C 




























5 


c 








T A = 25'C 




S— ;T 





























































10 100 

LOAD RESISTANCE (Q) 



Slew Rate vs Temperature 



























-S 




i/R 


ATE 
























































































• S 




R) 


TE 
























































V S = ±5 
-R L = 1k 

V = ±2 
"A v = 10 

I 


V 






















V 













































-50 -25 25 50 75 100 125 
TEMPERATURE CC) 

LT1 1 S9 • TPC20 



Output Voltage Step vs 
Settling Time. Ay = 10 



t I r 

V S = ±5V 
■T A = 25°C" 
R L = 1k 



100 140 180 220 260 300 340 
SETTLING TIME (ns) 

LTHBB.TTO1 



Harmonic Distortion vs 
Output Level 




2 3 4 

OUTPUT VOLTAGE (Vp.p) 

mm tm 



Large-Signal Transient Reponse 



Small-Signal Transient Reponse 











3 




8.9 5"» 






















- 






\ 






I 


.... 






\ 












V 






1 1 












— 




































2Zr> I 



A v = 1 0, R u = 1 k, *SR = 223V/JB, -SR = 232V/(is 




A v = 10. R L = 1k, t r = 9.40ns 



2-110 



LT1189 



nppucmions mFORmnnon 

The primary use of the LT1 1 89 is in converting high speed 
differential signals to a single-ended output. The LT1 1 89 
video difference amplifier has two uncommitted high input 
impedance (+) and (-) inputs. The amplifier has another 
set of inputs which can be used for reference and feed- 
back. Additionally, this set of inputs give gain adjust, and 
DC control to the differential amplifier. The voltage gain of 
the LT1 1 89 is set like a conventional operational amplifier. 
Feedback is applied to pin 8, and it is optimized for gains 
of 10 or greater. The amplifier can be operated single- 
ended by connecting either the (+) or (-) inputs to the 
+/REF (pin 1). The voltage gain is set by the resistors: 
(Rfb + Rg)/Rg- 

Like the single-ended case, the differential voltage gain is 
set by the external resistors: (R FB + Rg)/Rg- The maximum 
input differential signal for which the output will respond 
is approximately +170mV. 





V !N DIFF 




Vo = (V|N DIFF+Vin) 



Rfb + Rg 



l = (^)v INDIFF -(te) VlN 

LT1T89-AW1 



Power Supply Bypassing 

The LT1 189 is quite tolerant of power supply bypassing. 
In some applications a 0.1u.F ceramic disc capacitor 
placed 1/2 inch from the amplifier is all that is required. In 
applications requiring good settling time, it is important to 
use multiple bypass capacitors. A 0.1u.F ceramic disc in 
parallel with a 4.7u.F tantalum is recommended. 

Calculating the Output Offset Voltage 

Both input stages contribute to the output offset voltage at 
pin 6. The feedback correction forces balance in the input 
stages by introducing an Input V s at pin 8. The complete 
expression for the output offset voltage is: 

Vout= (V os + los(Rs) + Ib(Rref)) x (Rfb + Rg)/Rg + Ib(Rfb) 

Rs represents the input source resistance, typically 75Q, 
and Rref represents finite source impedance from the 
DC reference voltage, for V REF grounded, R RE p = OQ the 
los is normally a small contributor and the expression 
simplifies to: 



out V OU t = Vos(Rfb + Rg)/Rg + Ib(Rfb) 



If R F b is limited to 1k, the last term of the equation 
contributes only 2mV since l B is less than 2u.A. 




mas -me 



2-111 



LT1189 



flppiicRTions inFORmnnon 

Instrumentation Amplifier Rejects High Voltage 

Instrumentation amplifiers are often used to process 
slowly varying outputsf rom transducers. With the LT1 1 89 
it is easy to make an instrumentation amplifier that can 
respond to rapidly varying signals. Attenuation resistors 
in front of the LT1189 allow very large common-mode 
signals to be rejected while maintaining good frequency 
response. The input common-modeand differential-mode 
signals are reduced by 1 00:1 , while the closed-loop gain 
is set to be 100, thereby maintaining unity-gain input to 
output. The unique topology allows for frequency re- 
sponse boost by adding 1 50pF to pin 8 as shown. 



3.5MHz Instrumentation Amplifier Rejects 120V P .p 






"0.1% RESISTORS 
WORST CASE CMRR = 48d8 



150pF £l00S2 



Output of Instrumentation Amplifier with 1MHz Square Wave 
Riding on 120V P P at the Input 




High Voltage Instrumentation Amplifier Response 




Operating with Low Closed-Loop Gain 

The LT1189 has been optimized for closed-loop gains of 
1 or greater. The amplifier can be operated at much lower 
closed-loop gains with the aid of a capacitor Cfb across 
the feedback resistor, (feedback zero). This capacitor 
lowers the closed-loop 3dB bandwidth. The bandwidth 
cannot be made arbitrarily low because Cfb is a short at 
high frequency and the amplifier will appear configured 
unity-gain. As an approximate guideline, make BW x Avcl 
= 200MHz. This expression expands to: 



Avcl 



2tc(R fb )(C fb ) 



200MHz 



or: 



'FB 



^VCL 



(200MHz)(2tc)(R fb ) 



The effect of the feedback zero on the transient and 
frequency response is shown for Ay = 4. 



2-112 



LT1189 



nppucmions inFORmnnon 

Closed-Loop Voltage Gain vs Frequency 




100k 



1M 10M 100M 

FREQUENCY {Hz) 



Small-Signal Transient Response 



A 



















\ 


















] 






-— 














V 












































ill 






— 














■ 
















V 

20 









A v = 4. R FB = 910£1. R G = 300S1 



Small-Signal Transient Response 




Reducing the Closed-Loop Bandwidth 

Although it is possible to reduce the closed-loop band- 
width by using a feedback zero, instability can occur if the 
bandwidth is made too low. An alternate technique is to do 
differential filtering at the input of the amplifier. This 
technique filters the differential input signal, and the 
differential noise, butdoes notfilter common-mode noise. 
Common-mode noise is rejected by the LT1189's CMRR. 

10MHz Bandwidth Limited Amplifier 







R1 






11011 


SIS 


K) 


CI . 


eN 




68pF ■ 






R2 




11012 




2ji(R1 + R2)C1 
SIGteNp eWcM 
FILTER CMR 



Using the Shutdown Feature 

The LT1 1 89 has a unique feature that allows the amplifier 
to be shutdown for conserving power, or for multiplexing 
several amplifiers onto a common cable. The amplifier will 
shutdown by taking pin 5 to V". In shutdown, the amplifier 
dissipates 1 5mW while maintaining atrue high impedance 
output state of about 20k£2 in parallel with the feedback 
resistors. For MUX applications, the amplifiers may be 
configured inverting, non-inverting, or differential. When 
the output is loaded with as little as 1 knf rom the amplifier's 
feedback resistors, the amplifier shuts off in 600ns. This 
shutoff can be under the control of HC CMOS operating 
between OV and -5V. 



A v = 4. R FB = 91 Ofl. R G = 300Si. CFB = 5pF 



2-113 



LT1189 



flppucmions inFORmnTion 



1MHz Sine Wave Gated Off with Shutdown Pin 




Ay = 10, R FB = 900Si, R G = 100S2 

LT11BS-AI10 



The ability to maintain shutoff is shown on the curve Shut 
down Supply Current vs Temperature in the Typical Per- 
formance Characteristics section. At very high elevated 
temperature it is importantto hold the shutdown pin close 
to the negative supply to keep the supply current from 
increasing. 



tvpicrl nppucmion 



CABLE 1 



CABLE 2 




2-114 




2-115 




TECHNOLOGY 



LT1195 



Low Power, High Speed 
Operational Amplifier 



KflTUIKS 

■ Gain-Bandwidth Product 

■ Unity-Gain Stable 

■ Slew Rate 

■ Output Current 

■ Low Supply Current 

■ High Open-Loop Gain 

■ Low Cost 

■ Single Supply 5V Operation 

■ Industry Standard Pinout 

■ Output Shutdown 

nppucmions 

■ Video Cable Drivers 

■ Video Signal Processing 

■ Fast Peak Detectors 

■ Fast Integrators 

■ Video Cable Drivers 

■ Pulse Amplifiers 



D€SCRIPTIOn 

50MHz The LTC1 1 95 is a video operational amplifier optimized for 
operation on single 5V and ±5V supply. Unlike many high 
1 65V/jos speed amplifiers, the LT1195 features high open-loop 
±20mA gain, over75dB, and the ability to drive heavy loadsto afull 
1 2mA power bandwidth of 8.5 MHz at 6V P - P . The LT1 1 95 has a 
nV unity-gain stable bandwidth of 50MHz, and a 60° phase 
margin, and consumes only 12mA of supply current, 
making it extremely easy to use. 

Because the LT1 1 95 is a true operational amplifier, it is an 
ideal choice for wideband signal conditioning, fast inte- 
grators, peak detectors, active filters, and applications 
requiring speed, accuracy, and low cost. 

The LT1 1 95 is a low power version of the popular LT1 1 90, 
and is available in 8-pin miniDIPs and SO packages with 
standard pinouts. The normally unused pin 5 is used for a 
shutdown feature that shuts off the output and reduces 
power dissipation to a mere 15mW. 




2-116 



LT1195 



imsoiutc mnximum RnnnGs 

Total Supply Voltage (V + to V ) 18V 

Differential Input Voltage ±6V 

Input Voltage ±V S 

Output Short-Circuit Duration (Note 1) Continuous 

Operating Temperature Range 

LT1195M -55°Cto125°C 

LT1195C 0°Cto 70°C 

Junction Temperature (Note 2) 

Plastic Package (CN8, CS8) 150°C 

Ceramic Package (CJ8, MJ8) 175°C 

Storage Temperature Range -65°C to 150°C 

Lead Temperature (Soldering, 10 sec) 300°C 



pncKfiG€/ORD€R inFORmRTion 







TOP VIEW 




ORDER PART 


BAL [7 




J] BAL 


NUMBER 


-IN [T 
+!N [I 




av 

H OUT 

T] S/D 


LT1195MJ8 
LT1195CJ8 
LT1195CN8 
LT1195CS8 


J8 PACKAGE N8 PACKAGE 
8-LEAD CERAMIC DIP 8- LEAD PLASTIC DIP 


8 


S8 PACKAGE 
LEAD PLASTIC SOIC 


S8 PART MARKING 


Tjmax = 
Tjmax = 
Tjuax = 


150°C,ej A = 10CI°C/W(J8) 
150-C.e JA = 100'C/W(N8) 
150°C,e JA = 150°C/W(S8) 


1195 



Consult factory for Industrial grade parts. 



±5V €l€CTRICfll CHRRRCT6RISTICS t a =2 5 °c 

V s = ±5V, C L < 10pF, pin 5 open circuit, unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS 


LT1195M/C 
MIN TYP 


MAX 


UNITS 


Vos 


Input Offset Voltage 


J8, N8 Package 
S8 Package 




3.0 
3.0 


8.0 
10.0 


mV 
mV 


los 


Input Offset Current 






0.2 


1.0 


MA 


Ib 


Input Bias Current 






±0.5 


±2.0 


uA 


e n 


Input Noise Voltage 


f = 10kHz 


70 


nVVHz 


in 


Input Noise Current 


f = 10kHz 


2.0 


pAVHz 


R|N 


Input Resistance 


Differential Mode 




230 


kQ 


Common Mode 




20 


Mn 


C|N 


Input Capacitance 


A v = 1 


2.2 


PF 




Input Voltage Range 


(Note 3) 


-2.5 




3.5 


V 


CMRR 


Common-Mode Rejection Ratio 


V CM = -2.5 to 3.5V 


60 


85 




dB 


PSRR 


Power Supply Rejection Ratio 


V s = +2.375V to±8V 


60 


65 




dB 


AvOL 


Large-Signal Voltage Gain 


R L = 1k,V uT = ±3V 
R L = 150n,V O uT=±3V 


2.0 
0.5 


7.5 
1.5 




V/mV 
V/mV 








V S = ±8V, R L = 1k, V ijT = ±5V 




11.0 




V/mV 


V 0UT 


Output Voltage Swing 


V S = +5V, R L = 1k 
V s = ±8V, R|. = 1 k 


±3.8 
±6.7 


±4.0 
±7.0 




V 
V 


SR 


Slew Rate 


A v = -1, R L = 1k, (Note 4, 9) 


110 


165 




V/ns 


FPBW 


Full Power Bandwidth 


V 0U T = 6Vp.p, (Note 5) 


8.75 


MHz 


GBW 


Gain-Bandwidth Product 




50 


MHz 


tr1,t„ 


Rise Time Fall Time 


A v = 50, Volt = ±1 5V, 20% to 80%, (Note 9) 


125 


170 


250 


ns 


tr2. tf2 


Rise Time, Fall Time 


A v = 1 , V 0U T = ±1 25mV, 1 0% to 90% 


3.4 


ns 


tpD 


Propagation Delay 


A v = 1, Vout = ±1 25mV, 50% to 50% 




2.5 




ns 




Overshoot 


A v = 1 , V ou t = ±1 25mV 




22 




% 


ts 


Settling Time 


3VStep, 0.1%, (Note 6) 


220 


ns 


Diff Ay 


Differential Gain 


R L = 150fi,A v = 2, (Note 7) 


1.25 


% 


Diff Ph 


Differential Phase 


R L = 150a,A v = 2, (Note 7) 


0.86 


DEGp-p 



LT1195 



±5V €l€CTRICflil CHARACTERISTICS t a = 25 C 



V s = +5V, C L < 10pF, pin 5 open circuit, unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS 


LT1195M/C 
MIN TYP MAX 


UNITS 


Is 


Supply Current 




12 16 


mA 




Shutdown Supply Current 


Pin 5 at V" 


0.8 1.5 


mA 


Is/D 


Shutdown Pin Current 


Pin 5 at V" 


5 25 


(iA 


•on 


Turn-On Time 


Pin5fromV"to Ground, R L = 1k 


160 


ns 


toFF 


Turn-Off Time 


Pin 5 from Ground to V~, R L = 1k 


700 


ns 


5V €L 

V s + = 5V, \ 


ECTRICRl CHARACTERISTICS t a = 25 °c 

s" = OV, V CM = 2.5V, C L < 10pF, pin 5 open circuit, unless otherwise noted. 


SYMBOL 


PARAMETER 


CONDITIONS 


LT1195M/C 
MIN TYP MAX 


UNITS 


Vos 


Input Offset Voltage 


J8, N8 Package 
S8 Package 


3.0 9.0 
3.0 11.0 


mV 
mV 










los 


Input Offset Current 




0.2 1.0 


HA 


Ib 


Input Bias Current 




±0.5 ±2.0 


ma 




Input Voltage Range 


(Note 3) 


2.0 3.5 


V 


CMRR 


Common-Mode Rejection Ratio 


V CM = 2Vto 3.5V 


60 85 


dB 


AvOL 


Large-Signal Voltage Gain 


R L = 1 50£i to Ground, V = 1 V to 3V 


0.5 3.0 


V/mV 


VOUT 


Output Voltage Swing 


R L = 150£2 to Ground 


Vout High 


3.5 3.8 


V 


Vqut Low 


0.25 0.4 


V 


SR 


Slew Rate 


Av = -1. V OU T = 1Vto3V 


140 


V/ms 


GBW 


Gain-Bandwidth Product 




45 


MHz 


Is 


Supply Current 




11 15 


mA 




Shutdown Supply Current 


Pin 5 at V" 


0.8 1.5 


mA 


Is/D 


Shutdown Pin Current 


Pin 5 at V" 


5 25 


uA 


±5V €l€CTAICAl CHARACTERISTICS -55 c t a 125 c, Note 10) 

V$ = ±5V, pin 5 open circuit, unless otherwise noted. 


SYMBOL 


PARAMETER 


CONDITIONS 


LT1195M 
MIN TYP MAX 


UNITS 


Vos 


Input Offset Voltage 




3.0 15.0 


mV 


AVos/AT 


Input V s Drift 




17 


HV/°C 


los 


Input Offset Current 


Either Input 


0.2 2.0 


MA 


Ib 


Input Bias Current 


Either Input 


±0.5 ±2.5 


uA 


CMRR 


Common-Mode Rejection Ratio 


V CM = -2.5V to 3.5V 


55 85 


dB 


PSRR 


Power Supply Rejection Ratio 


V s = ±2.375V to ±8V 


55 80 


dB 


AVOL 


Large-Signal Voltage Gain 


RL = 1k,V 0UT = ±3V 
R L = 150aV OU T = +3V 


1.50 5.0 
0.25 0.8 


V/mV 
V/mV 


VOUT 


Output Voltage Swing 


R L = 1k 


±3.7 ±3.9 


V 


Is 


Supply Current 




12 18 


mA 




Shutdown Supply Current 


Pin 5 at V- (Note 8) 


0.8 2.5 


mA 


Is/d 


Shutdown Pin Current 


Pin 5 at V" 


5 25 


MA 



2-118 



LT1195 



±5V €l€CTRICRl CHARACTERISTICS o x<t a < 7 o c 



V s = ±5V, pin 5 open circuit, unless otherwise noted. 












LT1195C 






SYMBOL 


PARAMETER 


CONDITIONS 


MIN 


TYP 


MAX 


UNITS 


Vos 


Input Offset Voltage 


J8, N8 Package 




3.0 


10.0 


mV 




S8 Package 




3.0 


15.0 


mV 


AV 0S /AT 


Input Vos Drift 




12 


nv/°c 


los 


Input Offset Current 






0.2 


1.7 


MA 


Is 


Input Bias Current 






±0.5 


±2.5 


uA 


CMRR 


Common-Mode Rejection Ratio 


V CM = -2.5Vto 3.5V 


60 


85 




dB 


PSRR 


Power Supply Rejection Ratio 


V s = ±2.375V to ±5V 


60 


90 




dB 


Avol 


Large-Signal Voltage Gain 


Rl = H<,Vout = ±3V 


2.0 


7.5 




V/mV 






R L = 150n,V OU T = ±3V 


0.3 


1.5 




V/mV 


VOUT 


Output Voltage Swing 


R L = 1k 


±3.7 


±3.9 




V 


Is 


Supply Current 






12 


17 


mA 




Shutdown Supply Current 


Pin 5 at V", (Note 8) 




0.9 


2.0 


mA 


'S/D 


Shutdown Pin Current 


Pin 5 at V" 




5 


25 





5V €l€CTRICfll CHARACTERISTICS o c^ 7 o c 

V s + = 5V, V s ~ = 0V, pin 5 open circuit, i 



SYMBOL 


PARAMETER 


CONDITIONS 


MIN 


LT1195C 
TYP 


MAX 


UNITS 


Vos 


Input Offset Voltage 


J8, N8 Package 
S8 Package 




1.0 
1.0 


10.0 
15.0 


mV 
mV 


av os /at 


Input V s Drift 




15 


nw°c 


los 


Input Offset Current 


Either Input 




0.2 


1.7 


HA 


Ib 


Input Bias Current 


Either Input 




±0.5 


±2.5 


uA 




Input Voltage Range 


(Note 3) 


2.0 




3.5 


V 


CMRR 


Common-Mode Rejection Ratio 


V CM = 2Vto 3.5V 


60 85 


dB 


VOUT 


Output Voltage Swing 


R L = 150£1 to Ground 


Vout High 


3.5 


3.75 




V 








Vqut Low 




015 


0.4 


V 


Is 


Supply Current 






12 


16 


mA 




Shutdown Supply Current 


Pin 5 at V" (Note 8) 




0.9 


2.0 


mA 


Is D 


Shutdown Pin Current 


Pin 5 at V" 




5 


25 


MA 



Note 1: A heat sink may be required to keep the junction temperature 

below absolute maximum when the output is shorted continuously. 

Note 2: Tj is calculated from the ambient temperature T A and power 

dissipation P D according to the following formulas: 
LT1 1 95MJ8, LT1 1 95CJ8: Tj = T A + (P D x 1 00°C/W) 
LT1195CN8: Tj = T A + (P D x 1 00°C/W) 

LT1195CS8: Tj = T A + (P D x 1 50°C/W) 

Note 3: Exceeding the input common-mode range may cause the output 

to invert. 

Note 4: Slew rate is measured between ±1V on the output, with a ±3V 
input step. 

Note 5: Full power bandwidth is calculated from the slew rate measure- 
ment: FPBW = SR/2itV P . 



Note 6: Settling time measurement techniques are shown in "Take the 
Guesswork Out of Settling Time Measurements," EDN, September 19, 
1985. 

Note 7: NTSC (3.58MHz). For R L = 1k, Diff A v = 0.3%, Diff Ph = 0.35°. 

Note 8: See Applications Information section for shutdown at elevated 

temperatures. Do not operate the shutdown above Tj > 1 25°C. 

Note 9: AC parameters are 100% tested on the ceramic and plastic DIP 

packaged parts (J8 and N8 suffix) and are sample tested on every lot of 

the SO packaged parts (S8 suffix). 

Note 10: Do not operate at A v < 2 for T A < 0°C. 



xruoas 



2-119 



LT1195 



TYPicm p€RFonmnnc€ CHnnncTCRiSTics 



Input Bias Current vs 
Common-Mode Voltage 





3.0 




2.5 


% 


2.0 


1 




oz 
cc 


1.5 


13 
o 




CO 

< 


1.0 






PUT 


0.5 













■0.5 





•a 


V 




















































































-5! 
















25 


X — 






f 










125"C 
I 







-5 -4 -3 -2 -1 1 2 3 4 5 
COMMON-MODE VOLTAGE (V) 



Input Bias Current vs 
Temperature 





I 

±5V 




































-I 




















































































-i 


8 










































OS 













































































































-25 25 50 75 100 125 
TEMPERATURE CC) 

HUN 



Common-Mode Voltage vs 
Temperature 



v* 

-0.5 
£ -1.0 

1-2.0 

D 
O 

± 2.0 
o 

1 w 

o 

" 1.0 
0.5 



















! 


r = i. 


iVTO 


)V 
































































V 


*=-i 


8V TO 


-9V 



































-25 25 50 75 100 125 
TEMPERATURE (°C) 



Equivalent input Noise Voltage 
vs Frequency 




10 100 1k 10k 100k 
FREQUENCY (Hz) 

119SGM 



Equivalent Input Noise Current 
vs Frequency 




100 1k 10k 
FREQUENCY (Hz) 



Supply Current vs Supply Voltage 







































-S 


"C 


















-25" 


C - 








































j 




<* 


— ' 


— 1 



















































2 4 6 
±SUPPLY VOLTAGE (V) 



Shutdown Supply Current 
vs Temperature 




-25 25 50 75 100 125 
TEMPERATURE CC) 



Output Voltage Swing vs 
Load Resistance 




10 100 1k 

LOAD RESISTANCE (Si) 



Open-Loop Gain vs Temperature 



I I I 

V S = i5V 




















'o 


« ±C 


V 








R 




k 
































































































































































































Rl 


= 1 


or 









































-50 -25 25 50 75 100 125 
TEMPERATURE ('C) 

119SG09 



2-120 



rrmrn 



LT1195 



TVPicnt P€RFORmnnc€ chrrrctcristics 



Gain and Phase vs Frequency 



Open-Loop Voltage Gain vs 
Load Resistance 




1M 10M 
FREQUENCY (Hz) 



Gain Bandwidth Product vs 
Supply Voltage 



A, 


= 2 


MB 










T A = -55"C 

r — I I 

Ta = 25"C 






























Ji- 


125 


■■ 

: C 







































































































LOAD RESISTANCE (Si) 



2 4 6 
tSUPPLY VOLTAGE (V) 



Unity-Gain Frequency and Phase 
Margin vs Temperature 



100 
_90 
| 80 

O 

I 70 

a 

cc 

| 60 

CD 

£ 50 
S 40 
30 







I I I 










-V 


I I 
3 = l5V- 
= 1k _ 






UNITY-GAIN 










R 








:UL 










































L 




















u 

HA 


||ITY-GAII\ 




















SE 




RG 





































































































































































































































-50 -25 25 50 75 
TEMPERATURE (°C) 



Output Impedance vs Frequency 



Common-Mode Rejection Ratio 
vs Frequency 




100k 1M 10M 
FREQUENCY (Hz) 



100M 



100k 



1M 10M 
FREQUENCY (Hz) 



Power Supply Rejection Ratio 
vs Frequency 




Output Short-Circuit Current 
vs Temperature 























V 


s = 


±5 

















































































































































10k 100k 1M 10M 
FREQUENCY (Hz) 



-50 -25 25 50 75 
TEMPERATURE (°C) 



-Output Swing vs Supply Voltage 




2-121 



LT1195 



tvpicrl p€RFORmnnce 

Slew Rale vs Temperature 



1 1 

V S = ±5 

Rfb-1 

-v = ±: 

A v = -1 


V 






















k 

V- 


















































































3LE 


w 


Ml 


E 












































































+ 


;le 


It 


Wl 


F 





































































-50 -25 25 50 75 100 125 
TEMPERATURE (X) 

1195 G19 



Output Voltage Step vs 
Settling Time, A v = -1 



Output Voltage Step vs 
I Time, Av = 1 



5 o 













i i 

V s = ±5V 














IA= < 
R L = 1 


k 






OmV 
































































10mV 






\l 


-nV 





















100 200 300 
SETTLING TIME (ns) 



400 



1 — T 

V s = t5V 
T A = 25°C- 
R L = 1k 







100 200 300 
SETTLING TIME (ns) 



Large-Signal Transient Response 



Large-Signal Transient Response 





A V =1,R L = 1k 




INPUT OFFSET VOLTAGE CAN BE ADJUSTED OVER A 
±150mV RANGE WITH A 1k to 10k POTENTIOMETER. 



Av = 1.V IN = 11Vp. P 



2-122 



LT1195 



RppiicnTions inFOftmnnon 

Power Supply Bypassing 

The LT1195 is quite tolerant of power supply bypassing. 
In some applications a O.ljaF ceramic disc capacitor 
placed 0.5 inches from the ampifier is all that is required. 
In applications requiring good settling time, it is important 
to use multiple bypass capacitors. A 0.1 nF ceramic disc in 
parallel with a 4.7pf tantalum is recommended. 

Cable Terminations 

The LT1 1 95 operational amplifier has been optimized as a 
low cost video cable driver. The +20mA guaranteed output 
current enables the LT1195 to easily deliver 6Vp.p into 
150S2, while operating on ±5V supplies. 

Double-Terminated Cable Driver 



5V 




H9SW1 



Cable Driver Voltage Gain vs Frequency 























In 




















I 




















t 
f 


V 
FE 
G 


= 2 
= 1k 


















F 


= 3C 
















» 


=1^ 






















Re 


= 1k 
























































± 


5V 
















h 




! : 


I 












III! \ 



100k 1M 10M 100M 

FREQUENCY (H2) 

When driving a cable it is important to terminate the cable 
to avoid unwanted reflections. This can be done in one of 
two ways: single termination or double termination. With 
single termination, the cable must be terminated at the 



receiving end (75Q to ground) to absorb unwanted en- 
ergy. The best performance can be obtained by double 
termination (75Q in series with the output of the amplifier, 
and 75Q to ground at the other end of the cable). This 
termination is preferred because reflected energy is ab- 
sorbed at each end of the cable. When using the double 
termination technique it is importantto note thatthe signal 
is attenuated by a factor of 2, or 6dB. this can be compen- 
sated for by taking a gain of 2, or 6dB in the amplifier. 

Using the Shutdown Feature 

The LT1 1 95 has a unique feature that allows the amplifier 
to be shut down for conserving power, or for multiplexing 
several amplifiers onto a common cable. The amplifier will 
shutdown by taking pin 5 to V - . In shutdown, the amplifier 
dissipates 1 5mW while maintaining atrue high impedance 
output state of 1 5k in parallel with the feedback resistors. 
The amplifiers must be used in a noninverting configura- 
tion for MUX applications. In inverting configurations the 
input signal is fed to the output through the feedback 
components. The following scope photos show that with 
very high Rl, the output is truly high impedance; the 
output slowly decays toward ground. Additionally, when 
the output is loaded with as little as 1 k the amplifier shuts 
off in 700ns. This shutoff can be under the control of HC 
CMOS operating between 0V and -5V. 



Output Shutdown 




1MHz SINE WAVE GATED OFF WITH SHUTDOWN PIN 



Ay = 1 , Rl - SCOPE PROBE 



XTUDBS 



2-123 



LT1195 



flppucfflions inFORmnnon 

Output Shutdown 




Single 5V Video Amplifier 



1 MHz SINE WAVE GATED OFF WITH SHUTDOWN PIN 
A v = 1, R L = 1k 



Detecting Pulses 

The front page shows a circuit for detecting very fast 
pulses. In this open-loop design, the detector diode is D1 
and a level shifting or compensating diode is D2. A load 
resistor R|_ is connected to -5V, and an identical bias 
resistor Rb is used to bias the compensating diode. Equal 
value resistors ensure that the diode drops are equal. A 
very fast pulse will exceed the amplifier slew rate and 
cause a long overload recovery time. Some amount of 
dV/dt limiting on the input can help this overload condi- 
tion, however too much will delay the response. Also 
shown is the response to a 4Vp.p input that is 1 50ns wide. 
The maximum output slew rate in the photo is 30V/us. This 
rate is set by the 30mA current limit driving 1000pF. 

Operation on Single 5V Supply 

The LT1195 has been optimized for a single 5V supply. 
This circuit amplifies standard composite video (1Vp.p 
including sync) by 2 and drives a double-terminated 75£2 
cable. Resistors R1 and R2 bias the amplifier at 2V, 
allowing the sync pulses to stay within the common-mode 
range of the amplifier. Large coupling capacitors are 
required to pass the low frequency sidebands of the 
composite signal. A multiburst response and vector plot 
standard color burst are shown. 




Video Multiburst at Pin 6 of Amplifier 




..U., ■ IWSi 



Vector Plot of Standard Color Burst 




2-124 



nppucOTions inFonmnnon 

Send Color Video Over Twisted-Pair 

With an LT1195 it is possible to send and receive color 
composite video signals more than 1 000 feet on a low cost 
twisted-pair. A bidirectional "video bus" consists of the 
LT1 1 95 op amp and the LT1 1 87 video difference amplifier. 
A pair of LT1 1 95s at TRANSMIT 1, is used to generate 
differential signals to drive the line which is back-termi- 
nated in its characteristic impedance. The LT1187, 
twisted-pair receiver, converts signals from differentials 
to single-ended. Topology of the LT1187 provides for 
cable compensation at the amplifier's feedback node as 
shown. In this case, 1000 feet of twisted-pair is compen- 
sated with 1 0OOpF and 50Q to boost the 3dB bandwidth of 
the system from 750kHz to 4MHz. This bandwidth is 
adequate to pass a 3.58MHz chrome subcarrier, and the 
4.5MHz sound subcarrier. Attenuation in the cable can be 
compensated by lowering the gain set resistor R G . At 
TRANSMIT 2, another pair of LT1 1 95s serve the dual 
function to provide cable termination via low output im- 
pedance, and generate differential signals for TRANSMIT 
2. Cable termination is made up of 1 5fl and 33£2 attentuator 
to reduce the differential input signal to the LT1187. 
Maximum input signal for the LT1 1 87 is 760mV P . P . 



1.5MHz Square Wave Input and Unequalized 
Response Through 1000 Feet of Twisted-Pair 




LT1195 



1 .5MHz Square Wave Input and Equalized 
Response Through 1000 Feet of Twisted-Pair 




Multiburst Pattern Passed Through 
1000 Feet of Twisted-Pair 




1195 AllO 



Vector Plot of Standard Color Burst Through 
1000 Feet of Twisted-Pair 




2-125 



LT1195 




2-126 



mm 



TECHNOLOGY 



LT1201/LT1202 



Dual and Quad 
1mA, 12MHz, 50V/jas 
Op Amps 



F€flTUR€S 

■ 1 mA Supply Current per Amplifier 

■ 50V/u.s Slew Rate 

■ 12MHz Gain-Bandwidth 

■ Unity-Gain Stable 

■ 330ns Settling Time to 0.1%, 10V Step 

■ 6V/mV DC Gain, R L = 2kQ 

■ 2mV Maximum Input Offset Voltage 

■ 1 0OnA Maximum Input Offset Current 

■ 1uA Maximum Input Bias Current 

■ ±12V Minimum Output Swing into 2kS2 

■ Wide Supply Range: ±2.5V to +15V 

■ Drives Capacitive Loads 



ppucOTions 

■ Wideband Amplifiers 

■ Buffers 

■ Active Filters 

■ Video and RF Amplification 
Cable Drivers 
Data Acquisition Systems 



DCSCRIPTIOO 

The LT1201/LT1202 are dual and quad low power, high 
speed operational amplifiers with excellent DC perfor- 
mance. The LT1201/LT1202 feature much lower supply 
current than devices with comparable bandwidth and slew 
rate. Each amplifier is a single gain stage with outstanding 
settling characteristics. The fast settling time makes the 
circuit an ideal choice for data acquisition systems. Each 
output is capable of driving a 2k£2 load to +1 2V with ±1 5V 
supplies and a 500n load to +3V on ±5V supplies. The 
amplifiers are also capable of driving large capacitive 
loads which make them useful in buffer or cable driver 
applications. 

The LT1 201 /LT1 202 are members of a family of fast, high 
performance amplifiers that employ Linear Technology 



Corporation's advanced bipolar complementary 
processing. 



Twicni nppucOTion 



100kHz, 4th Order Bulterworth Filter 



Inverter Pulse Response 




VOUT 




XTTfflHS 



2-127 



LT1201/LT1202 



MsoiuTC mnximum rrtirgs 

Total Supply Voltage (V + to V") 36V 

Differential Input Voltage ±6V 

Input Voltage +Vs 

Output Short-Circuit Duration (Note 1) Indefinite 

Operating Temperature Range 

LT1201C/LT1202C -40°Cto85°C 



Specified Temperature Range (Note 5) 

LT1201C/LT1202C 0°Cto70°C 

Maximum Junction Temperature 

Plastic Package 150°C 

Storage Temperature Range - 65°C to 150°C 

Lead Temperature (Soldering, 10 sec) 300°C 



PRCKRG€/ORD€R infORmflnon 




N8 PACKAGE 
8-LEAD PLASTIC DIP 

T JMA x = 150'C,ej A =100"C/W 



ORDER PART 
NUMBER 



LT1201CN8 




S8 PACKAGE 
8-LEAD PLASTIC SOIC 

TjMAX-150°C,ej A = 150°C/W 



ORDER PART 
NUMBER 



LT1201CS8 



S8 PART MARKING 



1201 




ORDER PART 
NUMBER 



LT1202CN 



OUT A [T 
-IN A [Y 
+INA[T 
V* [T 
♦ IN B |T 

-in b [y 

OUT B [Y 
NC [¥ 



f]\4 



i|] OUTD 
if] -IN D 
14] tIN D 

n\ v- 

IC 

11] -INC 
10] OUTC 
1TJ NC 



ORDER PART 
NUMBER 



TjMAX=150°C.e JA = 70°C/W 



S PACKAGE 
16-LEAD PLASTIC SOIC 
TjMAX = 150°C.ej A =100°C/W 



LT1202CS 



Consult factory for Industrial and Military grade parts. 



€L€CTRICRL CHRRRCT€RISTICS V s = +15V, T A = Z5°C, V CM = OV, unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS 


MIN TYP MAX 


UNITS 


Vos 


Input Offset Voltage 


V s = ±15V(Note2) 
0°C to 70°C 


0.7 2.0 
3.0 


mV 
mV 


V s = ±5V (Note 2) 
0°Cto70°C 


1.0 4.0 
4.5 


mV 
mV 




Input Vos Drift 




11 


u«°C 


I OS 


Input Offset Current 


V s = ±5VandV s = ±15V 
0°C to 70°C 


50 100 
150 


nA 
nA 


Ib 


Input Bias Current 


V s = ±5VandV s = ±15V 
0°C to 70°C 


0.5 1.0 
1.2 


uA 
pA 


e n 


Input Noise Voltage 


f = 10kHz 


30 


nVA Hi 


In 


Input Noise Current 


1 = 10kHz 


0.6 


pAAflz 



2-128 



LT1201/LT1202 



€l€CTRICfll CHflRRCT€RISTKS V s = ±15V, T fl = 25°C, V CM = OV, unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS 


MIN TYP MAX 


UNITS 


R IN 


Input Resistance 


V CM = ±12V 
Diffprpntial 


48 90 
500 


Mi2 

kn 


C|N 




Input Capacitance 




2 


PF 


CMRR 


Common-Mode Rejection Ratio 


W iHC\/ W MOW. \) _|_CW \l J.O C\/ 

Vs = ±1 5V, Vcm = tV, Vs = ±o V, Vcm = ±^.3V 
0°Cto 70*C 


1UU 

90 


dB 


PSRR 


Power Supply Rejection Ratio 


Vs = ±5V to ±1 5V 
0°C to 70°C 


on on 

80 


HO 
UD 

dB 




Input Voltage Range* 


Vs = ±1 5V 
V S = ±5V 


12.0 14 
2.5 4 


V 

V 




Input Voltage Range" 


Vs = ±15V 
V S = ±5V 


-13 -12.0 
-3 -2.5 


V 
V 


Avol 


Large-Signal Voltage Gain 


V s = ±1 5V, Vout = ±1 OV, R L = 5k 
0°C to 70°C 


4.0 8 
3.5 


V/mV 
V/mV 


V s = ±1 5V, Vout = ±10V, Rl = 2k 
0°C to 70°C 


3.0 6 
2.5 


V/mV 
V/mV 


V s = ±5V, Vqut = ±2.5V, R L = 2k 
0°C to 70°C 


2.5 5 
2.0 


V/mV 
V/mV 


V s = ±5V, V 0U T = ±2.5V, R L = 1 k 
0°C to 70°C 


2.0 4 
1.6 


V/mV 
V/mV 


VoUT 


Output Swing 


V s = ±15V, Rl = 2k, 0°C to 70°C 
V S = ±5V, R L = 500n,0°C to 70°C 


12.0 13.8 
3.0 4.0 


±V 

±v 


'OUT 


Output Current 


Vs = ±1 5V, Vout = ±1 2V, 0°C to 70°C 
V s = ±5V, V 0UT = +3V, 0°C to 70°C 


6 12 
6 12 


mA 
mA 


SR 


Slew Rate 


Vs = ±15V, AycL = ~2 (Note 3) 
0°C to 70°C 


30 50 
27 


V/jis 
V/ M s 


Vs = ±5V, Avcl = -2 (Note 3) 
0°C to 70°C 


20 33 
18 


V/jis 
V/ns 




Full Power Bandwidth 


Vs = ±15V, 10V Peak (Note 4) 

vs — I3V, OV rBdK ^MUlC Hj 


0. 8 

i 7 

1. / 


MHz 
MHz 


UDVV 




Gain-Bandwidth 


vs — ± I OV, I - u. I IVInz 
V s = ±5V,f = 0.1MHz 


1 9 

9 


ivinz 
MHz 


tr tf 


Rise Time Fall Time 


Vs = ±15V, AyCL = 1. 10% to 90%, 0.1V 
Vs = ±5V,A VC L = 1.10%to90%,0.1V 


18 
23 


ns 
ns 




Overshoot 


V S = ±15V,A VCL = 1,0.1V 
V s = + 5V,Avcl = 1,0.1V 


25 
20 


% 
% 




Propagation Delay 


V S = ±15V, 50% V| N to 50%V 0UT 
V S = ±5V, 50% Vim to 50%V OU T 


18 

23 


ns 
ns 


ts 


Settling Time 


V S = +15V, 10V Step, 0.1%, A VCL = 1 
V s = ±5V, 5V Step, 0.1%, Avcl = 1 


330 
300 


ns 
ns 


Ro 


Output Resistance 


A VC L = 1. f = 0.1MHz 


1.1 


£2 




Crosstalk 


V O ut = ±10V, Rl = 2k 


-110 -100 


dB 


Is 


Supply Current 


Each Amplifier, V s = ±5V and V s = ±15V 
0°C to 70°C 


1 1.4 
1.6 


mA 
mA 



Note 1: A heat sink may be required to keep the junction temperature 
below absolute maximum when the output is shorted indefinitely. 
Note 2: Input offset voltage is pulse tested with automated test equipment 
and is exclusive of warm-up drift. 

Note 3: Slew rate is measured in a gain of -2. For ±15V supplies measure 
between ±1 0V on the output with ±6V on the input. For ±5V supplies 
measure between ±2V on the output with ±1 .75V on the input. 



Note 4: Full power bandwidth is calculated from the slew rate 
measurement: FPBW = SR/2jcV P . 

Note 5: Commercial grade parts are designed to operate over the 
temperature range of -40°C to 85°C but are neither tested nor guaranteed 
beyond 0°C to 70°C. Industrial grade parts specified and tested over 
-40°C to 85°C are available on special request. Consult factory. 



2-129 



LT1201/LT1202 



TVPicni PCRFORmnncc chrrrctcristics 

Supply Current vs Supply Voltage 



Input Common-Mode Range vs 
Supply Voltage 



Output Voltage Swing vs 
Supply Voltage 



T A = 25 
4V 0S < 


C 

1mV 
















+V CM A 















5 10 15 

SUPPLY VOLTAGE (±V) 



LT120U92G01 



Output Voltage Swing vs 
Resistive Load 




1k 10k 
LOAD RESISTANCE (Si) 



LTI201.TOGO4 



Input Bias Current vs Temperature 



560 
540 

i 

r 520 
> 500 
■ 480 
460 
440 











1 1 

V S = ±15V 

ln + + ln~ 












2 











































































-50 -25 25 50 75 100 125 
TEMPERATURE (°C) 



EACH AM 


'LIFIER 










125°C 
















25"C 
















— -55°C- 





















5 10 15 

SUPPLY VOLTAGE (tV) 



Input Bias Current vs Input 
Common-Mode Voltage 



T s = 25°C 
V S = ±15V 



-15 -10 -5 5 10 15 
INPUT COMMON-MODE VOLTAGE (V) 



Output Short-Circuit Current 
vs Temperature 



35 

3 

E 

r 30 

5 25 

I 20 

I 15 
£ 

| 10 





= i5V 






























SO 


JRCE 






















"sink 










f 



























25 50 75 100 125 
TEMPERATURE (°C) 



a 15 
se 

«t 10 



T fl =25 
R L = 2k 
4V 0S = 


C 

30mV 































5 10 15 

SUPPLY VOLTAGE (±V) 



20 

lTt201<O2GO3 



Open-Loop Gain vs 
Resistive Load 




Input Noise Spectral Density 




100k 



100 1k 10k 
FREQUENCY (Hz) 



2-130 



LT1201/LT1202 



TYPicm p€RFORmnnce cHnnncTCRisncs 



Crosstalk vs 




Power Supply Rejection Ratio 
vs Frequency 













5°C 
t15V 








*PSRR 








-PS 


RR\ 

































100k 1M 
FREQUENCY (Hz) 



1k 10k 100k 1M 
FREQUENCY (Hz) 



Common-Mode Rejection Ratio 
vs Frequency 



120 
" 100 











T A = 25°C 
V S = ±15V 































































10k 100k 1M 10M 100M 
FREQUENCY (Hz) 



Voltage Gain and Phase vs 
Frequency 

80 i 1 — i 1 1 1 100 



Output Swing vs Settling Time 



Frequency Response vs 
Capacitive Load 




100 1k 10k 100k 1M 10M 100M 
FREQUENCY (Hz) 



100 200 300 400 500 
SETTLING TIME (ns) 



1M 10M 

FREQUENCY (Hz) 



IXtWUB 815 



Closed-Loop Output Impedance 
vs Frequency 



1000 



a 100 



v s =±m 

Ay = +1 


c 

V 































100k 1M 10M 
FREQUENCY (Hz) 



100M 

LT1331/02 GIB 



Gain-Bandwidth vs Temperature 



11.3 
11.2 
1-11.1 

X 

a 

511.0 
a 

< 

1 10.9 
<: 

CD 

10.8 
10.7 





±15V 



















































































-50 -25 25 50 75 100 125 
TEMPERATURE CO 



Slew Rate vs Temperature 



V S = ±15V 
*u = -1 






























-SR 
















<SR 



































25 50 75 100 125 
TEMPERATURE CO 

mnnM 



2-131 



LT1201/LT1202 




nppucOTions inFORmnnon 

Layout and Passive Components 

As with any high speed operational amplifier, care must be 
taken in board layout in order to obtain maximum perfor- 
mance. Key layout issues include: use of a ground plane, 
minimization of stray capacitance at the input pins, short 
lead lengths, RF-quality bypass capacitors located close 
to the device (typically 0.01 uf to 0.1 u.F) and low ESR 
bypass capacitors for high drive current applications 
(typically 1jjF to 1 0]uF tantalum). Sockets should be 
avoided when maximum frequency performance is re- 
quired, although low profile sockets can provide reason- 
able performance up to 50MHz. For more details see 
Design Note 50. The parallel combination of the feedback 
resistor and gain setting resistor on the inverting input 
combine with the input capacitance to form a pole which 
can cause peaking. If feedback resistors greater than 5k 
are used, a parallel capacitor of value: 

C F >R G xC| N /R F 

should be used to cancel the input pole and optimize 
dynamic performance. For unity-gain applications where 
a large feedback resistor is used, C F should be greater than 
or equal to Cin. 



Capacitive Loading 

The LT1201/LT1202 amplifiers are stable with all capaci- 
tive loads. This is accomplished by sensing the load 
induced output pole and adding compensation at the 
amplifier gain node. As the capacitive load increases, both 
the bandwidth and phase margin decrease so there will be 
peaking in the frequency domain and in the transient 
response. The photo of the small-signal response with 
1000pF load shows 40% peaking. The large-signal re- 
sponse with a 10,000pF load shows the output slew rate 
being limited by the short-circuit current. To reduce peak- 
ing with capacitive loads, insert a small decoupling resis- 
tor between the output and the load, and add a capacitor 
between the output and inverting input to provide an AC 
feedback path. Coaxial cable can be driven directly, but for 
best pulse fidelity the cable should be doubly terminated 
with a resistor in series with the output. When driving a 
1 50f2 load the minimum output current of 6mA limits the 
swing to ±0.9V. 



2-132 



X7TJDH8 



LT1201/LT1202 



nppucOTions inFORmnnon 



Small-Signal Capacltlve Loading 




Ay=-1 

Cl = 1000pF 1MMBAB1 



Large-Signal Capacitive Loading 




A v = 1 

C L = 10,000pF .JOKU/KO 

Input Considerations 

Resistors in series with the inputs are recommended for 
the LT1201/LT1202 in applications where the differential 
input voltage exceeds +6V continuously or on a transient 
basis. An example would be in noninverting configura- 
tions with high input slew rates or when driving heavy 
capacitive loads. The use of balanced source resistance at 
each input is recommended for applications where DC 
accuracy must be maximized. 

Transient Response 

The LT1 201/LT1 202 gain-bandwidth is 1 2MHz when mea- 
sured at 1 00kHz. The actual frequency response in unity- 
gain is considerably higher than 12MHz due to peaking 



caused by a second pole beyond the unity-gain crossover. 
This is reflected in the 50° phase margin and shows up as 
overshoot in the unity-gain small-signal transient re- 
sponse. Higher noise gain configurations exhibit less 
overshoot as seen in the inverting gain of one response. 

The large-signal response in both inverting and non- 
inverting gain shows symmetrical slewing characteris- 
tics. Normally the noninverting response has a much 
faster rising edge due to the rapid change in input com- 
mon-mode voltage which affects the tail current of the 
input differential pair. Slew enhancement circuitry has 
been added to the LT1 201 /LT1 202 so that the falling edge 
slew rate is balanced. 



Small-Signal Transient Response 




Ay = 1 I2OK07 Airo 



Small-Signal Transient Response 




Ay - -1 mimuM 



X7TJBHB 



2-133 



LT1201/LT1202 



nppucflTions inFORmnnon 



Large-Signal Transient Response 




Large-Signal Transient Response 




Low Voltage Operation 

The LT1 201/LT1202 are functional at room temperature 
with only 3V of total supply voltage. Under this condition, 
however, the undistorted output swing is only 0.8Vp.p . A 
more realistic condition is operation at +2.5V supplies (or 
5V and ground). Undertheseconditionsat room tempera- 
ture the typical input common-mode range is 2.2V to 
-1 .5V, and a 1 MHz, 2.5Vp.p sine wave can be accurately 
reproduced. With 5V total supply voltage the gain-band- 
width is reduced to 7MHz and the slew rate is reduced to 
20V/ns. 



DAC Current-to-Voltage Converter 

The wide bandwidth, high slew rate and fast settling time 
of the LT1201/LT1202 make them well suited for current- 
to-voltage conversion aftercurrentoutput D/A converters. 
A typical application with a DAC-08 type converter (full- 
scale output of 2mA) uses a 5k feedback resistor. A 1 2pF 
compensation capacitor across the feedback resistor is 
used to null the pole at the inverting input caused by the 
DAC output capacitance. The combination of the LT1 201 / 
LT1202 and DAC settles to less than 40mV (1LSB) in 
500ns for a OV to 1 0V step or for a 10V to OV step. 

Active Filters 

The LT1 201/LT1 202 are well suited to active filter applica- 
tions such as the circuit shown on the front page of the 
data sheet. This particular example is a 4-pole Butterworth 
lowpass filter with a cutoff frequency of 1 00kHz. In choos- 
ing an amplifier for filter applications a good rule of 
thumb is: 

f x Q < GBW/20 

For our example the first section has Q = 0.54 and the 
second section has Q = 1 .31 , so the amplifier easily meets 
the gain-bandwidth requirement of 2.6MHzforfrj= 100kHz. 
This multiple feedback configuration and the Sallen-Key 
configuration (as shown in the Typical Applications sec- 
tion) are the most commonly used topologies. The mul- 
tiple feedback configuration has an advantage over the 
noninverting Sallen-Key configuration in many cases be- 
cause the amplifier does not see a frequency varying 
common-mode voltage and high frequency output imped- 
ance is not critical. The result is better frequency perfor- 
mance beyond fo (for our particular example the stopband 
performance is dramatically better above 1 MHz). Advan- 
tages of the Sallen-Key topology over the multiple feed- 
back topology include: better gain accuracy, better DC 
accuracy, and unity-gain filters can be implemented more 
easily. 



2-134 



LT1201/LT1202 



TVPicfit nppucnTions 



DAC Current-to-Voltage Converter 

12pF 



Instrumentation Amplifier 




1 LSB SETTLING = 500ns 




. R4 f. 1 |R2 R3\ R2 + R3 
H V = R3 [' 2 Ul Ml R5 

TRIM R5 FOR GAIN 

TRIM R1 FOR COMMON-MODE REJECTION 
BW= 120kHz 



100kHz 4th Order Butterworth Filter 
(Sallen-Key) 




Full-Wave Rectifier 




2-135 



LT1201/LT1202 




2-136 



LKNl 

TECHNOLOGY 



LT1206 

250mA/60MHz Current 
Feedback Amplifier 



F€RTUR€S 

■ 250mA Minimum Output Drive Current 

■ 60MHz Bandwidth, A v = 2, R L = 100Q 

■ 900V/ns Slew Rate, A v = 2, R L = 50a 

■ 0.02% Differential Gain, A v = 2, R L = 30n 

■ 0.17° Differential Phase, A v = 2, R L = 30£i 

■ High Input Impedance, 10MQ 

■ Wide Supply Range, +5V to ±15V 

■ Shutdown Mode: Is < 200uA 

■ Adjustable Supply Current 

■ Stable with C L = 10,000pF 

nppucnnons 

■ Video Amplifiers 

■ Cable Drivers 

■ RGB Amplifiers 

■ Test Equipment Amplifiers 

■ Buffers 



DCSCRIPTIOn 

The LT1206 is a current feedback amplifier with high 
output current drive capability and excellent video char- 
acteristics. The LT1206 is stable with large capacitive 
loads, and can easily supply the large currents required 
by the capacitive loading. A shutdown feature switches 
the device into a high impedance, low current mode, 
reducing dissipation when the device is not in use. For 
lower bandwidth applications, the supply current can be 
reduced with a single external resistor. The low differen- 
tial gain and phase, wide bandwidth, and the 250mA 
minimum output current drive make the LT1206 well 
suited to drive multiple cables in video systems. 

The LT1206 is manufactured on Linear Technology's 
proprietary complementary bipolar process. 



TVPicni nppucnnons 

Noninverting Amplifier with Shutdown Large-Signal Response, C L = 10,000pF 




2-137 



LT1206 



ni)soiUT€ maximum RRTines 

Supply Voltage ±18V 

Input Current ±15mA 

Output Short-Circuit Duration (Note 1) Continuous 

Specified Temperature Range (Note 2) 0°C to 70°C 



Operating Temperature Range 

LT1206C -40°Cto 85°C 

Junction Temperature 150°C 

Storage Temperature Range -65°C to 150°C 

Lead Temperature (Soldering, 10 sec) 300°C 



PRCKRG€/ORD€R inFORmflTIOfi 




N8 PACKAGE 
8-LEAD PLASTIC DIP 
9j, = 100°C/W 



ORDER PART 
NUMBER 



LT1206CN8** 




T] v* 

T\ OUT 

T] <t 

51 COMP 



S8 PACKAGE 
8-LEAD PLASTIC SO 

e JA «60°C/W 



ORDER PART 
NUMBER 



LT1206CS8* 



PART MARKING 



1206 



FRONT VIEW 




3 OUT 

□ V" 

□ COMP 



ORDER PART 
NUMBER 



□ v* 

□ S/D- 

□ tIN 

□ -IN 



LT1206CR** 



o 

TAB IS 




OUT 

□ V" 
COMP 

□ V* 
S/D* 

□ +IN 



ORDER PART 
NUMBER 



LT1206CY** 



R PACKAGE 
7-LEAD PLASTIC DD 

6j 4 »30"CAV 



Y PACKAGE 
7-LEAD TO-220 

e JC = 5°C/W 



'Ground shutdown pin for normal operation "See Note 2 
Consult factory for Industrial and Military grade parts. 





€L€CTRICRL CHRRRCT6RISTICS V C m = 0, ±5V < V s < +15V, pulse tested, V S /d = 0V, unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS 


MIN TYP MAX 


UNITS 


Vos 


Input Offset Voltage 


T A = 25°C 


• 


±3 ±10 
±15 


mV 
mV 




Input Offset Voltage Drift 




• 


10 


nV/°c 


l«* 


Noninverting Input Current 


T A = 25°C 


• 


±2 ±5 
±20 


MA 
uA 


Iin" 


Inverting Input Current 


T A = 25°C 


• 


±10 ±60 
±100 


MA 
uA 


e n 


Input Noise Voltage Density 


f = 10kHz. R F = 1k. R G = 10n, R s = 0£2 




3.6 


nV/vHz 


+ in 


Input Noise Current Density 


f = 10kHz, R F = 1k, R G = 10Q, R s = 10k 




2 


pA/xHz 


"in 


Input Noise Current Density 


f = 10kHz, R F = 1k, R G = 10Q, R s = 10k 




30 


pA/VHz 


R|N 


Input Resistance 


V| N = ±12V, V S = ±15V 
V| N = +2V, V s = ±5V 


• 
• 


1.5 10 
0.5 5 


Mn 

MQ 


C|N 


Input Capacitance 


V S = ±15V 




2 


PF 




Input Voltage Range 


V S = ±15V 
V S = ±5V 


• 
• 


±12 ±13.5 
±2 ±3.5 


V 
V 



2-138 



LT1206 



€l€CTRICfll CHAR flCT€RISTICS V CM = O, ±5W < V s < ±15V, pulse tested, V S/D = OV, unless otherwise noted. 



CVMROI 
O T IVIDUL 


PARAMETER 
rHnnlVIC 1 cn 


CONDITIONS 


MIN TYP MAX 
win i i r ivinA 


UNITS 


CMRR 


Common-Mode Rejection Ratio 


V S = ±15V,V C M = ±12V 
V S = ±5V,V CM = ±2V 




55 62 
OU oU 


dB 

HQ 




Inverting Input Current 
Common-Mode Rejection 


V S = ±15V,V CM = ±12V 
Vq = +5V V™ = +2V 


• 


0.1 10 
0.1 10 


mA/v 

uA/V 


PSRR 


Power Supply Rejection Ratio 


Vs = ±5V to ±1 5V 




60 77 


dB 




Noninverting Input Current 
Power Supply Rejection 


V S = ±5V to±15V 


• 


30 500 


nA/V 




InuPrtinn Innnt Piirrpnt 
nivci liny input uui iciu 

Power Supply Rejection 


\/„ _ 4.c\l * n -4-1 
vc = ±DV TO ± IOV 


* 


0.7 5 


uA/V 


Av 


Large-Signal Voltage Gain 


V s = +15V,Vout = ±10V, R L = 50Q 
V S = ±5V,V 0U T = ±2V, R L = 25Ji 


• 


55 71 
55 68 


dB 
dB 


Rol 


Transresistance, AV 0UT /AI| N " 


V S = ±15V, V OU T = ±10V, R L = 50Q 
V s = ±5V, V 0UT = ±2V, R L = 25Q 


• 
* 


100 260 
75 200 


kft 
kn 


VouT 


Maximum Output Voltage Swing 


Vs = +15V, Rl = 50ft T A = 25°C 
V s = ±5V, Rl = 25ft T A = 25°C 


• 
* 


±11.5 ±12.5 
±10.0 

±2.5 ±3.0 
±2.0 


V 
V 
V 
V 


l0UT 


Maximum Output Current 


R L = m 




250 500 1200 


mA 


Is 


Supply Current 


V S = ±15V,V S /D = 0V,T A = 25°C 




20 30 
35 


mA 
mA 




Supply Current, R S /d = 51k (Note 3) 


V S = ±15V,T A = 25°C 




12 17 


mA 




Positive Supply Current, Shutdown 


Vg = ± IOV, vs/D = 13V 




200 


MA 




Dutnnt I pakanp Pnrrpnt ^hntrlnu/n 
UUipill Lcar\dyc UUIICIIL, OIIULUUWII 


V s = ±15V,V S /o = 15V 




m 

I u 


iiA 

. 


SR 


Slew Rate (Note 4) 


A V = 2,T A = 25°C 




400 900 


V/U5 




Differential Gain (Note 5) 


V s = +15V, R F = 560ft R G = 560ft R L = 30Q 




0.02 


% 




Differential Phase (Note 5) 


V s = ±15V, R F = 560ft R G = 560ft R L = 30£2 




0.17 


DEG 


BW 


Small-Signal Bandwidth 


V S = ±15V, Peaking <0.5dB 
R F = R G = 620ft R L = 100n 




60 


MHz 


V S = ±15V, Peaking <0.5dB 
R F = R G = 649Q, R L = 50Q 




52 


MHz 


V S = +15V, Peaking < 0.5dB 
R F = R G = 698ft R L = 30n 




43 


MHz 


V S = ±15V, Peaking <0.5dB 
R F = R G = 325ft R[_ = 1 0£1 




27 


MHz 



The • denotes specifications which apply for 0°C < T A < 70°C. 

Note 1: Applies to short circuits to ground only. A short circuit between 

the output and either supply may permanently damage the part when 

operated on supplies greater than ±10V. 

Note 2: Commercial grade parts are designed to operate over the 

temperature range of -40°C to 85°C but are neither tested nor guaranteed 



beyond 0°C to 70°C. Industrial grade parts tested over -40°C to 85°C are 
available on special request. Consult factory. 
Note 3: Rs/p is connected between the shutdown pin and ground. 
Note 4: Slew rate is measured at ±5V on a ±10V output signal while 
operating on ±1 5V supplies with R F = 1 .5k, R G = 1 .5k and R L = 400Q. 
Note 5: NTSC composite video with an output level of 2V. 



2-139 



LT1206 



smnu-siGnni bmidwidth 



l s = 20mA Typical , Peaking < 0.1 dB 











-3dB BW 


-0.1dB BW 


Av 


Rl 


Rf 


Rg 


(MHz) 


(MHz) 



V S = ±5V, R S o = 0n 



-1 


150 


562 


562 


48 


21.4 




30 


649 


649 


34 


17 




10 


732 


732 


22 


12.5 


1 


150 


619 




54 


22.3 




30 


715 




36 


17.5 




10 


806 




22.4 


11.5 


2 


150 


576 


576 


48 


20.7 




30 


649 


649 


35 


18.1 




10 


750 


750 


22.4 


11.7 


10 


150 


442 


48.7 


40 


19.2 




30 


511 


56.2 


31 


16.5 




10 


649 


71.5 


20 


10.2 


l s = 10mA Typical, Peaking < 0.1 dB 










-3dB BW 


-0.1dB BW 


A V 


Rl 


Rf 


Rg 


(MHz) 


(MHz) 


V S = ±5V, R SD = 1D.2k 


-1 


150 


576 


576 


35 


17 




30 


681 


681 


25 


12.5 




10 


750 


750 


16.4 


8.7 


1 


150 


665 




37 


17.5 




30 


768 




25 


12.6 




10 


845 




16.5 


8.2 


2 


150 


590 


590 


35 


16.8 




30 


681 


681 


25 


13.4 




10 


768 


768 


16.2 


8.1 


10 


150 


301 


33.2 


31 


15.6 




30 


392 


43.2 


23 


11.9 




10 


499 


54.9 


15 


7.8 


Is = 5mA Typical, Peaking < 0.1dB 










-3dB BW 


-0.1dB BW 


Av 


Rl 


Rf 


Rg 


(MHz) 


(MHz) 


V S = ±5V, R SD = 22.1k 


-1 


150 


604 


604 


21 


10.5 




30 


715 


715 


14.6 


7.4 




10 


681 


681 


10.5 


6.0 


1 


150 


768 




20 


9.6 




30 


866 




14.1 


6.7 




10 


825 




9.8 


5.1 


2 


150 


634 


634 


20 


9.6 




30 


750 


750 


14.1 


7.2 




10 


732 


732 


9.6 


5.1 


10 


150 


100 


11.1 


16.2 


5.8 




30 


100 


11.1 


13.4 


7.0 




10 


100 


11.1 


9.5 


4.7 











Av 


Rl 


Rf 


Rg 


-3dB BW 
(MHz) 


-0.1dB BW 
(MHz) 



V S = +15V, R SD = 0Q 



-1 


150 


681 


681 


50 


19.2 




30 


768 


768 


35 


17 




10 


887 


887 


24 


12.3 


1 


150 


768 




66 


22.4 




30 


909 




37 


17.5 




10 


1k 




23 


12 


2 


150 


665 


665 


55 


23 




30 


787 


787 


36 


18.5 




10 


931 


931 


22.5 


11.8 


10 


150 


487 


536 


44 


20.7 


30 


590 


64.9 


33 


17.5 




10 


768 


84.5 


20.7 


10.8 











-3dB BW 


-0.1dB BW 


Av 


Rl 


Rf 


Rg 


(MHz) 


(MHz) 



V s = ±15V, R SD = 60.4k 



-1 


150 


634 


634 


41 


19.1 




30 


768 


768 


26.5 


14 




10 


866 


866 


17 


9.4 


1 


150 


768 




44 


18.8 




30 


909 




28 


14.4 




10 


1k 




16.8 


8.3 


2 


150 


649 


649 


40 


18.5 




30 


787 


787 


27 


14.1 




10 


931 


931 


16.5 


8.1 


10 


150 


301 


33.2 


33 


15.6 




30 


402 


44.2 


25 


13.3 




10 


590 


64.9 


15.3 


7.4 











-3dB BW 


-0.1dB BW 


A v 


Ri 


Rf 


Rg 


(MHz) 


(MHz) 


V S = +15V, R SD = 121k 


-1 


150 


619 


619 


25 


12.5 




30 


787 


787 


15.8 


8.5 




10 


825 


825 


10.5 


5.4 


1 


150 


845 




23 


10.6 




30 


1k 




15.3 


7.6 




10 


1k 




10 


5.2 


2 


150 


681 


681 


23 


10.2 




30 


845 


845 


15 


7.7 




10 


866 


866 


10 


5.4 


10 


150 


100 


11.1 


15.9 


4.5 




30 


100 


11.1 


13.6 


6 




10 


100 


11.1 


9.6 


4.5 



2-140 



LT1206 



tvpichl P€RFORmnnc€ charactcristics 



Bandwidth vs Supply Voltage 



100 

90 



I I I 

PEAKING <0.SdB 

PEAKING <5dFJ 




A v = 
Rl = 


oon" 




I 

= 47no 












R F = 


560Q 
















h" 


= eaon 




























750Q- 

I — 












-R F = 












R F =1k 














I — 
























H F =1.5k 

I 



4 6 8 10 12 14 16 
SUPPLY VOLTAGE (tV) 



Bandwidth vs Supply Voltage 




10 12 14 
SUPPLY VOLTAGE (±V) 



Bandwidth and Feedback Resistance 
vs Capacitive Load for 0.5dB Peak 



DAMrnAyinTU" 


















































































































































































































"1-btUtiALK KtSlblL 


R — 












I I 

-A V = 
Ri = 


I Mill! I 
2 






























V S = ±15V 

c CO mp = 0-01mF 















10 100 1000 

CAPACITIVE LOAD (pF) 



LT1M6.TPCOZ 



Bandwidth vs Supply Voltage 



Bandwidth vs Supply Voltage 



Bandwidth and Feedback Resistance 
vs Capacitive Load for 5dB Peak 

10k | | | mi l | | | | inn 100 




4 6 8 10 12 14 16 
SUPPLY VOLTAGE (±V) 



4 6 8 10 12 14 16 18 
SUPPLY VOLTAGE (±V) 

LT1206 - TPCOS 



10 100 1k 

CAPACITIVE LOAD (pF) 



LT1Z06-TPC06 



Differential Phase 
vs Supply Voltage 



0.50 

r 0.40 
i 

; 0.30 

































R[_ = 15£3 










































R F = R G = 560n 
"A v = 2 
N PACKAGE 




















R 


= a 


a- 
















1 














R L = 50£i 
















- N 


— i — 

= 150£1 

I 

















5 7 9 11 13 15 

SUPPLY VOLTAGE (±V) 

LT1Z06-TPC07 



Differential Gain 
vs Supply Voltage 



Spot Noise Voltage and Current 
vs Frequency 




7 9 11 13 

SUPPLY VOLTAGE (+V) 

LT1Z06-TPCM 



100 1k 10k 
FREQUENCY (Hz) 



100k 



LT1206 • TPC09 



2-141 



LT1206 



TVPicm p€RFORmnnc€ chrrrct€ristics 



Supply Current vs Supply Voltage 



24 

22 

1 20 
>— 

| 18 
cc 

I 16 

= 14 

CO 

12 
10 



V S /D 


= ov 




Tj = -40X 


























Tj = 


>5'C 












r Tj = 














!5'C 












Tj = 


25T 





















4 6 8 10 12 14 
SUPPLY VOLTAGE (±V) 



Supply Current 

vs Shutdown Pin Current 





20 




18 




16 


< 
B 


14 








12 


cc 




cc 

=3 


10 


o 




>- 


8 






Cc 
Cc 


6 


ZD 
CO 






4 




2 








V s = i16V 





































































































































































































Output Saturation Voltage 
vs Junction Temperature 





±15V 






I 

Rl = 2k 






















Rl = 


50Q 








































R L = 


son 




































R L = 


2k 















-50 -25 



25 50 75 
TEMPERATURE (°C) 



Supply Current vs 

Ambient Temperature, V s = +5V 




-50 -25 25 50 75 100 125 
TEMPERATURE (°C) 



Input Common-Mode Limit 
vs Junction Temperature 



100 200 300 400 500 
SHUTDOWN PIN CURRENT (pA) 

LT1206-TPC11 



25 50 75 100 125 
TEMPERATURE CO 



Power Supply Rejection Ratio 
vs Frequency 



Supply Current vs 

Ambient Temperature, V s = +15V 







Rso = 


on 


I I 
A V = 1 
R L = ~ 
N PAHKARF 




















Rsd = 


60.4k 














121k 























-50 -25 25 50 75 100 125 
TEMPERATURE CO 

Output Short-Circuit Current 
vs Junction Temperature 




































ySOU 


RCING 
























; 


INKIN 


N 





































-50 -25 25 50 75 100 125 
TEMPERATURE CO 

LT1206-TPCI5 

Supply Current vs Large Signal 
Output Frequency (No Load) 



100 125 




100k 1M 10M 
FREQUENCY (Hz) 



I II.'"*' ■ TPC16 



100k 1M 
FREQUENCY (Hz) 



LT12WTPC1S 



2-142 



LT1206 



TVPicflL pcftFORmnncc cHnRnacRisncs 



Output Impedance vs Frequency 



Output Impedance in Shutdown 
vs Frequency 



2nd and 3rd Harmonic Distortion 
vs Frequency 




1M 10M 
FREQUENCY (Hz) 



1M 10M 
FREQUENCY (Hz) 



2 3 4 5 6 7 8 910 
FREQUENCY (MHz) 

LT1206 "TPC21 



3rd Order Intercept vs Frequency 



Test Circuit lor 3rd Order Intercept 



£ 30 
o 

DC 
O 

•» 20 
10 











V S = ±15V 
Rl = 50S2 
Re = 590f! 










Rg = 


S4.9£i 







































5 10 15 20 25 30 
FREQUENCY (MHz) 

U1206 - TPC22 




LT1206.TPC23 - 



2-143 



LT1206 



simi>UFi€D scHemnnc 




nppLicnnons inFonmnTion 

The LT1206 is a current feedback amplifier with high 
output current drive capability. The device is stable with 
large capacitive loads and can easily supply the high 
currents required by capacitive loads. The amplifier will 
drive low impedance loads such as cables with excellent 
linearity at high frequencies. 

Feedback Resistor Selection 

The optimum value for the feedback resistors is afunction 
of the operating conditions of the device, the load imped- 
ance and the desired flatness of response. The Typical AC 
Performance tables give the values which result in the 
highest 0.1 dB and 0.5dB bandwidths for various resistive 
loads and operating conditions. If this level of flatness is 
not required, a higher bandwidth can be obtained by use 
of a lower feedback resistor. The characteristic curves of 
Bandwidth vs Supply Voltage indicate feedback resistors 
for peaking up to 5dB. These curves use a solid line when 
the response has less than 0.5dB of peaking and a dashed 



line when the response has 0.5dB to 5dB of peaking. The 
curves stop where the response has more than 5dB of 
peaking. 

For resistive loads, the COMP pin should be left open (see 
section on capacitive loads). 

Capacitive Loads 

The LT1206 includes an optional compensation network 
for driving capacitive loads. This network eliminates most 
of the output stage peaking associated with capacitive 
loads, allowing the frequency response to be flattened. 
Figure 1 shows the effect of the network on a 200pF load. 
Without the optional compensation, there is a 5dB peak at 
40MHz caused by the effect of the capacitance on the 
output stage. Adding a 0.01 nF bypass capacitor between 
the output and the COMP pins connects the compensation 
and completely eliminates the peaking. A lower value 
feedback resistor can now be used, resulting in a response 



2-144 



LT1206 



nppucmions inFORmnnon 




1 10 100 

FREQUENCY (MHz) 

LTIZM-FOI 

Figure 1. 

which is flat to 0.35dB to 30MHz. The network has the 
greatest effect for C|_ in the range of OpF to 1000pF. The 
graph of Maximum Capacitive Load vs Feedback Resistor 
can be used to select the appropriate value of feedback 
resistor. The values shown are for 0.5dB and 5dB peaking 
at a gain of 2 with no resistive load. This is a worst case 
condition, as the amplifier is more stable at higher gains 
and with some resistive load in parallel with the capaci- 
tance. Also shown is the -3dB bandwidth with the sug- 
gested feedback resistor vs the load capacitance. 

Although the optional compensation works well with 
capacitive loads, it simply reduces the bandwidth when it 
is connected with resistive loads. For instance, with a 30£2 
load, the bandwidth drops from 55MHz to 35MHz when 
the compensation is connected. Hence, the compensation 
was made optional. To disconnect the optional compensa- 
tion, leave the COMP pin open. 

Shutdown/Current Set 

If the shutdown feature is not used, the SHUTDOWN pin 
must be connected to ground or V". 

The shutdown pin can be used to eitherturn off the biasing 
for the amplifier, reducing the quiescent current to less 
than 200uA or to control the quiescent current in normal 
operation. 

The total bias current in the LT1206 is controlled by the 
current flowing out of the shutdown pin. When the shut- 
down pin is open or driven to the positive supply, the part 
is shut down. In the shutdown mode, the output looks like 



a 40pF capacitor and the supply current is typically 1 0OuA. 
The shutdown pin is referenced to the positive supply 
through an internal bias circuit (see the simplified sche- 
matic). An easy way to force shutdown is to use open drain 
(collector) logic. The circuit shown in Figure 2 uses a 
74C904 buffer to interface between 5V logic and the 
LT1 206. The switching time between the active and shut- 
down states is less than 1us. A 24k pull-up resistor 
speeds up the turn-off time and insures that the LT1 206 
is completely turned off. Because the pin is referenced to 
the positive supply, the logic used should have a break- 
down voltage of greater than the positive supply voltage. 
No other circuitry is necessary as the internal circuit 
limits the shutdown pin current to about 500uA Figure 3 
shows the resulting waveforms. 



VIM" 





+ 






LT1206 •- 












-15V > 




15V > 




^24k i 



■VOUT 



-ft— 

l^J_74C906 



Figure 2. Shutdown Interface 




A v =1 R PU = 24k 
R F = 825Q V iN = 1Vp.p 
R L = 50!i 



Figure 3. Shutdown Operation 



2-145 



LT1206 



nppucOTions inFORmnnon 

For applications where the full bandwidth of the amplifier 
is not required, the quiescent current of the device may be 
reduced by connecting a resistor from the shutdown pin to 
ground. The quiescent current will be approximately 40 
times the current in the shutdown pin. The voltage across 
the resistor in this condition is V + - 3Vbe- For example, a 
60k resistor will set the quiescent supply current to 1 0mA 
with V S = ±15V. 

The photos (Figures 4a and 4b) showthe effect of reducing 
the quiescent supply current on the large-signal response. 
The quiescent current can be reduced to 5mA in the 
inverting configuration without much change in response. 
In noninverting mode, however, the slew rate is reduced 
as the quiescent current is reduced. 

















Y 


f 








1 




\ 






1 




\ 






J 




















50n 


1 ' 



R F = 750£2 l = 5mA, 1 0mA, 20mA 
R L = 50Q V S = ±15V 



Figure 4a. Large-Signal Response vs l Q , A v = -1 




R F = 750C2 l = 5mA. 10mA, 20mA mww, 
R L = 50!J V S =±15V 

Figure 4b. Large-Signal Response vs l , A v = 2 



Slew Rate 

Unlike a traditional op amp, the slew rate of a current 
feedback amplifier is not independent of the amplifier gain 
configuration. There are slew rate limitations in both the 
input stage and the output stage. In the inverting mode, 
and for higher gains in the noninverting mode, the signal 
amplitude on the input pins is small and the overall slew 
rate is that of the output stage. The input stage slew rate 
is related to the quiescent current and will be reduced as 
the supply current is reduced. The output slew rate is set 
by the value of the feedback resistors and the internal 
capacitance. Larger feedback resistors will reduce the 
slew rate as will lower supply voltages, similar to the way 
the bandwidth is reduced. The photos (Figures 5a, 5b and 
5c) show the large-signal response of the LT1206 for 
various gain configurations. The slew rate varies from 
860V/ns for a gain of 1 , to 1 400V/|iS for a gain of -1 . 




R f = 825Q V S = ±15V 
Rl = 50S1 

Figure 5a. Large-Signal Response, A v = 1 




R f = RG = 750!i V S = ±15V ma.-™* 
Rl = 50Si 

Figure 5b. Large-Signal Response, A v = -1 



2-146 



LT1206 



nppucOTions inFonmnnon 











t 


11.00" 


























JL_j 






























\ 






_J 










\ ! 


V 










j 


















20r 


f 





R F = 750£! 



Figure 5c. Large-Signal Response, Av = 2 

When the LT1206 is used to drive capacitive loads, the 
available output current can limit the overall slew rate. In 
the fastest configuration, the LT1206 is capable of a slew 
rate of over 1 V/ns. The current required to slew a capacitor 
at this rate is 1mA per picofarad of capacitance, so 
10,000pF would require 1 0A! The photo (Figure 6) shows 
the large signal behavior with C L = 1 0.OOOpF. The slew rate 
is about 60V/ns, determined bythe current limit of 600mA. 




V S = ±15V R L = - wm ' m 
Rf = RG = 3k 



Figure 6. Large-Signal Response, C L = 10,000pF 

Differential Input Signal Swing 

The differential input swing is limited to about +6V by an 
ESD protection device connected between the inputs. In 
normal operation, the differential voltage between the 
input pins is small, so this clamp has no effect; however, 
in the shutdown mode the differential swing can be the 
same as the input swing. The clamp voltage will then set 



the maximum allowable input voltage. To allow for some 
margin, it is recommended that the input signal be less 
than +5V when the device is shut down. 

Capacitance on the Inverting Input 

Current feedback amplifiers require resistive feedback 
from the output to the inverting input for stable operation. 
Take care to minimize the stray capacitance between the 
output and the inverting input. Capacitance on the invert- 
ing input to ground will cause peaking in the frequency 
response (and overshoot in the transient response), but it 
does not degrade the stability of the amplifier. 

Power Supplies 

The LT1 206 will operate from single or split supplies from 
±5V (1 OV total) to ±1 5 V (30V total). It is not necessary to 
use equal value split supplies, however the offset voltage 
and inverting input bias current will change. The offset 
voltage changes about 500uV per volt of supply mis- 
match. The inverting bias current can change as much as 
5(jA per volt of supply mismatch, though typically the 
change is less than 0.5(iA per volt. 

Thermal Considerations 

The LT1206 contains a thermal shutdown feature which 
protects against excessive internal (junction) tempera- 
ture. If the junction temperature of the device exceeds the 
protection threshold, the device will begin cycling be- 
tween normal operation and an off state. The cycling is not 
harmful to the part. The thermal cycling occurs at a slow 
rate, typically 1 0ms to several seconds, which depends on 
the power dissipation and the thermal time constants of 
the package and heat sinking. Raising the ambient tem- 
perature until the device begins thermal shutdown gives a 
good indication of how much margin there is in the 
thermal design. 

For surface mount devices heat sinking is accomplished 
by using the heat spreading capabilities of the PC board 
and its copper traces. Experiments have shown that the 
heat spreading copper layer does not need to be electri- 
cally connected to the tab of the device. The PCB material 
can be very effective at transmitting heat between the pad 
area attached to the tab of the device, and a ground or 



2-147 



LT1206 



■ 



nppucmions mFORmnnon 

power plane layer either inside or on the opposite side of 
the board. Although the actual thermal resistance of the 
PCB material is high, the length/area ratio of the thermal 
resistance between the layer is small. Copper board stiff- 
ened and plated through holes can also be used to spread 
the heat generated by the device. 

Tables 1 and 2 list thermal resistance for each package. For 
the TO-220 package, thermal resistance is given for junc- 
tion-to-case only since this package is usually mounted to 
a heat sink. Measured values of thermal resistance for 
several different board sizes and copper areas are listed for 
each surface mount package. All measurements were 
taken in still air on 3/32" FR-4 board with 1 oz copper. This 
data can be used as a rough guideline in estimating 
thermal resistance. The thermal resistance for each appli- 
cation will be affected by thermal interactions with other 
components as well as board size and shape. 



Table 1 . R Package, 7-Lead DD 



COPPER AREA 


BOARD AREA 


THERMAL RESISTANCE 
(JUNCTION-TO-AMBIENT) 


TOPSIDE* 


BACKSIDE 


2500 sq. mm 


2500 sq. mm 


2500 sq. mm 


25°C/W 


1000 sq. mm 


2500 sq. mm 


2500 sq. mm 


27-C/W 


125 sq. mm 


2500 sq. mm 


2500 sq. mm 


35<C/W 



"Tab of device attached to topside copper 



Table 2. S8 Package, 8-Lead Plastic SOIC 



COPPER AREA 




THERMAL RESISTANCE 


TOPSIDE* 


BACKSIDE 


BOARD AREA 


(JUNCTION-TO-AMBIENT) 


2500 sq. mm 


2500 sq. mm 


2500 sq. mm 


60 C C/W 


1000 sq. mm 


2500 sq. mm 


2500 sq. mm 


62 C C/W 


225 sq. mm 


2500 sq. mm 


2500 sq. mm 


65 C C/W 


100 sq. mm 


2500 sq. mm 


2500 sq. mm 


69=C/W 


100 sq. mm 


1000 sq. mm 


2500 sq. mm 


73'C/W 


100 sq. mm 


225 sq. mm 


2500 sq. mm 


80°C/W 


100 sq. mm 


100 sq. mm 


2500 sq. mm 


83°C/W 



*Pins 1 and 8 attached to topside copper 



Y Package, 7-Lead TO-220 

Thermal Resistance (Junction-to-Case) = 5°C/W 

N8 Package, 8-Lead DIP 

Thermal Resistance (Junction-to-Ambient) = 100°C/W 



Calculating Junction Temperature 

The junction temperature can be calculated from the 
equation: 

Tj = (PDx9 JA ) + T A 

where: 

Tj = Junction Temperature 
Ta = Ambient Temperature 
Pd = Device Dissipation 

e JA = Thermal Resistance (Junction-to Ambient) 

As an example, calculate the junction temperature for the 
circuit in Figure 7forthe N8, S8, and R packagesassuming 
a 70°C ambient temperature. 



|5V 




Figure 7. Thermal Calculation Example 



The device dissipation can be found by measuring the 
supply currents, calculating the total dissipation, and 
then subtracting the dissipation in the load and feedback 
network. 

P D = (39mA x 30V) - (1 2V)7(2kll2k) = 1 .03W 
Then: 

Tj = (1 .03W x 1 00°C/W) + 70°C = 1 73°C 
for the N8 package 

Tj = (1 .03W x 65°C/W) x + 70°C = 1 37°C 
for the S8 with 225 sq. mm topside heat sinking 

Tj = (1 .03W x 35°C/W) x + 70°C = 1 06°C 
for the R package with 100 sq. mm topside 
heat sinking 

Since the Maximum Junction Temperature is 150°C, the 
I\I8 package is clearly unacceptable. Both the S8 and R 
packages are usable. 



2-148 



LT1206 



tvpicrl fippucnuons 




Low Noise x10 Buffered Line Driver 




Buffer A v = 1 



VlN — 



Ui2w.r«i4 

R L = 32a 

V = 5V RMS 
THD + NOISE - 0.0009% AT 1 kHz 
= 0.004% AT 20kHz 
SMALL SIGNAL 0.1<fB BANDWIDTH = 600kHz 




V ur -OPTIONAL. USE WITH CAPACITIVE LOADS 
• 'VALUE OF R f DEPENDS ON SUPPLY 
VOLTAGE AND LOADING. SELECT 
FROM TYPICAL AC PERFORMANCE 
TABLE OR DETERMINE EMPIRICALLY 



xrunas 



2-149 



TECHNOLOGY 



F€OTUR€S 

■ 45MHz Gain-Bandwidth 

■ 400V/u.s Slew Rate 

■ Unity-Gain Stable 

■ 7V/mV DC Gain, R L = 500S2 

■ 3mV Maximum Input Offset Voltage 

■ ±12V Minimum Output Swing into 500fl 

■ Wide Supply Range: ±2.5V to ±15V 

■ 7mA Supply Current per Amplifier 

■ 90ns Settling Time to 0.1%, 10V Step 

■ Drives All Capacitive Loads 

nppucfflions 

■ Wideband Amplifiers 

■ Buffers 

■ Active Filters 

■ Video and RF Amplification 

■ Cable Drivers 

■ Data Acquisition Systems 



LT12Q8/LT1209 

Dual and Quad 
45MHz, 400V/lis Op Amps 

DCSCMPTIOn 

The LT1208/LT1209 are dual and quad very high speed 
operational amplifiers with excellent DC performance. The 
LT1 208/LT1 209 feature reduced input offset voltage and 
higher DC gain than devices with comparable bandwidth 
and slew rate. Each amplifier is a single gain stage with 
outstanding settling characteristics. The fast settling time 
makes the circuit an ideal choice for data acquisition 
systems. Each output is capable of driving a 500Q load to 
±1 2V with +1 5V supplies and a 1 50Q load to ±3V on ±5V 
supplies. The amplifiers are also capable of driving large 
capacitive loads which make them useful in buffer or cable 
driver applications. 

The LT1 208/LT1 209 are members of a family of fast, high 
performance amplifiers that employ Linear Technology 
Corporation's advanced bipolar complementary 
processing. 





2-150 



LT1208/LT1209 



nasoiuTc mnximum rrticigs 

Total Supply Voltage (V + to V") 36V 

Differential Input Voltage +6V 

Input Voltage ±Vs 

Output Short-Circuit Duration (Note 1 ) Indefinite 

Operating Temperature Range 

LT1208C/LT1209C -40°Cto85°C 



Maximum Junction Temperature 

Plastic Package 150°C 

Storage Temperature Range - 65°C to 150°C 

Lead Temperature (Soldering, 10 sec) 300°C 



PRCKRG€/ORD€R IflFORmfiTIOn 



OUT A [T 
-IN A fT 
tINA [T 

r [T 



TOP VIEW 

— c — 




7] OUTB 
Y\ -IN B 
T\ + INB 



N8 PACKAGE 
8-LEAD PLASTIC DIP 

TjMH=150°C.e JS = 100=C/W 



ORDER PART 
NUMBER 



LT1208CN8 



TOP VIEW 




S8 PACKAGE 
8-LEAD PLASTIC SOIC 

TjM*x = 150°C,e JA =150»C/W 



ORDER PART 
NUMBER 



LT1208CS8 



S8 PART MARKING 



1208 




ORDER PART 
NUMBER 



LT1209CN 



N PACKAGE 
14-LEAD PLASTIC DIP 



TjMAX = 150°C,e JS = 70°C/W 




ORDER PART 
NUMBER 



LT1209CS 



S PACKAGE 
16-LEAD PLASTIC SOIC 

Tjmax = 150°C,9ja=100-C/W 



Consult factory tor Industrial and Military grade parts. 



€L€CTRICRL CHARACTERISTICS v s = 



+15V, T A = 25°C, R L = 1k, V CM = 0V, unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS 


MIN TYP MAX 


UNITS 


Vos 


Input Offset Voltage 


V S = ±5V (Note 2) 
0°C to 70°C 


• 


0.5 3.0 
4.0 


mV 
mV 


V s = ±15V(Note2) 
0°C to 70°C 


• 


1.0 5.0 
6.0 


mV 
mV 




Input V s Drift 






25 


u.V/°C 




Input Offset Current 


V s = ±5Vand V S = ±15V 
0°C to 70°C 


• 


100 400 
600 


nA 
nA 


Is 


Input Bias Current 


V s = ±5VandV s = ±15V 
0°C to 70°C 


• 


4 8 
9 


uA 
uA 




Input Noise Voltage 


f = 10kHz 




22 


nV/VRz 


in 


Input Noise Current 


f = 10kHz 




1.1 


pA/^/Hz 



2-151 



LT 1 208/ LT 1209 



€l€CTRICm CHARACTERISTICS V s = ±15V, T A = 25°C, R L = 1k, V cm = OV, unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS 


MIN 


TYP MAX 


UNITS 


Bin 


Input Resistance 


Vrwi = +1 2V 
Differential 




12 


40 

250 


Mn 
kQ 




Input Capacitance 






2 


PF 


CMRR 


Common-Mode Rejection Ratio 


Vs = +1 5V Vru = +1 2V' Vs = +5V 
V C M = ±2.5V, 0°Cto70°C 


• 


86 98 
83 


dB 
dB 


PSRR 


Power Supply Rejection Ratio 


Vr = ±5V to ±1 5V 
0°C to 70°C 


• 


76 
75 


84 


dB 
dB 




Input Voltage Range 


Vs = ±1 5V 
V s = ±5V 




±12 
±2.5 


±13 
+3 


V 
V 


AvOL 


Large-Signal Voltage Gain 


Vg — X IJ V , VOUT — X 1 UV , n(_ — JUUll 

0°C to 70°C 


• 


3.3 
2.5 


7 


V/mV 
V/mV 






V s = ±5V, Vout = ±2.5V, R L = 500Q 
0°C to 70°C 


• 


2.5 
2.0 


7 


V/mV 
V/mV 






V S = ±5V, V OU T = ±2.5V, R L = 150Q 




3 


V/mV 


VOUT 


Output Swing 


Vg-XlOV,nL- U LU / U U 

V S = ±5V, R L = 150Q,0 o C to 70°C 


• 


12.0 
3.0 


13.3 
3.3 


±V 
±V 


l0UT 


Output Current 


w„ _ 4_i c.\i w_,,_ _ j-i9\/ n°r tn 7n°r 
V S = ±5V, V 0UT = ±3V, 0°Cto70°C 



• 


24 
20 


40 
40 


mA 
mA 


SR 


Slew Rate 


Vg - X 1 J V, HyQ[_ — Z| ^VUlc Of 

0°C to 70°C 


• 


250 
200 


400 


V/us 
V/jis 






\/_ _ +cv/ A.,_. _ o fMn+p 0\ 

0°C to 70°C 


• 


150 
130 


250 


V/us 
V/ns 




Full Power Bandwidth 


1fl\/ Ppak fNntp &\ 
IUV rtJdH, \ I y U Itr H) 




6.4 


MHz 


GBW 


Gain-Bandwidth 


V s = ±l5V,f = 1MHz 

Vp -+ C i\/ f- 1MH7 
V g — IJ V , 1 — 1 IVI YlL 




45 
34 


MHz 
MHz 


tr.ti 


Rise Time, Fall Time 


\/c--+is\/ Awoi -1 m% tn Qn% n iv 

vg — x f -j v, Mytj|_ — 1 1 1 u /o lu au /o, u. 1 v 

V s = ±5V, Avcl = 1, 10% to 90%, 0.1V 




5 
7 


ns 
ns 




Overshoot 


V s = ±15V,A v cl = 1,0.1V 
V s = +5V, A VCL = 1,0.1V 




30 
20 


% 
% 




Propagation Delay 


V s = ± 1 5V, 50% V| N to 50% Vout 
V S = ±5V, 50%V, N to 50%V OU T 




5 
7 


ns 
ns 


ts 


Settling Time 


V S = ±15V, 10V Step, V S = ±5V, 
5V Step, 0.1% 




90 


ns 




Differential Gain 


f = 3.58MHz, R L = 150H 
f = 3.58MHz, R L = 1k 




1.30 
0.09 


% 
% 




Differential Phase 


f = 3.58MHz, R L = 150D 
f = 3.58MHz, R L = 1k 




1.8 
0.1 


Deg 
Deg 


Ro 


Output Resistance 


A VCL = 1,f = 1MHz 




2.5 


£2 




Crosstalk 


V O ut = ±10V, R L = 500Q 




-100 -94 


dB 


Is 


Supply Current 


Each Amplifier, V s > ±5V and V s = ±15V 
0°C to 70°C 


• 


7 9 
10.5 


mA 
mA 



The • denotes the specifications which apply over the full operating 
temperature range. 

Note 1: A heat sink may be required to keep the junction temperature 
below absolute maximum when the output is shorted indefinitely. 
Note 2: Input offset voltage is tested with automated test equipment and is 
exclusive of warm-up drift. 



Note 3: Slew rate is measured in a gain of -2. For ±15V supplies measure 
between ±10V on the output with ±6V on the input. For ±5V supplies 
measure between ±2V on the output with ±1.75V on the input. 
Note 4: Full power bandwidth is calculated from the slew rate 
measurement: FPBW = SR/2reV P . 



2-152 



LT1208/LT1209 



TVPICfiL P€RFORmnf1C€ CHRRRCT€RISTICS 



Input Common-Mode Range vs 
Supply Voltage 



1 5 



T A = 25 
AV 0S < 


C 

1mV 


















Aim 













5 10 15 

SUPPLY VOLTAGE (±V) 



Supply Current vs Supply Voltage 
and Temperature 



5 10 15 

SUPPLY VOLTAGE (±V) 



Output Voltage Swing vs 
Supply Voltage 



T A = 25 
R L = 50 
4V 0S = 


C 

30mV 


















' ~ v sw 













5 10 15 

SUPPLY VOLTAGE (tV) 



Output Voltage Swing vs 
Resistive Load 




10 100 1k 10k 

LOAD RESISTANCE (Q) 



Input Bias Current vs Input 
Common-Mode Voltage 



T fl = 


±15V 
25°C 
B* ♦ Ib" 










2 



































-15 -10 -5 5 10 15 
INPUT COMMON-MODE VOLTAGE (V) 



Open-Loop Gain vs 
Resistive Load 




10 100 1k 10k 

LOAO RESISTANCE (n) 



Input Bias Current vs Temperature 



500 
4.75 

;4.50 

c 
e 

3 4.25 

a 

i 

\ 4.00 
- 

3.75 
3.50 



-50 -I 













I 

*±15V 
In* + liT 










l B 


2 



































































25 50 75 
TEMPERATURE (°C) 



Output Short-Circuit Current 
vs Temperature 













v s = 


[5V 


































SOUR 




.SINK 



































Input Noise Spectral Density 



125 



25 50 75 
TEMPERATURE (*C) 



100 125 




1k 10k 
FREQUENCY (Hz) 



s^^J TECHNOLOGY 



2-153 



LT1208/LT1209 



TVPicnt P€RFORmnnc€ chrrrctcristics 



Crosstalk vs Frequency 





-20 




-30 




-40 




-50 


CO 

•o 


-60 






i 


-70 


£ 


-80 




-90 




-100 




-no 




-120 



I I I 1 1 
T A = 25°C 
V| N = OdBn 

A. . _ 1 


































-"V 








Hi 








































































v s =± 

L = 500 


V 
Si 




















R 






























15V — 




















k 































100k 



1M 10M 
FREQUENCY (Hz) 



Power Supply Rejection Ratio 
vs Frequency 

100 



S 80 
I 60 

UJ 

cc 

>; 40 











V S = 
Ta = 


►15V 
5°C 








+PSRR 










-PSRR 

































10k 100k 1M 10M 100M 
FREQUENCY (Hz) 



Common-Mode Rejection Ratio 
vs Frequency 



120 
100 
: 80 
60 
i 40 
i 20 










v s = 

Ta = 


t15V 
25°C 





















































10k 100k 1M 10M 100M 
FREQUENCY (Hz) 

l2oaoBG!Z 



Voltage Gain and Phase vs 
Frequency 









-v s = 
^Vs = 


t5V^ 










t15V^" 










V S =±5 
S = ±15 










V 








25°C 











100 1k 10k 100k 1M 10M 100M 
FREQUENCY (Hz) 



Output Swing vs Settling Time 



Frequency Response vs 
Capacitive Load 




25 50 75 100 
SETTLING TIME (ns) 



Closed-Loop Output Impedance 
vs Frequency 



100 

S 10 

O 

as 

2 

£ 1 
s 

=> 
§ 

o 0.1 
0.01 



V S = ±15 
T A = 25° 
A v =*1 


f 































Gain-Bandwidth vs Temperature 



10k 



100k 1M 10M 
FREQUENCY (Hz) 



100M 



48 
47 

I 46 

nz 
o 

5 45 
o. 

< 

CO 

z 44 
<r 

as 

43 
42 





±15V 



















































































Slew Rate vs Temperature 



-50 -25 25 50 75 100 125 
TEMPERATURE ('C) 



500 
450 
[400 
j 350 
! 300 
250 
200 



I 

V S = ±15V 
A« = -2 


















-SR 














+SR 



















































25 50 75 100 125 
TEMPERATURE (*C) 



2-154 



LT1208/LT1209 



TYPICAL P€RFORfTinnC€ CHRRRCT€RISTICS 



Gain-Bandwidth and Phase Margin 
vs Supply Voltage 



55 

£ 50 
:- 

f 45 

1 « 

? 35 

S 30 
25 









r A = 25X 


\p 


HASE MAR 


UN 




































/gain bandw 


DTH 













15 

SUPPLY VOLTAGE (tV) 



62 
60 

58 -„ 
•x. 

56 ffi 

54 5 
o 

52 | 

50 — 

48 

46 



Slew Rate vs Supply Voltage 



500 



* 300 



100 



T A = 25° 
A v = -1 










-SR/ 


♦SR 





























5 10 15 

SUPPLY VOLTAGE (±V) 



Total Harmonic Distortion 
vs Frequency 




100 1k 10k 

FREQUENCY (Hz) 



RPPLICRTIOHS IRFORfTIRTIOn 

Layout and Passive Components 

As with any high speed operational amplifier, care must be 
taken in board layout in order to obtain maximum perfor- 
mance. Key layout issues include: use of a ground plane, 
minimization of stray capacitance at the input pins, short 
lead lengths, RF-quality bypass capacitors located close 
to the device (typically 0.01 jxF toO.luJ), and use onow 

avoided when maximum frequency performance is re- 
quired, although low profile sockets can provide reason- 
able performance up to 50MHz. For more details see 
Design Note 50. The parallel combination of the feedback 
resistor and gain setting resistor on the inverting input 
combine with the input capacitance to form a pole which 
can cause peaking. If feedback resistors greater than 5k 
are used, a parallel capacitor of value 

Cf>R g xC| N /R f 

should be used to cancel the input pole and optimize 
dynamic performance. For unity-gain applications where 
a large feedback resistor is used, C F should be greaterthan 
or equal to C| N . 



Capacitive Loading 

The LT1208/LT1209 amplifiers are stable with capacitive 
loads. This is accomplished by sensing the load induced 
output pole and adding compensation at the amplifier gain 
node. As the capacitive load increases, both the bandwidth 
and phase margin decrease so there will be peaking in the 
frequency domain and in the transient response. The 
photo of the small-signal response with 1000pF load 
shows 50% peaking. The large-signal response with a 
1 0,000pF load shows the output slew rate being limited by 
the short-circuit current. To reduce peaking with capaci- 
tive loads, insert a small decoupling resistor between the 
output and the load, and add a capacitor between the 
output and inverting input to provide an AC feedback path. 
Coaxial cable can be driven directly, but for best pulse 
fidelity the cable should be doubly terminated with a 
resistor in series with the output. 



2-155 



LT1208/LT1209 



nppucnTions inFORmnnon 



Small-Signal Capacitive Loading 















A L . 












/ V 

j/ 




















„;, 

llll 












1 1 1 1 








J 


-4— 












IE 








i 

















A v =-1 
C L = 1000pF 



Large-Signal Capacitive Loading 




caused by a second pole beyond the unity-gain crossover. 
This is reflected in the 50° phase margin and shows up as 
overshoot in the unity-gain small-signal transient re- 
sponse. Higher noise gain configurations exhibit less 
overshoot as seen in the inverting gain of one response. 

The large-signal response in both inverting and non- 
inverting gain show symmetrical slewing characteristics. 
Normally the noninverting response has a much faster 
rising edge due to the rapid change in input common- 
mode voltage which affects the tail current of the input 
differential pair. Slew enhancement circuitry has been 
added to the LT1 208/LT1 209 so that the falling edge slew 
rate is balanced. 



Small-Signal Transient Response 



A v = 1 

C L = 10,0OOpF 



Input Considerations 

Resistors in series with the inputs are recommended for 
the LT1208/LT1209 in applications where the differential 
input voltage exceeds +6V continuously or on a transient 
basis. An example would be in noninverting configura- 
tions with high input slew rates or when driving heavy 
capacitive loads. The use of balanced source resistance at 
each input is recommended for applications where DC 
accuracy must be maximized. 

Transient Response 

The LT1 208/LT1 209 gain-bandwidth is 45MHz when mea- 
sured at 100kHz. The actual frequency response in unity- 
gain is considerably higher than 45MHz due to peaking 



A v = 1 



Small-Signal Transient Response 




A v = -1 



2-156 



LT1208/LT1209 



nwucflTions inFonmnTion 



Large-Signal Transient Response 




Ay = 1 1ZOMJ9AI05 



Large-Signal Transient Response 




Ay = -1 uomshk* 



Low Voltage Operation 

The LT1 208/LT1 209 are functional at room temperature 
with only 3V of total supply voltage. Under this condition, 
however, the undistorted output swing is only 0.8Vp.p . A 
more realistic condition is operation at ±2.5V supplies (or 
5V and ground). Under these conditions, at room tem- 
perature, the typical input common-mode range is 1 .9Vto 
-1 .3V (for a V os change of 1 mV), and a 5MHz, 2V P . P sine 
wave can be faithfully reproduced. With 5V total supply 
voltage the gain-bandwidth is reduced to 26MHz and the 
slew rate is reduced to 135V/us. 



Power Dissipation 

The LT1 208/LT1 209 combine high speed and large output 
current drive in small packages. Because of the wide 
supply voltage range, it is possible to exceed the maxi- 
mum junction temperature under certain conditions. 

Maximum junction temperature (Tj) is calculated from the 
ambient temperature (T A ) and power dissipation (P D ) as 
follows: 

LT1208CN8: Tj = T A + (P D x 100°C/W) 
LT1208CS8: Tj = T A + (P D x 150°C/W) 
LT1209CN: Tj = T A + (P D x 70°C/W) 
LT1209CS: Tj = T A + (P D x 100°C/W) 

Maximum power dissipation occurs at the maximum 
supply current and when the output voltage is at 1/2 of 
either supply voltage (or the maximum swing if less than 
1/2 supply voltage). 

For each amplifier P D max is as follows: 

Pdmax^V^V-HIsmax)^- 5 ^ 
Example: LT1208 in S8 at 70°C, V s = +10V, R L = 500C2 

Pdmax = (20V)(1 0.5mA) + |g = 260mW 
Tj = 70°C + (2 x 260mW)(150°C/W) = 148°C 

DAC Current-to-Voltage Converter 

The wide bandwidth, high slew rate and fast settling time 
of the LT1 208/LT1 209 make them well-suited for current- 
to-voltage conversion after current output D/A converters. 
A typical application with a DAC-08 type converter (full- 
scale output of 2mA) uses a 5k feedback resistor. A 7pF 
compensation capacitor across the feedback resistor is 
used to null the pole at the inverting input caused by the 
DAC output capacitance. The combination of the LT1 208/ 
LT1209 and DAC settles to less than 40mV (1LSB) in 
140ns for a 10V step. 



2-157 



LT1208/LT1209 




Instrumentation Amplifier 



R5 R4 




TRIM R5 FOR GAIN 

TRIM R1 FOR COMMON-MODE REJECTION 
BW = 430kHz 



Full-Wave Rectifier 



1N4148 

-w- 




2-158 



LT1208/LT1209 



simpiiFicD scHemnnc 




OOUT 




uust 



2-159 



urn 



TECHNOLOGY 



F€fiTUR€S 

■ Slew Rate 7V/|iS Typ 

■ Gain-Bandwidth Product 14MHzTyp 

■ Fast Settling to 0.01% 

2V Step to 200uV 900ns Typ 

10V Step to 1mV 2.2usTyp 

■ Excellent DC Precision in All Packages 

Input Offset Voltage 275uV Max 

Input Offset Voltage Drift 6uV/°C Max 

Input Offset Current 30nA Max 

Input Bias Current 125nAMax 
Open-Loop Gain 1200V/mVMin 

■ Single Supply Operation 

Input Voltage Range Includes Ground 

Output Swings to Ground While Sinking Current 

■ Low Input Noise Voltage 12nV/VHzTyp 

■ Low Input Noise Current 0.2pA/VHz Typ 

■ Specified on 3.3V, 5V and +15V 

■ Large Output Drive Current 20mA Min 

■ Low Supply Current per Amplifier 1.8mA Max 

■ Dual in 8-Pin DIP and S08 

■ Quad in 14-Pin DIP and NARROW S016 

Note: For applications requiring higher slew rate, seethe LT1 2 1 3/LT1 2 1 4 and 
LT1215/LT1216 data sheets. 



LT1211/LT1212 



14MHz, 7V/lis, Single Supply 
Dual and Quad 
Precision Op Amps 

DCSCMPTIOn 

The LT1 21 1 is a dual, single supply precision op amp with 
a 14MHz gain-bandwidth product and a 7V/|js slew rate. 
The LT1212 is a quad version of the same amplifier. The 
DC precision of the LT1211/LT1212 eliminates trims in 
most systems while providing high frequency perfor- 
mance not usually found in single supply amplifiers. 

The LT121 1/LT1212 will operate on any supply greater 
than 2.5V and less than 36V total. These amplifiers are 
specified on single 3.3V, single 5V and ±1 5V supplies, and 
only require 1 .3mA of quiescent supply current per ampli- 
fier. The inputs can be driven beyond the supplies without 
damage or phase reversal of the output. The minimum 
output drive is 20mA, ideal for driving low impedance 
loads. 



nppucmions 

■ 2.5V Full-Scale 12-Bit Systems 

■ 10V Full-Scale 16-Bit Systems 

■ Active Filters 

■ Photo Diode Amplifiers 

■ DAC Current-to-Voltage Amplifiers 

■ Battery-Powered Systems 



V os < 0.45LSB 
V 0S < 1.8LSB 




2-160 



LT1211/LT1212 



rbsolutc mnximum RnnnGS 

Total Supply Voltage (V + to V") 36V 

Input Current +15mA 

Output Short-Circuit Duration (Note 1) Continuous 

Operating Temperature Range 

LT1211C/LT1212C -40°Cto85°C 

LT1211M -55°Cto125°C 



Storage Temperature Range -65°C to 150°C 

Junction Temperature (Note 2) 

Plastic Package (N8, S8, N,S) 150°C 

Ceramic Package (J8) 175°C 

Lead Temperature (Soldering, 10 sec) 300°C 



PHCKfiG€/OfiD€R mFORmnTion 



OUT A [T 
-IN A [7 
+INA [7 

V" [T 



TOP VIEW 
— — 



YJ v* 

TJ OUTB 
]D -IN B 
TJ +IN B 



J8 PACKAGE 
8-LEAD CERAMIC DIP 



N8 PACKAGE 
8-LEAD PLASTIC DIP 



t=:;K:» 



ORDER PART 
NUMBER 



LT1211CN8 
LT1211ACN8 
LT1211MJ3 
LT1211AMJ8 




S8 PACKAGE 
8-LEAD PLASTIC SOIC 

Tjmm=150°C,9 js = 150°C/W 



ORDER PART 
NUMBER 



LT1211CS8 



S8 PART MARKING 



1211 




ORDER PART 
NUMBER 



LT1212CN 



N PACKAGE 
14-LEAD PLASTIC DIP 



Tj MA x = 150°C,ejA»70"CW 




S PACKAGE 
16-LEAD PLASTIC SOIC 

TjMAX = 150°C,ej A =100°C/W 



ORDER PART 



LT1212CS 



Consult factory for Industrial grade parts. 



nvniinBic opTions 





PACKAGE 


NUMBER OF 






MAXTCVos 


CERAMIC 


PLASTIC DIP 


SURFACE MOUNT 


OP AMPS 


T A RANGE 


MAXVos (25°C) 


(AVos/AT) 


(J) 


(N) 


(S) 


Two (Dual) 


-40°C to 85°C 


150nV 


1.5nV/°C 




LT1211ACN8 








275pV 


3nV/°C 




LT1211CN8 








275p.V 


6uV/°C 






LT1211CS8 


Two (Dual) 


-55°Cto125°C 


150nV 


1.5m.W°C 


LT1211AMJ8 










275nV 


3hV/°C 


LT1211MJ8 






Four (Quad) 


-40°Cto85°C 


275nV 


6mV/°C 




LT1212CN 


LT1212CS 



2-161 



LT1211/LT1212 



5V €L€CTRICRL CHflRnCT€RISTICS 

Vs = 5V, V C m = 0.5V, Vqut = 0.5V, T A = 25 C, unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS 


LT1211AC 
LT1211AM 
MIN TYP MAX 


LT1211C/LT1211M 
LT1212C 
MIN TYP MAX 


UNITS 


v os 


Input Offset Voltage 


1 


75 150 


100 275 


M-V 


AVqs 
ATinrte 


Long-Term Input Offset 
Voltage Stability 




0.5 


0.6 


uV/Mo 


! OS 


Input Offset Current 




5 20 


5 30 


nA 












lg 


Input Bias Current 




50 100 


60 125 


nA 




Input Noise Voltage 


0.1Hz to 10Hz 


250 


250 


nVp.p 


e„ 


Input Noise Voltage Density 


f o = 10Hz 
f = 1000Hz 


12.5 
12.0 


12.5 
12.0 


nVMTz 
nVAffiz 


in 


Input Noise Current Density 


frj = 10Hz 
f = 1000Hz 


0.9 
0.2 


0.9 

0.2 


pA/VHz 
pAMTz 




Input Resistance (Note 3) 


Differential Mode 

Hnmmnn Mnrlp 

UUIIIIIIUII IVIUUG 


10 40 

500 


10 40 
500 


Mn 
Mn 




input VjaL/auuai ioc 


f = 1MHz 


10 


10 


dF 




Innut Vnltanp Rannp 
input vuuayc naiiyc 




3.5 3.8 
-0.3 


3.5 3.8 
-0.3 


v 

V 


CMRR 


Common-Mode Rejection Ratio 


V CM = 0Vto3.5V 


90 105 


86 102 


dB 


PSRR 


Power Supply Rejection Ratio 


V S = 2.5V to 12.5V 


90 115 


87 110 


dB 


AvOL 


Large-Signal Voltage Gain 


V = 0.05V to 3.7V, R L = 500a 


250 560 


250 560 


V/mV 




Maximum Output Voltage Swing 
(Note 4) 


Output High, No Load 
Output High, lsouRCE = 1rnA 
Output High, lsouRCE = 15mA 


4.30 4.40 
4.20 4.30 
3.85 4.00 


4.30 4.40 
4.20 4.30 
3.85 4.00 


V 
V 
V 


Output Low, No Load 
Output Low, [sink = .1mA 
Output Low, Isink = 15mA 


0.003 0.006 
0.047 0.065 
0.362 0.500 


0.003 0.006 
0.047 0.065 
0.362 0.500 


V 
V 
V 


!o 


Maximum Output Current 


(Note y) 


±20 ±50 


±20 ±50 


mA 


SR 


Slew Rate 


Ay = -2 


4 


4 


V/|as 


GBW 


Gain-Bandwidth Product 


f = 100kHz 


13 


13 


MHz 


Is 


Supply Current per Amplifier 




0.9 1.3 1.8 


0.9 1.3 1.8 


mA 




Minimum Supply Voltage 


Single Supply 


2.2 2.5 


2.2 2.5 


V 




Full Power Bandwidth 


A v = 1,V = 2.5V P .p 


300 


300 


kHz 


tr.tf 


Rise Time, Fall Time 


A v = 1,10%to90%,V = 100mV 


45 


45 


ns 


OS 


Overshoot 


A v = 1,V o = 100mV 


25 


25 


% 


tpD 


Propagation Delay 


A v = 1,V o = 100mV 


36 


36 


ns 


ts 


Settling Time 


0.01%,A V = 1,AV = 2V 


900 


900 


ns 




Open-Loop Output Resistance 


l o = 0mA,f = 5MHz 


75 


75 


£2 


THD 


Total Harmonic Distortion 


A V = 1,V = 1V RMS , 20Hzto 20kHz 


0.001 


0.001 


% 



2-162 



LT1211/LT1212 



5V €l€CTRICfll CHRRRCT€RISTICS 



Vs = 5V, V C m = 0.5V, Vqut = 05V, 0°C < T A < 70°C, unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS 


MIN 


LT1211AC 
TYP 


MAX 


LT1211C/LT1212C 
MIN TYP MAX 


UNITS 


Vos 


Input Offset Voltage 




100 


175 




150 


375 


uV 


AV 0S 
AT 


Input Offset Voltage Drift 
(Note 3) 


8-Pin DIP Package 
14-Pin DIP, SOIC Package 




0.7 


1.5 




1 

2 


3 
6 


uV/°C 
uV/°C 


los 


Input Offset Current 






5 


25 




10 


35 


nA 


Ib 


Input Bias Current 






60 


110 




70 


135 


nA 




Input Voltage Range 




3.4 
0.1 


3.5 
-0.1 




3.4 
0.1 


3.5 
-0.1 




V 
V 


CMRR 


Common-Mode Rejection Ratio 


V CM = 0.1Vto 3.4V 


89 105 


85 


102 




dB 


PSRR 


Power Supply Rejection Ratio 


V s = 2.5V to 12.5V 


89 


114 




86 110 


dB 


Avol 


Large-Signal Voltage Gain 


V = 0.05V to 3.7V, R L = 500n 


150 


430 




150 


430 




V/mV 




Maximum Output Voltage Swing 
(Note 4) 


Output High, No Load 
Output High, l S 0URCE = 1mA 
Output High, lsouRCE = 10mA 


4.20 
4.10 
3.90 


4.33 
4.23 
4.03 




4.20 
4.10 
3.90 


4.33 
4.23 
4.03 




V 
V 
V 






Output Low, No Load 
Output Low, Isink = 1mA 
Output Low, l S | NK = 10mA 




0.004 
0.052 
0.290 


0.007 
0.070 
0.400 




0.004 
0.052 
0.290 


0.007 
0.070 
0.400 


V 
V 
V 


Is 


Supply Current per Amplifier 




0.8 


1.4 


2.1 


0.8 


1.4 


2.1 


mA 


Vs = 5V, V CM = 0.5V, V 0UT = 0.5V, -40°C < T A < 85°C, unless otherwise n 


uted. (Note 5) 












SYMBOL 


PARAMETER 


CONDITIONS 


MIN 


LT1211AC 
TYP 


MAX 


LT1211C/LT1212C 
MIN TYP MAX 


UNITS 


Vos 


Input Offset Voltage 






120 


200 




175 


500 


uV 


AV 0S 
AT 


Input Offset Voltage Drift 
(Note 3) 


8-Pin DIP Package 
14-Pin DIP, SOIC Package 




0.7 


1.5 




1 
2 


3 
6 


HV/°C 
uV/°C 


los 


Input Offset Current 






10 


30 




20 


50 


nA 


Ib 


Input Bias Current 






70 


120 




80 


145 


nA 




Input Voltage Range 




3.1 
0.2 


3.2 





3.1 
0.2 


3.2 





V 
V 


CMRR 


Common-Mode Rejection Ratio 


V C m = 0.2V to 3.1V 


88 104 


84 101 


dB 


PSRR 


Power Supply Rejection Ratio 


V s = 2.5V to 12.5V 


88 113 


85 109 


dB 


AVOL 


Large-Signal Voltage Gain 


V = 0.05V to 3.7V, R L = 500n 


100 


390 




100 


390 




V/mV 




Maximum Output Voltage Swing 
(Note 4) 


Output High, No Load 
Output High, lsouRCE = 1mA 
Output High, l S ouRCE = 10mA 


4.15 
4.00 
3.80 


4.25 
4.16 
3.96 




4.15 
4.00 
3.80 


4.25 
4.16 
3.96 




V 
V 
V 






Output Low, No Load 
Output Low, Isink = 1 mA 
Output Low, Isink = 1 0mA 




0.005 
0.053 
0.300 


0.008 
0.075 
0.420 




0.005 
0.053 
0.300 


0.008 
0.075 
0.420 


V 
V 
V 


Is 


Supply Current per Amplifier 




0.7 


1.5 


2.2 


0.7 


1.5 


2.2 


mA 



-f^j TECHTOLOOT 



2-163 



LT1211/LT1212 



5V €l€CTRICfll CHRRRCT€RISTICS 



Vs = 5V, V CM = 0.5V, Vqut = 05V, -55°C < T A < 125°C, unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS 


LT1211AM 
MIN TYP MAX 


LT1211M 
MIN TYP MAX 


UNITS 


Vos 


Input Offset Voltage 




140 250 


200 500 


uV 


AV 0S 
AT 


Input Offset Voltage Drift 
(Note 3) 




0.7 1.5 


1 3 


uW°C 


i 

'OS 


IIipUl UMbcl LiUlIcNL 




15 40 


25 75 


nA 




Innut Riac; Riirrpnt 




75 130 


85 160 


nA 




Input Voltage Range 




3.1 3.2 
0.4 0.2 


3.1 3.2 
0.4 0.2 


V 
V 


CMRR 


Common-Mode Rejection Ratio 


V CM = 0.4V to 3.1V 


87 104 


81 101 


dB 


PSRR 


Power Supply Rejection Ratio 


V s = 2.5V to 12.5V 


87 113 


84 109 


dB 


Avol 


Large-Signal Voltage Gain 


V = 0.05V to 3.7V. R[_ = 500£2 


100 250 


100 250 


V/mV 




Maximum Output Voltage Swing 
(Note 4) 


Output High, No Load 
Output High, Isouhce = 1m A 
Output High, Isource = 10mA 


4.10 4.20 
3.95 4.10 
3.70 3.90 


4.10 4.20 
3.95 4.10 
3.70 3.90 


V 
V 
V 


Output Low, No Load 
Output Low, Isink = 1mA 
Output Low, Isink = 10mA 


0.007 0.010 
0.060 0.085 
0.350 0.500 


0.007 0.010 


mV 
mV 
mV 


Is 


Supply Current per Amplifier 





0.5 1.7 2.5 0.5 1.7 2.5 


mA 



±15V €l€CTRICfll CHRRRCTCRISTICS 



Vs = ±15V, Vcm = 0V, Vqut = 0V, T A = 25°C, unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS 


MIN 


LT1211AC 
LT1211AM 
TYP 


MAX 


LT1211C/LT1211M 
LT1212C 
MIN TYP MAX 


UNITS 


Vos 


Input Offset Voltage 






125 


400 




150 


550 


uV 


los 


Input Offset Current 






5 


20 




5 


30 


nA 


k 


Input Bias Current 






45 


95 




50 


120 


nA 




Input Voltage Range 




13.5 
-15.0 


13.8 
-15.3 




13.5 
-15.0 


13.8 
-15.3 




V 
V 


CMRR 


Common-Mode Rejection Ratio 


V CM = -15V to 13.5V 


90 


105 




86 


102 




dB 


PSRR 


Power Supply Rejection Ratio 


V S = ±2V to±18V 


90 


113 




87 


110 




dB 


Avol 


Large-Signal Voltage Gain 


V o = 0Vto±10V, R[_ = 2k 


1200 


5000 




1200 


5000 




V/mV 




Maximum Output Voltage Swing 


Output High, Isouhce = 15mA 


13.8 


14.0 




13.8 


14.0 




V 






Output Low, Isink = 15mA 


-14.4 


-14.6 




-14.4 


-14.6 




V 


lo 


Maximum Output Current 


(Note 9) 


±20 


±50 




±20 


±50 




mA 


SR 


Slew Rate 


Ay = -2 (Note 6) 


5 


7 




5 


7 




V/us 


GBW 


Gain-Bandwidth Product 


f = 100kHz 


8 14 


8 14 


MHz 


Is 


Supply Current per Amplifier 




0.9 


1.8 


2.5 


0.9 


1.8 


2.5 


mA 




Channel Separation 


V = ±10V, R L = 2k 


128 


140 




128 


140 




dB 




Minimum Supply Voltage 


Equal Split Supplies 




±1.2 


±2.0 




±1.2 


±2.0 


V 




Full Power Bandwidth 


A v =1.V = 20Vp.p 


60 


60 


kHz 




Settling Time 


0.01%, A v = 1, AV = 10V 


2.2 


2.2 


us 



2-164 



LT1211/LT1212 



±15V €L€CTRICnL CHfiRRCTCRISTICS 



V s = +15V, V CM = OV, V 0UT = OV, 0°C < T A < 70"C, unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS 


MIN 


LT1211AC 
TYP 


MAX 


LT1211C/LT1212C 
MIN TYP MAX 


UNITS 


Vos 


Input Offset Voltage 






150 


425 




200 


650 


uV 


AV 0S 
AT 


Input Offset Voltage Drift 
(Note 3) 


8-Pin DIP Package 
14-Pin DIP, SOIC Package 




0.7 


1.5 




1 
2 


3 
6 


uV/°C 
u.V/°C 


los 


Input Offset Current 






10 


20 




10 


35 


nA 


k 


Input Bias Current 






55 


100 




60 


125 


nA 




Input Voltage Range 




13.4 
-14.9 


13.5 
-15.1 




13.4 
-14.9 


13.5 
-15.1 




V 
V 


CMRR 


Common-Mode Rejection Ratio 


V CM = -14.9V to 13.4V 


89 104 


85 101 


(IB 


PSRR 


Power Supply Rejection Ratio 


V s = ±2Vto±18V 


89 112 


86 108 


dB 




Large-Signal Voltage Gain 


V = OV to ±1 OV, R L = 2k 


1000 


3500 




1000 


3500 




V/mV 




Maximum Output Voltage Swing 


Output High, Isource = 10mA 


13.8 


14.0 




13.8 


14.0 




V 






Output Low, Isink = 10mA 


-14.5 


-14.7 




-14.5 


-14.7 




\i 

V 


Is 


Supply Current per Amplifier 




0.8 


2.1 


2.9 


0.8 


2.1 


2.9 


mA 


V s = ±15V, V CM = OV, V 0U T = OV, -40°C < T A < 85°C, unless otherwise not 


ed. (Note 5) 












SYMBOL 


PARAMETER 


CONDITIONS 


MIN 


LT1211AC 
TYP 


MAX 


LT1211C/LT1212C 
MIN TYP MAX 


UNITS 


Vos 


Input Offset Voltage 






175 


450 




250 


700 


u.V 


AV 0S 
AT 


Input Offset Voltage Drift 
(Note 3) 


8-Pin DIP Package 
14-Pin DIP, SOIC Package 




0.7 


1.5 




1 

2 


3 
6 


uWC 
u.V/°C 


los 


Input Offset Current 






10 


25 




10 


40 


nA 


Ib 


Input Bias Current 






55 


100 




60 


130 


nA 




Input Voltage Range 




13.1 
-14.8 


13.2 
-15.0 




13.1 
-14.8 


13.2 
-15.0 




V 
V 


CMRR 


Common-Mode Rejection Ratio 


V CM = -14.8V to 13.1V 


88 


103 




84 


100 




dB 


PSRR 


Power Supply Rejection Ratio 


V S = ±2V to+18V 


88 111 


85 


107 




dB 


AvOL 


Large-Signal Voltage Gain 


V = 0Vto±10V, R L = 2k 


1000 


3000 




1000 


3000 




V/mV 




Maximum Output Voltage Swing 


Output High. Isource = 1 0mA 


13.7 


13.9 




13.7 


13.9 




V 






Output Low. Isink = 10mA 


-14.5 


-14.7 




-14.5 


-14.7 




V 


Is 


Supply Current per Amplifier 




0.7 


2.2 


3.0 


0.7 


2.2 


3.0 


mA 


V s = ±15V, V CM = OV, Vqut = OV, -55°C < T A < 125°C, unless otherwise noted. 


SYMBOL 


PARAMETER 


CONDITIONS 


MIN 


LT1211AM 
TYP 


MAX 


MIN 


LT1211M 
TYP 


MAX 


UNITS 


Vos 


Input Offset Voltage 






200 


500 




300 


800 


U.V 


AV 0S 
AT 


Input Offset Voltage Drift 
(Note 3) 






0.7 


1.5 


1 3 


u.V/°C 


los 


Input Offset Current 






10 


40 


10 60 


nA 


Ib 


Input Bias Current 






55 


110 




60 


140 


nA 




Input Voltage Range 




13.1 
-14.6 


13.2 
-14.8 




13.1 
-14.6 


13.2 
-14.8 




V 
V 


CMRR 


Common-Mode Rejection Ratio 


V CM = -14.6V to 13.1V 


87 


103 




81 


100 




dB 


PSRR 


Power Supply Rejection Ratio 


V s = ±2Vto±15V 


87 


111 




84 


107 




dB 


AvOL 


Large-Signal Voltage Gain 


V o = 0Vto±10V, R L = 2k 


800 


1500 




800 


1500 




V/mV 




Maximum Output Voltage Swing 


Output High, Isource = 10mA 


13.6 


13.8 




13.6 


13.8 




V 






Output Low, Isink = 10mA 


-14.3 


-14.5 




-14.3 


-14.5 




V 


Is 


Supply Current per Amplifier 




0.5 


2.3 


3.4 


0.5 


2.3 


3.4 


mA 



2-165 



LT1211/LT1212 



3.3V €l€CTRICfll CHHRRCTCRISTICS 



V s = 3.3V, V CM = 0.5V, Vqut = 0.5V, T A = 25 C, unless otherwise noted. (Note 7) 



SYMBOL 


PARAMETER 


CONDITIONS 


LT1211AC 
LT1211AM 
MIN TYP MAX 


LT1211C/LT1211M 
LT1212C 
MIN TYP MAX 


UNITS 


Vos 


Input Offset Voltage 




75 150 


100 275 


U.V 




Input Voltage Range (Note 8) 




1.8 2.1 
-0.3 


1.8 2.1 

-0.3 


V 
V 




Maximum Output Voltage Swing 


Output High, No Load 
Output High, Isource = 1mA 
Output High, Isource = 15mA 


2.60 2.70 
2.50 2.60 
2.15 2.30 


2.60 2.70 
2.50 2.60 
2.15 2.30 


V 
V 
V 


Output Low, No Load 
Output Low, Isink = 1mA 
Output Low, Isink = 15mA 


0.003 0.006 
0.047 0.065 
0.362 0.500 


0.003 0.006 
0.047 0.065 
0.362 0.500 


V 
V 
V 


lo 


Maximum Output Current 




+20 ±50 


±20 ±50 


mA 


V s = 3.3V, V CM = 0.5V, V 0UT = 0.5V, C < T A < 70 C, unless otherwise noted. (Note 7) 


SYMBOL 


PARAMETER 


CONDITIONS 


LT1211AC 
MIN TYP MAX 


LT1211C/LT1212C 
MIN TYP MAX 


UNITS 


Vos 


Input Offset Voltage 





100 175 


150 375 


uV 




Input Voltage Range (Note 8) 




1.7 1.4 
0.1 -0.1 


1.7 1.8 
0.1 -0.1 


V 
V 




Maximum Output Voltage Swing 


Output High, No Load 
Output High, Isource = 1mA 
Output High, Isource = 10mA 


2.50 2.63 
2.40 2.53 
2.20 2.33 


2.50 2.63 
2.40 2.53 
2.20 2.33 


V 
V 
V 


Output Low, No Load 
Output Low, Isink = 1 mA 
Output Low, Isink = 10mA 


0.004 0.007 
0.052 0.070 
0.290 0.400 


0.004 0.007 
0.052 0.070 
0.290 0.400 


V 
V 
V 


V s = 3.3V, V CM = 0.5V, Vq UT = 0.5V, -40 C < T A < 85 C, unless otherwise noted. (Note 5, 7) 


SYMBOL 


PARAMETER 


CONDITIONS 


LT1211AC 
MIN TYP MAX 


LT1211C/LT1212C 
MIN TYP MAX 


UNITS 


Vos 


Input Offset Voltage 




120 200 


175 500 


M-V 




Input Voltage Range (Note 8) 




1.4 1.5 
0.2 


1.4 1.5 
0.2 


V 
V 




Maximum Output Voltage Swing 


Output High, No Load 
Output High, Isource = 1 mA 
Output High, Isource = 10mA 


2.45 2.55 
2.30 2.46 
2.10 2.26 


2.45 2.55 
2.30 2.46 
2.10 2.26 


V 
V 
V 


Output Low, No Load 
Output Low, Isink = 1 mA 
Output Low, Isink = 10mA 


0.005 0.008 
0.053 0.075 
0.300 0.420 


0.005 0.008 
0.053 0.075 
0.300 0.420 


V 
V 
V 


V s = 3.3V, V CM = 0.5V, V 0UT = 0.5V, -55°C <T A < 125°C, unless otherwise noted. (Note 7) 


SYMBOL 


PARAMETER 


CONDITIONS 


LT1211AM 
MIN TYP MAX 


LT1211M 
MIN TYP MAX 


UNITS 


Vos 


Input Offset Voltage 




130 250 


200 500 


uV 




Input Voltage Range (Note 8) 




1.4 1.5 
0.4 0.2 


1.4 1.5 
0.4 0.2 


V 
V 




Maximum Output Voltage Swing 


Output High, No Load 
Output High, Isource = 1mA 
Output High, Isource = 10mA 


2.40 2.50 
2.25 2.40 
2.00 2.20 


2.40 2.50 
2.25 2.40 
2.00 2.20 


V 
V 
V 


Output Low, No Load 
Output Low, Isink = 1mA 
Output Low, Isink = 10mA 


0.007 0.010 
0.060 0.085 
0.350 0.500 


0.007 0.010 
0.060 0.085 
0.350 0.500 


V 
V 
V 



2-166 



XTUE19S 



LT1211/LT1212 



€l€CTRICRl CHARACTERISTICS 



Note 1: A heat sink may be required to keep the junction temperature 

below absolute maximum when the output is shorted indefinitely. 

Note 2: Tj is calculated from the ambient temperature T A and power 

dissipation P D according to the following formulas: 

LT1 21 1 MJ8, LT1 21 1 AMJ8: Tj = T A + (P D x 1 00°C/W) 
LT1211CN8, LT1211ACN8: Tj = T A + (P D x 1 00°C/W) 
LT1211CS8: Tj = T A + (P x 150°C/W) 

LT1212CN: Tj = T A + (P D x 70°C/W) 

LT1212CS: Tj = T A + (P D x 100°C/W) 

Note 3: This parameter is not 100% tested. 

Note 4: Guaranteed by correlation to 3.3V and ±15V tests. 



Note 5: The LT1211/LT1212 are not tested and are not quality-assurance 
sampled at -40°C and at 85°C. These specifications are guaranteed by 
design, correlation and/or inference from -55°C, 0°C, 25°C, 70°C and/or 
125-C tests. 

Note 6: Slew rate is measured between ±8.5V on an output swing of ±10V 
on ±15V supplies. 

Note 7: Most LT1211/LT1212 electrical characteristics change very little 
with supply voltage. See the 5V tables for characteristics not listed in the 
3.3V table. 

Note 8: Guaranteed by correlation to 5V and ±1 5V tests. 
Note 9: Guaranteed by correlation to 3.3V tests. 



typkri PCRFORmnncc chrrrctcristics 



Distribution of Input Offset Voltage 



£ 50 

CO 

I 40 
o 

£ 30 

LU 
O 

£ 20 
10 






5V 




I I I 
LT1211 J8 PACKAGE 

I T191 1 M» DATtf ACE 





















































































-350 -250 -150 -50 50 150 250 
INPUT OFFSET VOLTAGE {(iV) 



Distribution of Offset Voltage Drift 
with Temperature 




Distribution of Input Offset Voltage 



-3-2-1 1 2 3 
OFFSET VOLTAGE DRIFT WITH TEMPERATURE fjiWC) 





±15V 




I I 
LT1211 J8 PACKAGE 
1T1211 NR PACKARF 























































































-700 -500 -300 -100 100 300 500 700 
INPUT OFFSET VOLTAGE (mV) 



Distribution of Input Offset Voltage 



70 
60 
g 50 

CO 

I 40 
o 

I 30 
o 

EE 20 
10 






5V 




I I I 
LT1211 S8 PACKAGE 

I M PAriTARC 








LT1212S 


PACK/ 


GE 




















- 


h 

















































-350 -250 -150 -50 50 150 250 350 
INPUT OFFSET VOLTAGE (nV) 



Distribution of Offset Voltage Drift 
with Temperature 




Distribution of Input Offset Voltage 



70 



V S =±15V 




LT1211 S8 PACKAGE 
I T121? N PACKARF 








LT1 


212 S 


PACK/ 


GE 







































































-6 -4 -2 2 4 
OFFSET VOLTAGE DRIFT WITH TEMPERATURE (nWC) 

1211/I2G05 



30 
20 
10 


-700 -500 -300 -100 100 300 500 700 
INPUT OFFSET VOLTAGE (tiV) 



2-1 67 



LT1211/LT1212 




Slew Rate vs Temperature 



Slew Rate vs Supply Voltage 



Capacitive Load Handling 



-A V = 
R L = 


25°C 












-2 " 
10k 




v s = 


b15V 








































v s 


-5V 

















































-50 -25 25 50 75 100 125 
TEMPERATURE (°C) 



I 

A v = -2 












Rl 


= 10 


( 








Tj 


= 125°C" 
















;. = i 
















1 
















V 
















= -J 


J o 











































































4 8 12 16 20 24 28 32 
TOTAL SUPPLY VOLTAGE (V) 




100 1000 
CAPACITIVE LOAD (pF) 



10000 



Undistorted Output Swing 
vs Frequency, V s = 5V 




Undistorted Output Swing 
vs Frequency, Vs = ±15V 




Total Harmonic Distortion and 
Noise vs Frequency 



1k 10k 100k 

FREQUENCY (Hz) 



1k 10k 100k 

FREQUENCY (Hz) 




100 1k 10k 

FREQUENCY (Hz) 



2-168 



LT1211/LT1212 



tvpichl P€RFonmnnc€ CHnRnacmsTics 



Open-Loop Voltage Gain 
vs Supply Voltage 





6k 


> 

E 


5k 






< 


4k 


CD 




CD 




< 


3k 






O 
> 




a. 

o 


IV 


c 








LiJ 


1k 


o 








I 

B, -9\t 






























































= -5 
































^% 


= 25 


°c 
































= 1 













































































4 8 12 16 20 24 28 32 36 
TOTAL SUPPLY VOLTAGE (V) 



Open-Loop Gain, V s = 5V 




12 3 4 
OUTPUT (V) 



Positive Output Saturation 
Voltage vs Temperature 




-25 25 50 75 100 125 
TEMPERATURE (°C) 



Voltage Gain vs Load Resistance 




10 100 1k 

LOAD RESISTANCE (Si) 



Open-Loop Gain, V S = ±15V 



Rl = 2k 



Rl. 
500£i 



OUTPUT (V) 



10 

1211/12 G?Q 



Negative Output Saturation 
Voltage vs Temperature 




-50 -25 25 50 75 100 125 
TEMPERATURE (°C) 

,211/12 G21 



Channel Separation vs Frequency 




Output Short-Circuit Current 
vs Temperature 

























\ V 


S = 5V 
0URCI 


NG 






v s = ± 

OURC 
RSIN 


15V^ 


\s 




c 


NG 
KING 








/ 

























































-25 25 50 75 100 125 
CASE TEMPERATURE (°C) 



Output Impedance vs Frequency 




10k 100k 1M 10M 

FREQUENCY (Hz) 



u\sm 



2-169 



LT1211/LT1212 

tvpicrl p€RFORmnnc€ CHnnnaemsTics 



5V Small-Signal Response 




100ns/DIV 

V S = 5V 

Av = 1 1211/12G25 



±15V Small-Signal Response 




100ns/DIV 

V S = ±15V 

Ay=1 1211/12621 



5V Large-Signal Response 




500ns/DIV 

V S = 5V 

Ay = 1 1811/12626 



+15V Large-Signal Response 




2HS/DIV 

V S = ±15V 

Ay = 1 1211/12 629 



5V Large-Signal Response 




500ns/DIV 



V S = 5V 
A» = -1 
R F = R e = 1k 

Cf = 20pF 1211/12 627 



±15V Large-Signal Response 




2MS/OIV 

V S = ±15V 
A v = -1 

RF = RG = 1k 1211/126J0 



Settling Time to 0.01% 

5V Settling ±15V Settling vs Output Step 




SETTLING TIME ftis) 

1211/12 6J3 



2-170 



LT1211/LT1212 



TVPicni p€RFORmnnc€ cHiMncT€MSTics 



Supply Current vs Supply Voltage 



Supply Current vs Temperature 



Warm-Up Drift vs Time 



















1 

= 125"C- 
















T A 


















= 25°C - 
















•T A 
















































Ta 


= -5 


: 






i 













































































12 3 4 

SUPPLY VOLTAGE (V) 



Input Bias Current vs Temperature 





'00 




90 


< 






SO 






— 


70 












60 










»PU 


50 




40 




30 



v s = 


5V 


































































X 








-Ib" 






los 














T 



-50 -25 25 50 75 
TEMPERATURE CQ 



100 125 













































's 




5V 






















— 






















































_ 























































































































































-50 -25 



25 50 75 100 125 
TEMPERATURE (*C) 



Input Bias Current vs 
Common-Mode Voltage 



-V 


= 5 


/ 






































































Ts 


= 25°C 














1Z5'C 
















r A = 


-55 


















■c- 







































































1 2 ,3 

COMMON-MODE VOLTAGE (V) 



2 


III 
= 5V 










to 


AL 


MP 


IF!F 










































































\. 















































































10 20 30 40 
TIME AFTER POWER-UP (SEC) 

Common-Mode Range 
vs Temperature 



: v*-2 
i 

I V"+1 



25 50 75 
TEMPERATURE (X) 




xrunas 



2-171 



LT1211/LT1212 



npPLicflTions infOfimflTion 

Supply Voltage 

The LT1211/LT1212 op amps are fully functional and all 
internal bias circuits are in regulation with 2.2V of supply. 
The amplifiers will continue to function with as little as 
1.5V, although the input common-mode range and the 
phase margin are about gone. The minimum operating 
supply voltage is guaranteed by the PSRR tests which are 
done with the input common mode equal to 500mV and a 
minimum supply voltage of 2.5V. The LT1 21 1 /LT1 21 2 are 
guaranteed over the full -55°C to 125°C range with a 
minimum supply voltage of 2.5V. 

The positive supply pin of the LT1 21 1/LT1 21 2 should be 
bypassed with a small capacitor (about 0.01 uf) within an 
inch of the pin. When driving heavy loads and for good 
settling time, an additional 4.7|iF capacitor should be 
used. When using split supplies, the same is true for the 
negative supply pin. 

Power Dissipation 

The LT121 1/LT1212 amplifiers combine high speed and 
large output current drive into very small packages. Be- 
cause these amplifiers work overa very wide supply range, 
it is possible to exceed the maximum junction temperature 
under certain conditions. To insure that the LT1211/ 
LT1 21 2 are used properly, calculate the worst case power 
dissipation, define the maximum ambient temperature, 
select the appropriate package and then calculate the 
maximum junction temperature. 

The worst case amplifier power dissipation is the total of 
the quiescent current times the total power supply voltage 
plus the power in the IC due to the load. The quiescent 
supply current of the LT1 21 1/LT1 21 2 has a positive tem- 
perature coefficient. The maximum supply current of each 
amplifier at 125°C is given by the following formula: 

Ismax = 2.5 + 0.036 x (V s - 5) in mA 

Vs is the total supply voltage. 

The power in the IC due to the load is a function of the 
outputvoltage.thesupplyvoltageandload resistance. The 
worst case occurs when the output voltage is at half 
supply, if it can go that far, or its maximum value if it 
cannot reach half supply. 



For example, calculate the worst case power dissipation 
while operating on ±1 5V supplies and driving a 500Q load. 

Ismax = 2.5 + 0.036 x (30 -5) = 3.4mA 

Pdmax = 2 x V s x Ismax + (Vs - Vomax) x Vomax/Rl 

Pdmax = 2 x 1 5V x 3.4mA + (15V- 7.5V) x 7.5V/500 

= 0.102 + 0.113 = 0.215W per Amp 

If this is the quad LT1 21 2, the total power in the package 
is four times that, or 0.860W. Now calculate how much the 
die temperature will rise above the ambient. The total 
power dissipation times the thermal resistance of the 
package gives the amount of temperature rise. For this 
example, in the SO surface mount package, the thermal 
resistance is 100°C/W junction-to-ambient in still air. 

Temperature Rise = P DM ax x 9ja = 0.860W x 1 00°C/W 

= 86°C 

The maximum junction temperature allowed in the plastic 
package is 150°C. Therefore the maximum ambient al- 
lowed is the maximum junction temperature less the 
temperature rise. 

Maximum Ambient = 150°C - 86°C = 64°C 

That means the SO quad can only be operated at or below 
64°C on ±15V supplies with a 500Q load. 

As a guideline to help in the selection of the LT1 21 1/ 
LT1 21 2, the following table describes the maximum sup- 
ply voltage that can be used with each part based on the 
following assumptions: 

1 . The maximum ambient is 70°C or 1 25°C depending 
on the part rating. 

2. The load is 500Q, includes the feedback resistors. 

3. The output can be anywhere between the supplies. 



PART 


MAX SUPPLIES 


MAX POWER AT MAX T A 


LT1211MJ8 


19.5V or +1 6.4V 


500mW 


LT1211CN8 


25.2V or ±1 8.0V 


800mW 


LT1211CS8 


20.3V or ±17.1 V 


533mW 


LT1212CN 


21.0V or +1 7.8V 


1143mW 


LT1212CS 


17.3V or ±1 4.4V 


800mW 



2-172 



LT1211/LT1212 



nppLicflTions inFORmnnon 

Inputs 

Typically, at room temperature, the inputs of the LT1211/ 
LT1212 can common mode 400mV below ground (V - ) 
and to within 1 .2V of the positive supply with the amplifier 
still functional. However the input bias current and offset 
voltage will shift as shown in the characteristic curves. For 
full precision performance, the common-mode range 
should be limited between ground (V") and 1 .5V belowthe 
positive supply. 

When either of the inputs is taken below ground (V") by 
more than about 700mV, that input bias current will 
increase dramatically. The current is limited by internal 
1 0OQ resistors between the input pins and diodes to each 
supply. The output will remain low (no phase reversal) for 
inputs 1 ,3V below ground (V"). If the output does not have 
to sink current, such as in a single supply system with a 1 k 
load to ground, there is no phase reversal for inputs up to 
8V below ground. 

There are no clamps across the inputs of the LT1211/ 
LT1212 and therefore each input can be forced to any 
voltage between the supplies. The input current will re- 
main constant at about 60nA over most of this range. 
When an input gets closerthan 1 .5Vto the positive supply, 
that input current will gradually decrease to zero until the 
input goes above the supply, then it will increase due to the 
previously mentioned diodes. If the inverting input is held 
more positive than the noninverting input by 200mV or 
more, while at the same time the noninverting input is 
within 300mV of ground (V"), then the supply current will 
increase by 1mA and the noninverting input current will 
increase to about 10uA. This should be kept in mind in 
comparator applications where the inverting input stays 
above ground (V - ) and the noninverting input is at or near 
ground (V"). 

Output 

The output of the LT1211/LT1212 will swing to within 
0.60V of the positive supply with no load. The open-loop 
output resistance, when the output is driven hard into the 



positive rail, is about 1 QOQ. as the output starts to source 
current; this resistance drops to about 25£2as the current 
increases. Therefore when the output sources 1mA, the 
output will swing to within 0.7V of the positive supply. 
While sourcing 20mA, it is within 1.1V of the positive 
supply. 

The output of the LT1 21 1 /LT1 21 2 will swing to within 3mV 
of the negative supply while sinking zero current. Thus, in 
a typical single supply application with the load going to 
ground, the output will go to within 3mV of ground. The 
open-loop output resistance when the output is driven 
hard into the negative rail is about 44Qat low currents and 
reduces to about 24Q at high currents. Therefore, when 
the output sinks 1 mA, the output is about 42mV above the 
negative supply and while sinking 20mA, it is about 
480mV above it. 

The output of the LT1211/LT1212 has reverse-biased 
diodes to each supply. If the output isforced beyond either 
supply, unlimited currents will flow. If the current is 
transient and limited to several hundred mA, no damage 
will occur. 

Feedback Components 

Because the input currents of the LT1 21 1/LT1 21 2 are less 
than 125nA, it is possible to use high value feedback 
resistors to set the gain. However, care must be taken to 
insure that the pole that is formed by the feedback resis- 
tors and the input capacitance does not degrade the 
stability of the amplifier. For example, if a single supply, 
noninverting gain of two is set with two 20k resistors, the 
LT1 21 1/LT1 21 2 will probably oscillate. This is because 
the amplifier goes open-loop at 3MHz (6dB of gain) and 
has 50° of phase margin. The feedback resistors and the 
10pF input capacitance generate a pole at 1.6MHz that 
introduces 63° of phase shift at 3MHz! The solution is 
simple; use lower value resistors or add a feedback 
capacitor of 10pF or more. 



2-173 



LT1211/LT1212 



nppucmions inFonmnTion 

Comparator Applications 

Sometimes it is desirable to use an op amp as a compara- 
tor. When operating the LT1 21 1 /LT1 21 2 on a single 3.3V 

andCMOstgic.° UPU 6 V 

The response time of the LT1 21 1/LT1 21 2 is a strong 
function of the amount of input overdrive as shown in the 



following photos. These amplifiers are unity-gain stable 
op amps and not fast comparators, therefore, the logic 
being driven may oscillate due to the long transition time. 
The output can be speeded up by adding 20mV or more of 
hysteresis (positive feedback), but the offset is then a 
function of the input direction. 



LT1211 Comparator Response (+) 
20mV, 10mV, 5mV, 2mV Overdrives 




V S = 5V 



5ns/DIV 



LT1211 Comparator Response [-) 
20mV, 10mV, 5mV, 2mV Overdrives 




V S = 5V 
R L = oo 



5jjs/DIV 



simpuFKD scHemnnc 



■H5 



QgJ- 

r 



^1 a 



R F ^ 




□ out 



2-174 



xtudsi 



LT1211/LT1212 



TVPICflL fiPPLICflTIOnS 



Single Supply, 100kHz, 4th Order Butterworth Lowpass Filter 




12-BIT ACCURATE SIGNAL RANGE FROM 6mV TO 1.8V ON 3.3V SINGLE SUPPLY 
MAXIMUM OUTPUT OFFSET ERROR IS 676nV. 

FOR EACH 2ND ORDER SECTION: 



W QC1 



100k 1M 
FREQUENCY (Hz) 



1A Voltage-Controlled Current Source 



1A Voltage-Controlled Current Sink 



v» 



1k 

Vin — WSr- 



SB 
-Wr 



/2\. I 100£2 I I— I 




t r < 1^s 



Si9430DY 
P-CHANNEL 



lOUT 



Vim- 




t r <1ns 



irwm 



2-175 



urn 



LT1213/LT1214 



TECHNOLOGY 



28MHz, 12V/lls, Single Supply 
Dual and Quad 
Precision Op Amps 



F€RTUR€S 



■ Slew Rate 12V/|jsTyp 

■ Gain-Bandwidth Product 28MHz Typ 

■ Fast Settling to 0.01% 

2V Step to 200uV 500ns Typ 

10V Step to 1mV 1.1ns Typ 

■ Excellent DC Precision in All Packages 

Input Offset Voltage 275nVMax 

Input Offset Voltage Drift 6|iV/°C Max 

Input Offset Current 40nAMax 

Input Bias Current 200nA Max 

Open-Loop Gain 1200V/mV Min 

■ Single Supply Operation 

Input Voltage Range Includes Ground 

Output Swings to Ground While Sinking Current 

■ Low Input Noise Voltage 10nV/VHzTyp 

■ Low Input Noise Current 0.2pA/VHz Typ 

■ Specified at 3.3V, 5V and ±15V 

■ Large Output Drive Current 30mA Min 

■ Low Supply Current per Amplifier 3.5mA Max 

■ Dual in 8-Pin DIP and SO-8 

■ Quad in 14-Pin DIP and NARROW SO-16 

Note: For applications requiring higher slew rate, see the LT1215/LT1216 
data sheet. For lower power and lower slew rate, see the LT1 21 1/LT1 21 2 data 
sheet. 



D€SCRIPTIOn 

The LT1 21 3 is a dual, single supply precision op amp with 
a 28MHz gain-bandwidth product and a 1 2V/us slew rate. 
The LT1214 is a quad version of the same amplifier. The 
DC precision of the LT1213/LT1214 eliminates trims in 
most systems while providing high frequency perfor- 
mance not usually found in single supply amplifiers. 

The LT1213/LT1214 will operate on any supply greater 
than 2.5V and less than 36V total. These amplifiers are 
specified at single 3.3V, single 5V and ±1 5V supplies, and 
only require 2.7mA of quiescent supply current per ampli- 
fier. The inputs can be driven beyond the supplies without 
damage or phase reversal of the output. The minimum 
output drive is 30mA, ideal for driving low impedance 
loads. 



RPPLICRTIOnS 

■ 2.5V Full-Scale 12-Bit Systems 

■ 10V Full-Scale 16-Bit Systems 

■ Active Filters 

■ Photodiode Amplifiers 

■ DAC Current-to-Voltage Amplifiers 

■ Battery-Powered Systems 



V os < 0.45LSB 
V 0S < 1.8LSB 



TVPicfiL nppucOTion 

Single Supply 3-Pole 1MHz Butterworth Filler 



R3 R2 
680S2 680S2 
V|N — W. » Wv 
_LC3 
— T~ 390pF 



A v = 2 

MAXIMUM OUTPUT OFFSET = 714(iV 




' « Wv-» 

km L| \J 

-±- 5pF 



VOUT 



10 


-10 
S> -20 

S -30 
-40 
-50 



Frequency Response 




10k 100k 1M 10M 

FREQUENCY (Hz) 



1213JMTM2 



2-176 



XTUIK38 



LT1213/LT1214 



rbsoiut€ maximum RRTinGs 

Total Supply Voltage (V + to V") 36V 

Input Current ±15mA 

Output Short-Circuit Duration (Note 1) Continuous 

Operating Temperature Range 

LT1213C/LT1214C -40°Cto85°C 

LT1213M -55°Cto125°C 



Storage Temperature Range -65°C to 150°C 

Junction Temperature (Note 2) 

Plastic Package (N8, S8, N, S) 150°C 

Ceramic Package (J8) 175°C 

Lead Temperature (Soldering, 10 sec) 300°C 



PRCKnG€/ORD€R inFORfTIRTIOn 



OUT A [T 
-IN A [T 
+INA \J 
r [J 



TOP VIEW 
— C7 



T| v* 

T\ OUTB 
J] -IN B 
T\ +INB 



J8 PACKAGE N8 PACKAGE 

i-LEAD CERAMIC DIP 8-LEAD PLASTIC DIP 



Tj MA x = 175°C,9 JA = 100°C/W{J) 
T JMAX = 150°C, e Jft = 100°C/W(N) 



ORDER PART 
NUMBER 



LT1213CN8 
LT1213ACN8 
LT1213MJ8 
LT1213AMJ8 




S8 PACKAGE 
8-LEAD PLASTIC SOIC 



Tjmax=150°C, 9 JA = 150°C/W 



ORDER PART 
NUMBER 



LT1213CS8 



S8 PART MARKING 



1213 




ORDER PART 
NUMBER 



LT1214CN 



Te] outd 

15] -IN D 



N PACKAGE 
14-LEAD PLASTIC DIP 



T JMA x = 150°C,e JA = 70"C/W 




S PACKAGE 
16-LEAD PLASTIC SOIC 

TjMAX = 150°C,e JA = 100"C/W 



ORDER PART 
NUMBER 



LT1214CS 



Consult factory for Industrial grade parts. 



RVRILRBLC OPTIOHS 





PACKAGE 


NUMBER OF 
OP AMPS 


T fl RANGE 


MAX V os (25°C) 


MAX TC V os 

(AV s/AT) 


CERAMIC DIP 
(J) 


PLASTIC DIP 
(N) 


SURFACE MOUNT 

(S) 


Two (Dual) 


-40°Cto 85°C 


150uV 


1 .5|iV/°C 




LT1213ACN8 








275|aV 


3m-V/°C 




LT1213CN8 








275liV 


6mV/°C 






LT1213CS8 


Two (Dual) 


-55°Cto125°C 


150(iV 


1.5(iV/°C 


LT1213AMJ8 










275p.V 


3nV/°C 


LT1213MJ8 






Four (Quad) 


-40°C to 85°C 


275U.V 


6u.V/°C 




LT1214CN 


LT1214CS 



2-177 



LT1213/LT1214 



5V €l€CTRICfll CHARACTERISTICS 

V s = 5V. V C m = 0.5V, Vqlt = 0.5V, T A = 25 C. unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS 


MIN 


LT1213AC 
LT1213AM 
TYP 


MAX 


LT1213C/LT1213M 
LT1214C 
MIN TYP MAX 


UNITS 


Vnc 
v OS 


Input Offset Voltage 






75 


150 




100 


275 


uV 


AVqS 

f Tifne 


Long-Term Input Offset 
Voltage Stability 





0.5 


0.6 


HV/MO 


'os 


Innut Offcpt P.nrrpnt 

1 1 1 U U 1 \J 1 1 L U II CI L 






5 


30 




5 


40 


nA 


Id 

B 


Innut Ria<; Hnrrpnt 

lll|JUI Uluo UUIICIIl 




80 160 




100 


200 


nA 




Innut Nnkp Vnltanp 

input ivuioc uuiiayc 


1 Hz to 1 0Hz 


200 


200 


nVp p 


e n 


Input Noise Voltage Density 


f = 10Hz 
f = 1000Hz 


10 
10 


10 
10 


nV/VHz 
nVNHz 


in 


Input Noise Current Density 


fo = 10Hz 
f = 1000Hz 


0.9 
0.2 


0.9 
0.2 


pA/VHz 
pA/VHz 




Input Resistance (Note 3) 


Differential Mode 
Common Mode 


10 


40 
200 




10 


40 
200 




MSI 

Mn 




Input Capacitance 


f = 1MHz 


10 


10 


PF 




Input Voltage Range 




3.5 



3.8 
-0.3 




3.5 



3.8 
-0.3 




V 

w 

V 


TMRR 


UUINIIIUII IVIUUc ncJCbUUH ndUU 


■CM ~ uv llJ -J-3V 


90 


105 




86 105 


HR 
UD 


P^RR 


ruwci ouppiy ncJcOUUN ndUU 


\l„ - O M/ tn 19 R\/ 
Vg — £.OV IU I C.OV 


93 


116 




90 


116 




HR 
OB 


AyrjL 


LarQe~Si(jnal Voltage Gain 


vq — u.uo v iu o./v, nL — ouuii 


250 


850 




250 


850 




v/mv 




ividAiiiiuiii uuipui VUKdyc owiiiy 

(Note 4) 


flntnnt Hinh Mn 1 nori 
UULpUl niyil, IMU LUdU 

OutDut Hiah kniiRrp = 1mA 
Output High, IsouRCE = 20mA 


4.30 
4.20 
3.80 


4.39 
4.30 
3.92 




4.30 
4.20 
3.80 


4.39 
4.30 
3.92 




V 

v 

V 






Output Low, No Load 
Output Low, Isink = 1mA 
Output Low, I S ink = 20mA 




0.004 
0.033 
0.475 


0.007 
0.050 
0.620 




0.004 
0.033 
0.475 


0.007 
0.050 
0.620 


V 
V 
V 


lo 


Maximum Output Current 


(Note 9) 


±30 


±50 




±30 


±50 




mA 


SR 


Slew Rate 


Ay = -2 


8.5 


S5 


V/ps 


GBW 


Gain-Bandwidth Product 


f = 100kHz 


26 


26 


MHz 


Is 


Supply Current per Amplifier 




2.0 


2.7 


3.8 


2.0 


2.7 


3.8 


mA 




Minimum Supply Voltage 


Single Supply, V C m = 0V 




2.2 


2.5 




2.2 


2.5 


V 




Full Power Bandwidth 


A v = 1,V = 2.5Vp.p 


1.0 


1.0 


MHz 


tr.tf 


Rise Time, Fall Time 


A v = 1,10%to90%,V o = 100mV 


24 


24 


ns 


OS 


Overshoot 


A v = 1,V = 100mV 


30 


30 


% 


tpD 


Propagation Delay 


Av = 1,V = 100mV 


17 


17 


ns 


ts 


Settling Time 


0.01%, A V = 1,AV = 2V 


500 


500 


ns 




Open-Loop Output Resistance 


Irj = 0mA, f = 10MHz 


50 


50 


n 


THD 


Total Harmonic Distortion 


A V = 1,V = 1V RMS , 20Hz to 20kHz 


0.001 


0.001 


% 



2-178 



LT1213/LT1214 



5V €L€CTRICm CHflRACTCRISTICS 

Vs = 5V, V CM = 0.5V, Vqut = 0.5V, 0°C < T A < 70°C, unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS 


MIN 


LT1213AC 
TYP 


MAX 


LT1213C/LT1214C 
MIN TYP MAX 


UNITS 


Vos 


Input Offset Voltage 






100 


175 




150 


375 


uV 


AV 0S 
AT 


Input Offset Voltage Drift 
(Note 3) 


8-Pin DIP Package 
14-Pin DIP, SOIC Package 




0.7 


1.5 




1 

2 


3 
6 


HV/°C 

nv/°c 


'os 


Inn i it ntfcipt Purrpnt 

1 1 ipUl U 1 lOGl UUI 1 CI 1 1 






10 


45 




10 


55 


nA 


k 


Input Bias Current 






90 


190 




110 


230 


nA 




Input Voltage Range 




3.4 
0.1 


3.5 
-0.1 




3.4 
0.1 


3.5 
-0.1 




V 
V 


CMRR 


Common-Mode Rejection Ratio 


V CM = 0.1V to 3.4V 


89 105 


85 


105 




dB 


PSRR 


Power Supply Rejection Ratio 


V s = 2.5V to 12.5V 


92 


114 




89 114 


dB 


AvOL 


Large-Signal Voltage Gain 


V = 0.05Vto3.7V, R L = 500Q 


200 


580 




200 


580 




V/mV 




Maximum Output Voltage Swing 
(Note 4) 


Output High, No Load 
Output High, l S ouRCE = 1rnA 
Output High, lsouRCE = 1 5mA 


4.20 
4.10 
3.84 


4.33 
4.25 
3.96 




4.20 
4.10 
3.84 


4.33 
4.25 
3.96 




V 
V 
V 






Output Low, No Load 
Output Low, Isink = 1 
Output Low, Isink = 15mA 




0.005 
0.036 
0.370 


0.008 
0.055 
0.530 




0.005 
0.036 
0.370 


0.008 
0.055 
0.530 


V 
V 
V 


Is 


Supply Current per Amplifier 




1.8 


2.9 


4.0 


1.8 


2.9 


4.0 


mA 



Vs = 5V, V CM = 0.5V, Vqut = 0.5V, -40°C < T A < 85°C, unless otherwise noted. (Note 5) 



SYMBOL 


PARAMETER 


CONDITIONS 


MIN 


LT1213AC 
TYP 


MAX 


LT1213C/LT1214C 
MIN TYP MAX 


UNITS 


Vos 


Input Offset Voltage 






120 


200 




175 


500 




AV 0S 
AT 


Input Offset Voltage Drift 
(Note 3) 


8-Pin DIP Package 
14-Pin DIP, SOIC Package 




0.7 


1.5 




1 

2 


3 
6 


nw°c 
nw°c 


■os 


Input Offset Current 






15 


50 




20 


75 


nA 


If) 


Input Bias Current 






100 


200 




120 


250 


nA 




Input Voltage Range 




3.1 
0.2 


3.2 





3.1 
0.2 


3.2 





V 
V 


CMRR 


Common-Mode Rejection Ratio 


V CM = 0.2V to 3.1V 


88 


104 




84 


104 




dB 


PSRR 


Power Supply Rejection Ratio 


V s = 2.5V to 12.5V 


91 


113 




88 113 


dB 


AvOL 


Large-Signal Voltage Gain 


V = 0.05V to 3.7V, R L = 500n 


200 


510 




200 


510 




V/mV 




Maximum Output Voltage Swing 
(Note 4) 


Output High, No Load 
Output High, lsouRCE = 1mA 
Output High, lsouRCE = 15mA 


4.15 
4.00 
3.72 


4.25 
4.16 
3.89 




4.15 
4.00 
3.72 


4.25 
4.16 
3.89 




V 
V 
V 






Output Low, No Load 
Output Low, lsiNk = 1mA 
Output Low, Isink = 15mA 




0.006 
0.037 
0.380 


0.009 
0.060 
0.550 




0.C06 
0.037 
0.380 


0.009 
0.060 
0.550 


V 
V 
V 


Is 


Supply Current per Amplifier 




1.5 


2.9 


4.0 


1.5 


2.9 


4.0 


mA 



JL-7 UIInsloB 



2-179 



LT1213/LT1214 



5V €l€CTRICfll CHRRRCT€RISTICS 



Vs = 5V, V CM = 0.5V, Vqut = 0-5V, -55°C < T A < 125°C, unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS 


MIN 


LT1213AM 
TYP 


MAX 


MIN 


LT1213M 
TYP 


MAX 


UNITS 


Vos 


Input Offset Voltage 






140 


250 




200 


500 


u.V 


AV 0S 
AT 


Input Offset Voltage Drift 
(Note 3) 






0.7 


1.5 




1.0 


3.0 


uWC 




Input Offset Current 






20 


70 




25 


100 


nA 


Ij 


Input Bias Current 






105 


210 




125 


275 


nA 




Input Voltage Range 




3.1 
0.4 


3.2 
0.2 




3.1 
0.4 


3.2 
0.2 




V 
V 


CMRR 


Common-Mode Rejection Ratio 


V CM = 0.4Vto 3.1V 


87 


104 




83 


104 




dB 


PSRR 


Power Supply Rejection Ratio 


V s = 2.5V to 12.5V 


90 


113 




87 


113 




dB 




Large-Signal Voltage Gain 


V = 0.05V to 3.7V, R L = 500O 


150 


300 




150 


300 




V/mV 




Maximum Output Voltage Swing 
(Note 4) 


Output High, No Load 
Output High, I S ource = 1mA 
Output High, Isource = 15mA 


4.05 
3.90 
3.60 


4.20 
4.10 
3.80 




4.05 
3.90 
3.60 


4.20 
4.10 
3.80 




V 
V 
V 






Output Low, No Load 
Output Low, I S ink = 1mA 
Output Low, l S | NK = 15mA 




0.007 
0.040 
0.400 


0.012 
0.070 
0.750 




0.007 
0.040 
0.400 


0.012 
0.070 
0.750 


mV 
mV 
mV 


is 


Supply Current per Amplifier 




1.3 


3.0 


4.2 


1.3 


3.0 


4.2 


mA 



±15V €l€CTRICfll CHRRRCT€RISTICS 

V s = ±15V, V CM = OV, V 0UT = 0V, T A = 25°C, unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS 


MIN 


LT1213AC 
LT1213AM 
TYP 


MAX 


LT1213C/LT1213M 
LT1214C 
MIN TYP MAX 


UNITS 


Vos 


Input Offset Voltage 






125 


400 




150 


550 


U.V 


bs 


Input Offset Current 






5 


30 




5 


40 


nA 


Ib 


Input Bias Current 






70 


150 




90 


190 


nA 




Input Voltage Range 




13.5 
-15.0 


13.8 
-15.3 




13.5 
-15.0 


13.8 
-15.3 




V 
V 


CMRR 


Common-Mode Rejection Ratio 


V CM = -15V to 13.5V 


90 


107 




86 107 


dB 


PSRR 


Power Supply Rejection Ratio 


V s = ±2Vto±18V 


93 


116 




90 


116 




dB 


Avol 


Large-Signal Voltage Gain 


V o = 0Vto±10V, R L = 2k 


1200 


4000 




1200 


4000 




V/mV 




Maximum Output Voltage Swing 


Output High, Isource = 20mA 


13.7 


13.9 




13.7 


13.9 




V 






Output Low, I S ink = 20mA 


-14.3 


-14.5 




-14.3 


-14.5 




V 


b 


Maximum Output Current 


(Note 9) 


±30 


±50 




±30 


±50 




mA 


SR 


Slew Rate 


A v = -2(Note6) 


10 


12 




10 


12 




V/us 


GBW 


Gain-Bandwidth Product 


f = 100kHz 


15 


28 




15 


28 




MHz 


k 


Supply Current per Amplifier 




2.0 


3.4 


4.7 


2.0 


3.4 


4.7 


mA 




Channel Separation 


V = ±10V.R L = 2k 


128 


140 




128 


140 




dB 




Minimum Supply Voltage 


Equal Split Supplies 




±1.2 


±2.0 




±1.2 


±2.0 


V 




Full-Power Bandwidth 


Ay = 1,V = 20V P .p 


150 


150 


kHz 




Settling Time 


0.01%, A v = 1, AV = 10V 


1.1 


1.1 


US 



2-180 



XTUEflB 



LT1213/LT1214 



±15V CLCCTRICRL CHflRflCTCMSTICS 



V s = +15V, V C m = OV, V ut = OV, 0°C < T A < 70°C, unless otherwise noted. 



OI IVIDUL 


PARAMPTFR 
rHUHIYlE 1 Cn 


ouiiui i luno 


MIN 


LT1 Z1 3AC 
TYP 


MAX 


LT1213C/LT1214C 
MIN TYP MAX 


UNITS 


w 

Vos 


Input Offset Voltage 






I DU 






200 


650 


uv 


AVos 
AT 


input unset voltage uriu 
(Note 3) 


Din niD Dn/.Lnnn 

o-rin uir racKage 
14-Pin DIP, SOIC Package 




n 7 


I ,J 




1 

2 


3 
6 


i i\//°r 
uv/ 

uV/°C 


los 


Input Offset Current 






10 


35 




10 


45 


nA 


Ib 


Input Bias Current 






90 


160 


95 200 


nA 




Input Voltage Range 




13.4 
-14.9 


13.5 
-15.1 




13.4 
-14.9 


13.5 
-15.1 




V 
V 


CMRR 


Common-Mode Rejection Ratio 


V CM = -14.9V to 13.4V 


89 


105 




85 


105 




dB 


PSRR 


Power Supply Rejection Ratio 


V s = ±2Vto±18V 


92 


115 




89 115 


dB 


AvOL 


Large-Signal Voltage Gain 


V o = 0Vto±10V, R L = 2k 


1000 


4000 




1000 


4000 




V/mV 




Maximum Output Voltage Swing 


Output High, Isource = 15mA 


13.8 


14.0 




13.8 


14.0 




V 






Output Low, Isink = 15mA 


-14.4 


-14.6 




-14.4 


-14.6 




V 


Is 


Supply Current per Amplifier 




1.8 


3.7 


5.0 


1.8 


3.7 


5.0 


mA 


V s = ±15V, V CM = OV, Vqut = OV, -40°C < T A < 85°C, unless otherwise noted. (Note 5) 


SYMBOL 


PARAMETER 


CONDITIONS 


MIN 


LT1213AC 
TYP 


MAX 


LT1213C/LT1214C 
MIN TYP MAX 


UNITS 


Vos 


Input Offset Voltage 






175 


450 




250 


700 


uV 


AV 0S 
AT 


Input Offset Voltage Drift 
(Note 3) 


8-Pin DIP Package 
14-Pin DIP, SOIC Package 




0.7 


1.5 




1 

2 


3 
6 


uV/°C 
uWC 


los 


Input Offset Current 






10 


40 




20 


75 


nA 


Ib 


Input Bias Current 






95 


180 




105 


220 


nA 




Input Voltage Range 




13.1 
-14.8 


13.2 
-15.0 




13.1 
-14.8 


13.2 
-15.0 




V 
V 


CMRR 


Common-Mode Rejection Ratio 


V CM = -14.8V to 13.1V 


88 104 


84 


104 




dB 


PSRR 


Power Supply Rejection Ratio 


V S = ±2V to ±1 8V 


91 


114 




88 114 


dB 


AvOL 


Large-Signal Voltage Gain 


V = OV to ±1 OV, Rl = 2k 


1000 


4000 




1000 


4000 




V/mV 




Maximum Output Voltage Swing 


Output High, Isource = 15mA 


13.7 


13.9 




13.7 


13.9 




V 






Output Low, Isink = 15mA 


-14.4 


-14.6 




-14.4 


-14.6 




V 


is 


Supply Current per Amplifier 




1.5 


3.7 


5.1 


1.5 


3.7 


5.1 


mA 


V s = ±15V, V CM = OV, Vqut = OV, -55°C < T A < 125°C, unless otherwise noted. 


SYMBOL 


PARAMETER 


CONDITIONS 


MIN 


LT1213AM 
TYP 


MAX 


MIN 


LT1213M 
TYP 


MAX 


UNITS 


Vos 


Input Offset Voltage 






200 


500 




300 


800 


uV 


AV 0S 
AT 


Input Offset Voltage Drift 
(Note 3) 






0.7 


1.5 


1 3 


u.V/°C 


los 


Input Offset Current 






15 


60 




25 


90 


nA 


Ib 


Input Bias Current 






100 


200 




110 


250 


nA 




Input Voltage Range 




13.1 
-14.6 


13.2 
-14.8 




13.1 
-14.6 


13.2 
-14.8 




V 
V 


CMRR 


Common-Mode Rejection Ratio 


V CM = -14.6V to 13.1V 


87 


104 




83 


104 




dB 


PSRR 


Power Supply Rejection Ratio 


V s = ±2Vto±15V 


90 


114 




87 


114 




dB 


AvOL 


Large-Signal Voltage Gain 


V o = 0Vto±10V, Rl = 2k 


800 


1100 




800 


1100 




V/mV 




Maximum Output Voltage Swing 


Output High, Isource = 15mA 


13.6 


13.8 




13.6 


13.8 




V 






Output Low, Isink = 15mA 


-14.2 


-14.5 




-14.2 


-14.5 




V 


Is 


Supply Current per Amplifier 




1.3 


4.0 


5.4 


1.3 


4.0 


5.4 


mA 



2-181 



LT1213/LT1214 



3.3V €l€CTRICm CHflRflCT€RISTICS 



V s = 3.3V, V C m = 0.5V, Vqut = 0.5V, T A = 25 C. unless otherwise noted. (Note 7) 



SYMBOL 


PARAMETER 


CONDITIONS 


LT1213AC 
LT1213AM 
MIN TYP MAX 


LT1213C/LT1213M 
LT1214C 
MIN TYP MAX 


UNITS 


Vos 


Input Offset Voltage 




75 150 


100 275 


uV 




Input Voltage Range (Note 8) 




1.8 2.1 
-0.3 


1.8 2.1 
-0.3 


V 
V 




Maximum Output Voltage Swing 


Output High, No Load 
Output High, Isource = 1mA 
Output High, Isource = 20mA 


2.60 2.69 
2.50 2.60 
2.10 2.22 


2.60 2.69 
2.50 2.60 
2.10 2.22 


V 
V 
V 


Output Low, No Load 
Output Low, Isink = 1mA 
Output Low. I S ink = 20mA 


0.004 0.007 
0.033 0.050 
0.475 0.620 


0.004 0.007 
0.033 0.050 
0.475 0.620 


V 
V 
V 


Id 


Maximum Output Current 




±30 ±50 


±30 ±50 


mA 


V s = 3.3V, V CM = 0.5V, Vqut = 0.5V, 0°C < T A < 70°C, unless otherwise noted. (Note 7) 


SYMBOL 


PARAMETER 


CONDITIONS 


LT1213AC 
MIN TYP MAX 


LT1213C/LT1214C 
MIN TYP MAX 


UNITS 


Vos 


Input Offset Voltage 




100 175 


150 375 


nv 




Input Voltage Range (Note 8) 




1.7 1.8 
0.1 -0.1 


1.7 1.8 
0.1 -0.1 


V 
V 




Maximum Output Voltage Swing 


Output High, No Load 
Output High, Isource = 1mA 
Output High, Isource = 15mA 


2.50 2.63 
2.40 2.55 
2.14 2.26 


2.50 2.63 
2.40 2.55 
2.14 2.26 


V 
V 
V 


Output Low, No Load 
Output Low, Isink = 1mA 
Output Low, Isink = 1 5mA 


0.005 0.008 
0.037 0.055 
0.400 0.530 


0.005 0.008 
0.037 0.055 
0.400 0.530 


V 
V 
V 


V s = 3.3V, V CM = 0.5V, V 0UT = 0.5V, -40°C < T A < 85°C, unless otherwise noted. (Note 5, 7) 


SYMBOL 


PARAMETER 


CONDITIONS 


LT1213AC 
MIN TYP MAX 


LT1213C/LT1214C 
MIN TYP MAX 


UNITS 


Vos 


Input Offset Voltage 




120 200 


175 500 


MV 




Input Voltage Range (Note 8) 




1.4 1.5 
0.2 


1.4 1.5 
0.2 


V 
V 




Maximum Output Voltage Swing 


Output High, No Load 
Output High, Isource = 1mA 
Output High, Isource = 15mA 


2.45 2.55 
2.30 2.46 
2.02 2.19 


2.45 2.55 
2.30 2.46 
2.02 2.19 


V 
V 
V 


Output Low, No Load 
Output Low, Isink = 1mA 
Output Low, Isink = 15mA 


0.006 0.009 
0.040 0.060 
0.410 0.550 


0.006 0.009 
0.040 0.060 
0.410 0.550 


V 
V 
V 


V s = 3.3V, V CM = 0.5V, V 0UT = 0.5V, -55°C < T A < 125°C, unless otherwise noted. (Note 7) 


SYMBOL 


PARAMETER 


CONDITIONS 


LT1213AM 
MIN TYP MAX 


LT1213M 
MIN TYP MAX 


UNITS 


Vos 


Input Offset Voltage 




130 250 


200 500 


uV 




Input Voltage Range (Note 8) 




1.4 1.5 
0.4 0.2 


1.4 1.5 
0.4 0.2 


V 
V 




Maximum Output Voltage Swing 


Output High. No Load 
Output High, Isource = 1mA 
Output High, Isource = 15mA 


2.35 2.50 
2.20 2.40 
1.90 2.10 


2.35 2.50 
2.20 2.40 
1.90 2.10 


V 
V 
V 


Output Low, No Load 
Output Low, Isink = 1mA 
Output Low, Isink = 15mA 


0.007 0.012 
0.040 0.070 
0.500 0.750 


0.007 0.012 
0.040 0.070 
0.500 0.750 


V 
V 
V 



2-182 



LT1213/LT1214 



CLCCTRICRl CHRRRCTCRISTICS 

Note 1: A heat sink may be required to keep the junction temperature 

below absolute maximum when the output is shorted indefinitely. 

Note 2: Tj is calculated from the ambient temperature T A and power 

dissipation Pq according to the following formulas: 

LT1213MJ8, LT1213AMJ8: Tj = T A + (P D x 1 0CC/W) 
LT1213CN8, LT1213ACN8: Tj = T A + (P D x 1 00°C/W) 
LT1213CS8: Tj = T A + (P D x 1 50°C/W) 

LT1214CN: Tj = T A + (P D x 70"C/W) 

LT1214CS: Tj = T A + (P D x100°C/W) 

Note 3: This parameter is not 100% tested. 

Note 4: Guaranteed by correlation to 3.3V and ±15V tests. 



Note 5: The LT1213/LT1214 are not tested and are not quality-assurance 
sampled at -40°C and at 85°C. These specifications are guaranteed by 
design, correlation and/or inference from -55°C, 0°C, 25°C, 70°C and/or 
1 25°C tests. 

Note 6: Slew rate is measured between ±8.5V on an output swing of ±10V 
on ±15V supplies. 

Note 7: Most LT1213/LT1214 electrical characteristics change very little 
with supply voltage. See the 5V tables for characteristics not listed in the 
3.3V table. 

Note 8: Guaranteed by correlation to 5V and ±15V tests. 
Note 9: Guaranteed by correlation to 3.3V tests. 



TVPICflL P€RFORmnnC€ CHARACTERISTICS 



Distribution of Input Offset Voltage 





70 




60 




50 










is 


40 






o 






30 


ca 




cc 

Q. 


20 




10 








v s = 


5V 




] I I 
LT1213J8 PACKAGE 
i H9n MR pflntcAriF 



























































































-350 -250 -150 -50 50 150 250 350 
INPUT OFFSET VOLTAGE (nV) 



Distribution of Offset Voltage Drift 
with Temperature 



V S = 5V 



~i — i — i — i — i — r~ 

LT1213 J8 PACKAGE 
LT1213 N8 PACKAGE 



-3-2-1 1 2 3 
OFFSET VOLTAGE DRIFT WITH TEMPERATURE (nWC) 



Distribution of Input Offset Voltage 





±15V 




I I I 

LT1213 J8 PACKAGE 
LT1 213 N8 PACKAGE 








































































_ 


: 






1 





700 -500 -300 -100 100 300 500 700 
INPUT OFFSET VOLTAGE ftiV) 



Distribution of Input Offset Voltage 



V S = 5V 



LT1213S8 PACKAGE 
-LT1214N PACKAGE ■ 
LT1214S PACKAGE 



-350 -250 -150 -50 50 150 250 350 
INPUT OFFSET VOLTAGE (nV) 



Distribution of Offset Voltage Drift 
with Temperature 



V S = 5V 



LT1213 S8 PACKAGE 
LT1214 N PACKAGE 
-LT1214S PACKAGE . 



_L 



-6 -4 -2 2 4 6 
OFFSET VOLTAGE DRIFT WITH TEMPERATURE (nW°C) 

UlSfuGOS 



Distribution of Input Offset Voltage 



70 
60 
g 50 

CO 

1 40 
o 

I 30 
£ 20 

10 



V S = ±15V 



LT1213 S8 PACKAGE 
-LT1214N PACKAGE 
LT1214S PACKAGE 



J I I 



-700 -500 -300 -100 100 300 500 
INPUT OFFSET VOLTAGE (nV) 



2-183 



LT1213/LT1214 



TVPICRL P€RFORmnnC€ CHflRflCT€RISTICS 



Voltage Gain, Phase vs Gain-Bandwidth Product, 

Voltage Gain vs Frequency Frequency Phase Margin vs Supply Voltage 




Slew Rate vs Temperature 



Slew Rate vs Supply Voltage 



Capacitive Load Handling 





18 




16 




14 


■5- 


12 


< 


10 






8 


8 








6 




4 




2 



Ta = 
-A V = 
R L = 


25°C 












-2 
10k 






±15V 










































= 5V 

















































50 -25 



25 50 75 
TEMPERATURE CO 



100 125 




4 8 12 16 20 24 28 32 3E 
TOTAL SUPPLY VOLTAGE (V) 

1213MGII 



~A V =1' 



A v = 5' 



A v = 10 
L_ 



100 

CAPACITIVE LOAD (pF) 




2-184 



LT1213/LT1214 



tvpical PCRFORmnnce chariktsristics 



Open-Loop Voltage Gain 
vs Supply Voltage 



Open-Loop Gain, V$ = 5V 




4 8 12 16 20 24 28 32 36 
TOTAL SUPPLY VOLTAGE (V) 



■1 

12 3 4 
OUTPUT (V) 



Positive Output Saturation 
Voltage vs Temperature 





1.4 


> 






1.2 






> 




1 

> 


1.0 


CD 




< 


0.8 


O 




> 




Ml ON 


0.6 


SATUft 


0.4 



0.2 





5V 




















ISOUR 


ce = 2( 


mA 










Isoorce = '0mA 










toio 


« = 1 


mA 






Isou 


CE = 1 


0>iA"~ 





















-60 -25 25 50 75 100 125 
TEMPERATURE (°C) 



Voltage Gain vs Load Resistance 




100 1k 
LOAD RESISTANCE (£2) 



Open-Loop Gain, V$ = +15V 



Negative Output Saturation 
Voltage vs Temperature 



> R L = 2k 




-50 -25 25 50 75 100 125 
TEMPERATURE (°C) 



Channel Separation vs Frequency 



140 
130 
. 120 
• 110 
100 
90 



























Vc = 


II 

±15V 


























T 




25 











































































































































































































































































































































100k 1M 
FREQUENCY (Hz) 



Output Short-Circuit Current 
vs Temperature 



























5V 

ICING 












^SOU 




































v s = 

SOUR 
R SIN 


15V S 
ING 













SING 























25 50 75 
TEMPERATURE (°C) 



Output Impedance vs Frequency 




100k 1M 
FREQUENCY (Hz) 



2-185 



LT1213/LT1214 



TYPicm P€fiFonmnnc€ CHARncTemsTics 



5V Small-Signal Response 



5V Large-Signal Response 
















1 




3 


- 


3 

50 




V S = 5V 
Ay-1 




5V Large-Signal Response 
31 - 




■ 



V S = 5V 
A v = -1 
Rf = Rg = 1 k 
C F = 20pF 



> 15V Small-Signal Response 



t15V Large-Signal Response 



1 15V Large-Signal Response 




V S = +15V 
A v =1 






+15V Settling 




1313(1* G32 



Settling Time to 0.01% 
vs Output Step 



£ 2 

™ 

ZD 

h= -2 
° -4 
-6 



Vs = t15\ 






























INV 


:rtin 






KOI 


INVE 


TTING 














































































VERT 


NG 




















IVUIMIIMVtHIMVlj V 

I I 











300 400 500 600 700 800 900 1000 1100 
SETTLING TIME (ns) 

1213/HE33 



LT1213/LT1214 



TVPicflL P€RFORmnnc€ charrctcristics 



Supply Current vs Supply Votage 



Supply Current vs Temperature 



Warm-Up Drift vs Time 







































125 


"C 
















T 








= 25°C - 
















■•Ta 








I 








Ta 


-5. 


•c 































































1 2 3 4 5 

SUPPLY VOLTAGE (V) 

,Z1S,,4GJ4 

Input Bias Current vs Temperature 



110 
105 
100 
95 
90 
85 
80 
75 













Vs 


= 5V 
















los 





































































4.2 
| 3-8 

| 3.4 

< 

cc 

rx 3.0 
cc 

a 2.6 

& 2.2 

1.1 









































Vs 




























= ±15 












































































































V S = 5V 



























































































































































-50 -25 



25 50 75 100 125 
TEMPERATURE (°C) 



Input Bias Current vs 
Common-Mode Voltage 











































(- 


































































































= 5\ 


















2 TYPICAL AMPLIFIERS 
I I I I 











20 40 60 80 
TIME AFTER POWER-UP (SEC) 

n 

Common-Mode Range 
vs Temperature 



100 



25 50 75 
TEMPERATURE (°C) 




12 3 

COMMON-MODE VOLTAGE (V) 



25 50 75 
TEMPERATURE (°C) 




2-187 



LT1213/LT1214 



nppucmions infORmnnon 

Supply Voltage 

The LT1213/LT1214 op amps are fully functional and all 
internal bias circuits are in regulation with 2.2V of supply. 
The amplifiers will continue to function with as little as 
1.5V, although the input common-mode range and the 
phase margin are about gone. The minimum operating 
supply voltage is guaranteed by the PSRR tests which are 
done with the input common mode equal to 500mV and a 
minimum supply voltage of 2.5V. The LT1 21 3/LT1 21 4 are 
guaranteed over the full -55°C to 125°C range with a 
minimum supply voltage of 2.5V. 

The positive supply pin of the LT1213/LT1214 should be 
bypassed with a small capacitor (about 0.01 ^F) within an 
inch of the pin. When driving heavy loads and for good 
settling time, an additional 4.7|oF capacitor should be 
used. When using split supplies, the same is true for the 
negative supply pin. 

Power Dissipation 

The LT1 213/LT1 214 amplifiers combine high speed and 
large output current drive into very small packages. Be- 
cause these amplifiers work overa very widesupply range, 
it is possible to exceed the maximum junction temperature 
under certain conditions. To insure that the LT1 21 3/ 
LT1 21 4 are used properly, calculate the worst case power 
dissipation, define the maximum ambient temperature, 
select the appropriate package and then calculate the 
maximum junction temperature. 

The worst case amplifier power dissipation is the total of 
the quiescent current times the total power supply voltage 
plus the power in the IC due to the load. The quiescent 
supply current of the LT1 21 3/LT1 21 4 has a positive tem- 
perature coefficient. The maximum supply current of each 
amplifier at 125°C is given by the following formula: 

Ismax = 4.2 + 0.048 x (V s - 5) in mA 

V s is the total supply voltage. 

The power in the IC due to the load is a function of the 
output voltage, the supply voltage and load resistance. The 
worst case occurs when the output voltage is at half 
supply, if it can go that far, or its maximum value if it 
cannot reach half supply. 



For example, calculate the worst case power dissipation 
while operating on +1 5V supplies and driving a 500C2 load. 

Ismax = 4.2 + 0.048 x (30 -5) = 5.4mA 

Pdmax = 2 x V s x Ismax + (Vs - Vomax) x Vomax/Rl 

Pdmax = 2 x 1 5V x 5.4mA + (1 5V - 7.5V) x 7.5V/500 

= 0.162 + 0.113 = 0.275 Watt per Amp 

If this is the dual LT1 21 3, the total power in the package is 
twice that, or 0.550W. Now calculate how much the die 
temperature will rise above the ambient. The total power 
dissipation times the thermal resistance of the package 
gives the amount of temperature rise. Forthis example, in 
the SO-8 surface mount package, the thermal resistance is 
150°C/W junction-to-ambient in still air. 

Temperature Rise = P DM ax x 9ja = 0.550W x 1 50°C/W 

= 82.5°C 

The maximum junction temperature allowed in the plastic 
package is 150°C. Therefore the maximum ambient al- 
lowed is the maximum junction temperature less the 
temperature rise. 

Maximum Ambient = 150°C - 82.5°C = 67.5°C 

That means the SO-8 dual can be operated at or below 
67.5°C on ±15V supplies with a 500Q load. 

As a guideline to help in the selection of the LT1 21 3/ 
LT1214, the following table describes the maximum sup- 
ply voltage that can be used with each part based on the 
following assumptions: 

1 . The maximum ambient is 70°C or 125°C depending on 
the part rating. 

2. The load is 500f2 including the feedback resistors. 

3. The output can be anywhere between the supplies. 



PART 


MAX SUPPLIES 


MAX POWER AT MAX T A 


LT1213MJ8 


18.0V or ±14.1V 


500mW 


LT1213CN8 


23.7V or ±1 8.0V 


800mW 


LT1213CS8 


18.7V or ±1 4.7V 


533mW 


LT1214CN 


19.5V or ±1 5.4V 


1143mW 


LT1214CS 


15.8V or ±1 2.2V 


800mW 



2-188 



LT1213/LT1214 



nppucOTions inf oRmnnon 

Inputs 

Typically at room temperature, the inputs of the LT1213/ 
LT1214 can common mode 400mV below ground (V") 
and to within 1 .2V of the positive supply with the amplifier 
still functional. However, the input bias current and offset 
voltage will shift as shown in the characteristic curves. For 
full precision performance, the common-mode range 
should be limited between ground (V") and 1 .5V below the 
positive supply. 

When either of the inputs is taken below ground (V~) by 
more than about 700mV, that input current will increase 
dramatically. The current is limited by internal 100Q 
resistors between the input pins and diodes to each 
supply. The output will remain low (no phase reversal) for 
inputs 1 .3V below ground (V"). If the output does not have 
to sink current, such as in a single supply system with a 1 k 
load to ground, there is no phase reversal for inputs up to 
8V below ground. 

There are no clamps across the inputs of the LT1213/ 
LT1214 and therefore each input can be forced to any 
voltage between the supplies. The input current will re- 
main constant at about 1 0OnA over most of this range. 
When an input gets closerthan 1 .5V to the positive supply, 
that input current will gradually decrease to zero until the 
input goes above the supply, then it will increase due to the 
previously mentioned diodes. If the inverting input is held 
more positive than the noninverting input by 200mV or 
more, while at the same time the noninverting input is 
within 300mV of ground (V"), then the supply current will 
increase by 2mA and the noninverting input current will 
increase to about 10juA. This should be kept in mind in 
comparator applications where the inverting input stays 
above ground (V") and the noninverting input is at or near 
ground (V"). 

Output 

The output of the LT1213/LT1214 will swing to within 
0.61V of the positive supply with no load. The open-loop 
output resistance, when the output is driven hard into the 



positive rail, is about 1 00Q as the output starts to source 
current; this resistance drops to about 20Q as the current 
increases. Therefore when the output sources 1mA, the 
output will swing to within 0.7V of the positive supply. 
While sourcing 30mA, it is within 1.25V of the positive 
supply. 

The output of the LT1 21 3/LT1 21 4 will swing to within 4mV 
of the negative supply while sinking zero current. Thus, in 
a typical single supply application with the load going to 
ground, the output will go to within 4mV of ground. The 
open-loop output resistance when the output is driven 
hard into the negative rail is about 29Qat low currents and 
reduces to about 23Q at high currents. Therefore when 
the output sinks 1 mA, the output is about 33mV above the 
negative supply and while sinking 30mA, it is about 
690mV above it. 

The output of the LT1213/LT1214 has reverse-biased 
diodes to each supply. If the output is forced beyond either 
supply, unlimited currents will flow. If the current is 
transient and limited to several hundred mA, no damage 
will occur. 

Feedback Components 

Because the input currents of the LT1 21 3/LT1 21 4 are less 
than 200nA, it is possible to use high value feedback 
resistors to set the gain. However, care must be taken to 
insure that the pole that is formed by the feedback resis- 
tors and the input capacitance does not degrade the 
stability of the amplifier. For example, if a single supply, 
noninverting gain of two is set with two 1 0k resistors, the 
LT1213/LT1214 will probably oscillate. This is because 
the amplifier goes open-loop at 6MHz (6dB of gain) and 
has 45° of phase margin. The feedback resistors and the 
10pF input capacitance generate a pole at 3MHz that 
introduces 63° of phase shift at 6MHz! The solution is 
simple, lower the values of the resistors or add a feedback 
capacitor of 10pFormore. 



2-189 



LT1213/LT1214 



flppucOTions inFonmmion 

Comparator Applications 

Sometimes it is desirable to use an op amp as a compara- 
tor. When operating the LT1213/LT1214 on a single 3.3V 
or 5V supply, the output interfaces directly with most TTL 
and CMOS logic. 

The response time of the LT1213/LT1214 is a strong 
function of the amount of input overdrive as shown in the 



following photos. These amplifiers are unity-gain stable 
op amps and not fast comparators, therefore, the logic 
being driven may oscillate due to the long transition time. 
The output can be speeded up by adding 20mV or more of 
hysteresis (positive feedback), but the offset is then a 
function of the input direction. 



LT1213 Comparator Response (+) 
20mV, 10mV, 5mV, 2m V Overdrives 




V S = 5V 



5ms/DIV 



LT1213 Comparator Response (-) 
20mV, 10mV, 5mV, 2mV Overdrives 




V S = 5V 
R L = °° 



5HS/DIV 



SimPUFICD SCHCmOTIC 



"S 4 2 & ~§ 




□ out 



2-190 



LT1213/LT1214 



TVPICfiL nPPLICflTIOnS 

Instrumentation Amplifier with Guard/Shield Driver and Input Bias Current Cancellation 




t, = 170ms 



Ground Current Sense Amplifier Difference Amplifier with Wide Input Common-Mode Range 




2-191 




TECHNOLOGY 



KflTURCS 

■ Slew Rate 50V/usTyp 

■ Gain-Bandwidth Product 23MHz Typ 

■ Fast Settling to 0.01% 

2V Step to 200u.V 250ns Typ 

10V Step to 1mV 480ns Typ 

■ Excellent DC Precision in All Packages 

Input Offset Voltage 450nV Max 

Input Offset Voltage Drift 1 0u.V/°C Max 

Input Offset Current 120nAMax 
Input Bias Current 600nA Max 

Open-Loop Gain 1 0OOV/mV Min 

■ Single Supply Operation 

Input Voltage Range Includes Ground 

Output Swings to Ground While Sinking Current 

■ Low Input Noise Voltage 12.5nV/VHzTyp 

■ Low Input Noise Current 0.5pA/VRzTyp 

■ Specified on 3.3V, 5V and ±15V 

■ Large Output Drive Current 30mA Min 

■ Low Supply Current per Amplifier 6.6mA Max 

■ Dual in 8-Pin DIP and S08 

■ Quad in 14-Pin DIP and NARROW S016 

Note: For applications requiring less slew rate, see the LT1 21 1/LT1 21 2 and 
LT1213/LT1214 data sheets. 



LT1215/LT1216 



23MHz, 50V/>s, Single Supply 
Dual and Quad 
Precision Op Amps 

DCSCRIPTIOn 

The LT1 21 5 is a dual, single supply precision op amp with 
a 23MHz gain-bandwidth product and a 50V/|iS slew rate. 
The LT1216 is a quad version of the same amplifier. The 
DC precision of the LT1215/LT1216 eliminates trims in 
most systems while providing high frequency perfor- 
mance not usually found in single supply amplifiers. 

The LT1215/LT1216 will operate on any supply greater 
than 2.5V and less than 36V total. These amplifiers are 
specified on single 3.3V, single 5V and ±1 5V supplies, and 
only require 5mA of quiescent supply current per ampli- 
fier. The inputs can be driven beyond the supplies without 
damage or phase reversal of the output. The minimum 
output drive is 30mA, ideal for driving low impedance 
loads. 



nppucOTions 

■ 2.5V Full-Scale 12-Bit Systems 

■ 10V Full-Scale 16-Bit Systems 

■ Active Filters 

■ Photo Diode Amplifiers 

■ DAC Current to Voltage Amplifiers 

■ Battery-Powered Systems 



V os < 0.75 LSB 
V os < 3 LSB 



TYPICAL flPPLICRTIOfl 



Single Supply Instrumentation Amplifier Frequency Response 




2-192 



LT1215/LT1216 



absolute mnximum rhtidgs 

Total Supply Voltage (V + to V~) 36V 

Input Current ±15mA 

Output Short-Circuit Duration (Note 1 ) Continuous 

Operating Temperature Range 

LT1215C/LT1216C -40°Cto85°C 

LT1215M -55°Cto125°C 



Storage Temperature Range -65°C to 150°C 

Junction Temperature (Note 2) 

Plastic Package (CN8, CS8, CN, CS) 150°C 

Ceramic Package (MJ8) 175°C 

Lead Temperature (Soldering, 10 sec) 300°C 



PflCKAG€/ORD€R IflFORmflTIOn 



OUT A jT 
-IN A [T 
♦ IN A [7 

v [T 



TOP VIEW 

— o — 




JJ v* 

7J OUTB 
T\ -INB 
JJ +IN B 



JB PACKAGE N8 PACKAGE 

MEAD CERAMIC DIP 8-LEAD PLASTIC DIP 

TjM*x = 175°C,6j A = 100°C/W(J) 
Tjmax = WC, 9j S = 1 00°C/W (N) 



ORDER PART 
NUMBER 



LT1215CN8 
LT1215ACN8 
LT1215MJ8 
LT1215AMJ8 




S8 PACKAGE 
8-LEAD PLASTIC SOIC 



TjMAX = 150°C,e JA = 150°C/W 



ORDER PART 
NUMBER 



LT1215CS8 



S8 PART MARKING 



1215 




ORDER PART 
NUMBER 



LT1216CN 



N PACKAGE 
14-LEAD PLASTIC DIP 



TjMAX=150"C,e JS = 70°CAV 




S PACKAGE 
16-LEAD PLASTIC SOIC 

TjMAX = 150"C,ej A =100°C/W 



ORDER PART 
NUMBER 



LT1216CS 



Consult factory tor Industrial grade p 



RVRIIRBLC opnons 





PACKAGE 


NUMBER OF 






MAX TC V os 


CERAMIC 


PLASTIC DIP 


SURFACE MOUNT 


OP AMPS 


T fl RANGE 


MAXVos (25°C) 


(AVos/AT) 


(J) 


IN) 


(S) 


Two (Dual) 


-40°C to 85°C 


300U-V 


2.5uV/°C 




LT1215ACN8 








450nV 


5uW°c 




LT1215CN8 








450^V 


10u.W°C 






LT1215CS8 


Two (Dual) 


-55°ctoi25°c 


300liV 


2.5nV/"C 


LT1215AMJ8 










450nV 


5uV/°C 


LT1215MJ8 






Four (Quad) 


-40°Cto 85°C 


450nV 


10uV/°C 




LT1216CN 


LT1216CS 



jtwm 



2-193 



LT1215/LT1216 



5V €L€CTRICnL CHRRfiCTCRISTICS 



Vs = 5V, V CM = 0.5V, V 0U T = 05V, T A = 25°C, unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS 


MIN 


LT1215AC 
LT1215AM 
TYP 


MAX 


LT1215C/LT1215M 
LT1216C 
MIN TYP MAX 


UNITS 


Vos 


Input Offset Voltage 






125 


300 




150 


450 


p.V 


AVqs 
-Mime 


Long-Term Input Offset 
Voltage Stability 




0.8 


1.0 


u.V/Mo 


los 


Input Offset Current 








80 




35 


120 


nA 


>B 


Input Bias Current 






— 

420 


500 




420 


600 


nA 




Input Noise Voltage 


O.IHzto 10Hz 


400 




400 




nVp.p 


e„ 


Input Noise Voltage Density 


f = 10Hz 
f = 1000Hz 


15.0 
12.5 


15.0 
12.5 


nWVHi 
nVA/fiz 


in 


Input Noise Current Density 


f = 10Hz 
f = 1000Hz 


7.0 
0.5 


7.0 
0.5 


pA/VHi 
pA/VRz 




Input Resistance (Note 3) 


Differential Mode 
Common Mode 


10 


40 

200 




10 


40 
200 




Mn 

M£2 




Input Capacitance 


fWlMHz 


10 


10 


pF 




Input Voltage Range 




3.0 



3.2 
-0.2 




3.0 



3.2 
-0.2 




V 
V 


CMRR 


Common-Mode Rejection Ratio 


V CM = 0Vto 3V 


90 108 


86 


108 




dB 


PSRR 


Power Supply Rejection Ratio 


V s = 2.5V to 12.5V 


96 


115 




93 


115 




dB 


AvOL 


Large-Signal Voltage Gain 


V = 0.05V to 3.7V, R L = 500C2 


150 


600 




150 


600 




V/mV 




Maximum Output Voltage Swing 
(Note 4) 


Output High, No Load 
Output High, lsouRCE = 1mA 

uuipui niyn, 'SOURCE ~ JUiiiM 


4.30 
4.20 
3.60 


4.39 
4.30 
3.75 




4.30 
4.20 
3.60 


4.39 
4.30 
3.75 




V 
V 
w 

V 






rintnnt 1 niAJ Wn 1 narl 

UUl|JLH LUW, IYU LUdU 

Output Low, Isink - 1 mA 
Output Low, l S | NK = 30mA 




0.005 
0.030 
0.630 


0.008 
0.050 
1.000 




0.005 
0.030 
0.630 


0.008 
0.050 
1.000 


V 
V 


k 


Maximum Output Current 


(Note 9) 


±30 


±50 




±30 


±50 




mA 


SR 


Slew Rate 


A v = -2 


30 


30 


V/ns 


GBW 


Gain-Bandwidth Product 


f= 100kHz 


23 


23 


MHz 


Is 


Supply Current Per Amplifier 




3.6 


4.75 


6.6 


3.6 


4.75 


6.6 


mA 




Minimum Supply Voltage 


Single Supply 




2.2 


2.5 




2.2 


2.5 


V 




Full Power Bandwidth 


A v = 1,V = 2.5Vp.p 


2.6 


2.6 


MHz 


t„t f 


Rise Time, Fall Time 


A v = 1 , 1 0% to 90%,V o = 100mV 


16 


16 


ns 


OS 


Overshoot 


A v = 1,V = 100mV 


25 


25 


% 


tpD 


Propagation Delay 


A v = 1,V = 100mV 


13 


13 


ns 


ts 


Settling Time 


0.01%, A v = 1, AV = 2V 


250 


250 


ns 




Open-Loop Output Resistance 


l = 0mA, f = 10MHz 


40 


40 


n 


THD 


Total Harmonic Distortion 


A V = 1,V = 1V RMS , 20Hz to 20kHz 


0.001 


0.001 


% 























2-194 



LT1215/LT1216 



5V €L€CTRICnL CHnRflCT€RISTICS 



Vs = 5V, V CM = 0.5V, Vqut = 05V, 0°C < T A < 70°C, unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS 


MIN 


LT1215AC 
TYP 


MAX 


LT1215C/LT1216C 
MIN TYP MAX 


UNITS 


Vos 


Input Offset Voltage 






200 


350 




250 


550 


u.V 


AV 0S 
AT 


Input Offset Voltage Drift 
(Note 3) 


8-Pin DIP Package 
14-Pin DIP, SOIC Package 




1 


2.5 




2 

3 


5 
10 


u.V/°C 

nv/°c 


los 


Input Offset Current 






35 


100 




35 


140 


nA 


Ib 


Input Bias Current 






450 


530 




450 


630 


nA 




Input Voltage Range 




2.9 
0.1 


3.1 
-0.1 




2.9 
0.1 


3.1 
-0.1 




V 
V 


CMRR 


Common-Mode Rejection Ratio 


V CM = 0.1V to 2.9V 


89 108 


85 


108 




dB 


PSRR 


Power Supply Rejection Ratio 


V s = 2.6V to 12.5V 


95 


114 




92 


114 




dB 


Avol 


Large-Signal Voltage Gain 


V = 0.05V to 3.7V, R L = 500£2 


100 


600 




100 


600 




V/mV 




Maximum Output Voltage Swing 
(Note 4) 


Output High, No Load 
Output High, IsoURCE = 1mA 
Output High, Isour.ce = 20mA 


4.20 
4.10 
3.70 


4.33 
4.24 
3.89 




4.20 
4.10 

3.70 


4.33 
4.24 
3.89 




V 
V 
V 






Output Low, No Load 
Output Low, Isink = 1mA 
Output Low, Isink = 20mA 




0.006 
0.035 
0.500 


0.009 
0.055 
0.725 




0.006 
0.035 
0.500 


0.009 
0.055 
0.725 


V 
V 
V 


is 


Supply Current Per Amplifier 




3.3 


5.2 


7.5 


3.3 


5.2 


7.5 


mA 


Vs = 5V, V CM = 0.5V, Vout = 0.5V, -40°C < T A < 85 C, unless otherwise noted. (Note 5) 


SYMBOL 


PARAMETER 


CONDITIONS 


MIN 


LT1215AC 
TYP 


MAX 


LT1215C/LT1216C 
MIN TYP MAX 


UNITS 


Vos 


Input Offset Voltage 






200 


400 




250 


600 


uV 


AV 0S 
AT 


Input Offset Voltage Drift 
(Note 3) 


8-Pin DIP Package 
14-Pin DIP, SOIC Package 




1 


2.5 




2 
3 


5 
10 


u.V/°C 
u.V/°C 


'os 


Input Offset Current 






35 


110 




35 


150 


nA 


Ib 


Input Bias Current 






450 


550 




450 


650 


nA 




Input Voltage Range 




2.8 
0.2 


3.0 





2.8 
0.2 


3.0 





V 
V 


CMRR 


Common-Mode Rejection Ratio 


V CM = 0.2V to 2.8V 


88 108 


84 108 


dB 


PSRR 


Power Supply Rejection Ratio 


V s = 2.7V to 12.5V 


94 


114 




91 


114 




dB 


Avol 


Large-Signal Voltage Gain 


V = 0.05V to 3.7V, R L = 500Q 


100 


600 




100 600 


V/mV 




Maximum Output Voltage Swing 
(Note 4) 


Output High, No Load 
Output High, lsouRCE = 1mA 
Output High, Isource = 20mA 


4.10 
4.00 
3.60 


4.30 
4.16 
3.82 




4.10 
4.00 
3.60 


4.30 
4.16 
3.82 




V 
V 
V 






Output Low, No Load 
Output Low, Isink = 1mA 
Output Low, Isink = 20mA 




0.006 
0.035 
0.500 


0.010 
0.060 
0.750 




0.006 
0.035 
0.500 


0.010 
0.060 
0.750 


V 

V 
V 


Is 


Supply Current Per Amplifier 




2.9 


5.3 


7.6 


2.9 


5.3 


7.6 


mA 



_ 



2-195 



LT1215/LT1216 



5V €L€CTRICfll CHARACTERISTICS 



Vs = 5V, V CM = 0.5V, Vqut = 0.5V, -55°C <T A < 125°C, unless otherwise noted. 











LT1215AM 






LT1215M 






SYMBOL 


PARAMETER 


CONDITIONS 


MIN 


TYP 


MAX 


MIN 


TYP 


MAX 


UNITS 


Vos 


Input Offset Voltage 







250 


450 




350 


750 


nV 


AV 0S 


Input Offset Voltage Drift 







. 1 


(1.0 




n 
C 





U.W u 


AT 


(Note 3) 


















los 


Input Offset Current 







35 


150 




35 


200 


nA 


Ib 


Input Bias Current 






450 


600 




450 


700 


nA 




Input Voltage Range 




2.8 


3.0 




2.8 


3.0 




V 








0.4 


0.2 




0.4 


0.2 




V 


CMRR 


Common-Mode Rejection Ratio 


V CM = 0.4Vto 2.8V 


87 


108 




82 


108 




dB 


PSRR 


Power Supply Rejection Ratio 


V s = 2.7V to 12.5V 


93 


114 




90 


114 




dB 


AvOL 


Large-Signal Voltage Gain 


V = 0.05V to 3.7V, R L = 500tl 


50 


100 




50 


100 




V/mV 




Maximum Output Voltage Swing 


Output High, No Load 


4.00 


4.20 




4.00 


4.20 




V 




(Note 4) 


Output High, Isource = 1mA 


3.90 


4.10 




3.90 


4.10 




V 






Output High, Isource = 20mA 


3.50 


3.80 




3.50 


3.80 




V 






Output Low, No Load 




0.007 


0.012 




0.007 


0.012 


mV 






Output Low, Isink = 1mA 




0.040 


0.070 




0.040 


0.070 


mV 






Output Low, Isink = 20mA 




0.700 


1.000 




0.700 


1.000 


mV 


Is 


Supply Current Per Amplifier 




2.3 


5.5 


8.4 


2.3 


5.5 


8.4 


mA 



±T5V €l€CTRICAl CHARACT€RISTICS 



V s = +15V, V C m = 0V, Vqut = 0V, T A = 25°C, unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS 


MIN 


LT1215AC 
LT1215AM 
TYP 


MAX 


LT1215C/LT1215M 
LT1216C 
MIN TYP MAX 


UNITS 


Vos 


Input Offset Voltage 






225 


500 


250 650 


m 


los 


Input Offset Current 






30 


80 


30 110 


nA 


Ib 


Input Bias Current 






360 


500 


360 550 


nA 




Input Voltage Range 




13.0 
-15.0 


13.2 
-15.2 




13.0 
-15.0 


13.2 
-15.2 


V 
V 


CMRR 


Common-Mode Rejection Ratio 


V CM = -15Vto13V 


90 


108 




86 


108 


dB 


PSRR 


Power Supply Rejection Ratio 


V s = ±2Vto±18V 


96 


110 




93 


110 


dB 


Avol 


Large-Signal Voltage Gain 


V o = 0V to±10V, R|_ = 2k 


1000 


3500 




1000 


3500 


V/mV 




Maximum Output Voltage Swing 


Output High, Isource = 30mA 


13.5 


13.75 




13.5 


13.75 


V 






Output Low, Isink = 30mA 


-14 


-14.4 




-14 


-14.4 


V 


Go 


Maximum Output Current 


(Note 9) 


±30 


±50 




±30 


±50 


mA 


SR 


Slew Rate 


A v = -2 (Note 6) 


40 


50 




40 


50 


V/ps 


GBW 


Gain-Bandwidth Product 


f = 100kHz 


15 


23 




15 


23 


MHz 


is 


Supply Current Per Amplifier 




3.6 


5.7 


8 


3.6 


5.7 8 


mA 




Channel Separation 


V = ±10V, R L = 2k 


128 


140 




128 


140 


dB 




Minimum Supply Voltage 


Equal Split Supplies 




±1.7 


±2 


±1.7 ±2 


V 




Full-Power Bandwidth 


Av = 1,Vo = 20V P .p 


750 


750 


kHz 




Settling Time 


0.01%, A V = 1,AV = 10V 


480 


480 


ns 



2-196 



u\mm 



LT1215/LT1216 



±T5V €l€CTRICfll CHRRRCTCRISTICS 



V s = +15V, V C m = OV, V 0U T = OV, 0°C < T A < 70°C, unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS 


MIN 


LT1215AC 
TYP 


MAX 


LT1215C/LT1216C 
MIN TYP MAX 


UNITS 


Vos 


Input Offset Voltage 






325 


550 




400 


750 


nv 


AV 0S 
AT 


Input Offset Voltage Drift 
(Note 3) 


8-Pin DIP Package 
14-Pin DIP, SOIC Package 




1 


2.5 




2 
3 


5 

10 


nV/°c 

M.V/°C 


■os 


Input Offset Current 






30 


100 




30 


130 


nA 


k 


Input Bias Current 






360 


530 




360 


580 


nA 




Input Voltage Range 




12.9 
-14.9 


13.1 
-15.1 




12.9 
-14.9 


13.1 
-15.1 




V 
V 


CMRR 


Common-Mode Rejection Ratio 


V CM = -14.9V to 12.9V 


89 


108 




85 


108 




dB 


PSRR 


Power Supply Rejection Ratio 


V s = ±2.1Vto±18V 


95 


110 




92 


110 




dB 


AVOL 


Large-Signal Voltage Gain 


V o = 0Vto±10V, R L = 2k 


800 


3000 




800 


3000 




V/mV 




Maximum Output Voltage Swing 


Output High, Isource = 20mA 


13.7 


13.9 




13.7 


13.9 




V 






Output Low, I S ink = 20mA 


-14.2 


-145 




-14.2 


-14.5 




V 


Is 


Supply Current Per Amplifier 




3.3 


6.3 


9.2 


3.3 


6.3 


9.2 


mA 


V s = ±15V, V CM = OV, Vqut = OV, -40 C < T A < 85 C. unless otherwise noted. (Note 5) 


SYMBOL 


PARAMETER 


CONDITIONS 


MIN 


LT1215AC 
TYP 


MAX 


LT1215C/LT1216C 
MIN TYP MAX 


UNITS 


Vos 


Input Offset Voltage 






325 


600 




400 


800 


M.V 


AV 0S 
AT 


Input Offset Voltage Drift 
(Note 3) 


8-Pin DIP Package 
14-Pin DIP, SOIC Package 




1 


2.5 




2 
3 


5 
10 


u.V/°C 
u.V/°C 


los 


Input Offset Current 






30 


110 




30 


140 


nA 


Ib 


Input Bias Current 






360 


550 




360 


600 


nA 




Input Voltage Range 




12.8 
-14.8 


13.0 
-15.0 




12.8 
-14.8 


13.0 
-15.0 




V 
V 


CMRR 


Common-Mode Rejection Ratio 


V C M = -14.8Vto12.8V 


88 108 


84 


108 




dB 


PSRR 


Power Supply Rejection Ratio 


V s = ±2.2Vto±18V 


94 


110 




91 


110 




dB 


AvOL 


Large-Signal Voltage Gain 


V o = 0Vto±10V, R[_ = 2k 


800 


2500 




800 


2500 




V/mV 




Maximum Output Voltage Swing 


Output High, Isource = 20mA 


13.6 


13.8 




13.6 


13.8 




V 






Output Low, Isink = 20mA 


-14.1 


-14.5 




-14.1 


-14.5 




V 


Is 


Supply Current Per Amplifier 




2.9 


6.5 


9.5 


2.9 6.5 9.5 


mA 


V s = +15V, V CM = OV, Vqut = OV, -55°C < T A < 125°C, unless otherwise noted. 


SYMBOL 


PARAMETER 


CONDITIONS 


MIN 


LT1215AM 
TYP 


MAX 


MIN 


LT1215M 
TYP 


MAX 


UNITS 


Vos 


Input Offset Voltage 






350 


650 




500 


950 


uV 


AV 0S 
AT 


Input Offset Voltage Drift 
(Note 3) 






1 


2.5 




2 


5 


nv/°c 


los 


Input Offset Current 






30 


150 




30 


200 


nA 


Ib 


Input Bias Current 






360 


600 




360 


700 


nA 




Input Voltage Range 




12.8 
-14.6 


13.0 
-14.8 




12.8 
-14.6 


13.0 
-14.8 




V 
V 


CMRR 


Common-Mode Rejection Ratio 


V CM = -14.6V to 12.8V 


87 


108 




82 


108 




dB 


PSRR 


Power Supply Rejection Ratio 


V s = ±2.2Vto±15V 


93 


110 




90 


110 




dB 


AvOL 


Large-Signal Voltage Gain 


V o = 0Vto±10V, R L = 2k 


500 


2000 




500 


2000 




V/mV 




Maximum Output Voltage Swing 


Output High, Isource = 20mA 


13.4 


13.8 




13.4 


13.8 




V 






Output Low, l S | NK = 20mA 


-14 


-14.5 




-14 


-14.5 




V 


Is 


Supply Current Per Amplifier 




2.3 


7 


10.3 


2.3 


7 


10.3 


mA 



2-197 



LT1215/LT1216 



3.3V €l€CTMCRl CHARACTCRISTICS 

V s = 3.3V, V CM = 0.5V, Vqut = 0.5V, T A = 25°C, unless otherwise noted. (Mote 7) 



SYMBOL 


PARAMETER 




CONDITIONS 


LT1215AC 
LT1215AM 
MIN TYP MAX 


LT1215C/LT1215M 
LT1216C 
MIN TYP MAX 


UNITS 


Vos 


Input Offset Voltage 




125 300 


150 450 


UV 




Input Voltage Range (Note 8) 




1.3 1.5 
-0.2 


1.3 1.5 

-0.2 


V 
V 




Maximum Output Voltage Swing 


Output High, No Load 
Output High, Isource = 1mA 
Output High, Isource = 30mA 


2.60 2.69 
2.50 2.60 
1.90 2.05 


2.60 2.69 
2.50 2.60 
1.90 2.05 


V 
V 
V 


Output Low, No Load 
Output Low, Isink = 1 mA 
Output Low, Isink = 30mA 


0.005 0.008 
0.035 0.050 
0.700 1.000 


0.005 0.008 
0.035 0.050 
0.700 1.000 


V 
V 
V 


l'o 


Maximum Output Current 




±30 ±50 


±30 ±50 


mA 


V s = 3.3V, V CM = 0.5V, V 0U T = 0.5V, C < T A < 70 C, unless otherwise noted. (Note 7) 


SYMBOL 


PARAMETER 


CONDITIONS 




LT1215AC 
MIN TYP MAX 


LT1215C/LT1216C 
MIN TYP MAX 


UNITS 


Vos 


Input Offset Voltage 




200 350 


250 550 


U.V 




Input Voltage Range (Note 8) 




1.2 1.4 
0.1 -0.1 


1.2 1.4 
0.1 -0.1 


V 
V 




Maximum Output Voltage Swing 


Output High, No Load 
Output High, Isource = lmA 
Output High, Isource = 20mA 


2.50 2.63 
2.40 2.54 
2.00 2.19 


2.50 2.63 
2.40 2.54 
2.00 2.19 


V 
V 
V 


Output Low, No Load 
Output Low, Isink = 1mA 
Output Low, Isink = 20mA 


0.006 0.009 
0.035 0.055 
0.500 0.725 


0.006 0.009 
0.035 0.055 
0.500 0.725 


V 
V 
V 


V s = 3.3V, V CM = 0.5V, V 0UT = 0.5V, -40°C < T A < 85 C, unless otherwise noted. (Note 5, 7) 


SYMBOL 


PARAMETER 


CONDITIONS 


LT1215AC 
MIN TYP MAX 


LT1215C/LT1216C 
MIN TYP MAX 


UNITS 


Vos 


Input Offset Voltage 





200 400 


250 600 


nv 




Input Voltage Range (Note 8) 





1.1 1.3 
0.2 


1.1 1.3 
0.2 


V 
V 




Maximum Output Voltage Swing 


Output High, No Load 
Output High, Isource = 1mA 
Output High, Isource = 20mA 


2.40 2.50 
2.30 2.46 
1.90 2.12 


2.40 2.50 
2.30 2.46 
1.90 2.12 


V 
V 
V 


Output Low, No Load 
Output Low, Isink = 1 m A 
Output Low, Isink = 20mA 


0.006 0.010 
0.035 0.060 
0.500 0.750 


0.006 0.010 
0.035 0.060 
0.500 0.750 


V 
V 
V 


Vs = 3.3V, V CM = 0.5V, V 0U T = 0.5V, -55°C < T A < 125°C, unless otherwise noted. (Note 7) 


SYMBOL 


PARAMETER 


CONDITIONS 


LT1215AM 
MIN TYP MAX 


LT1215M 
MIN TYP MAX 


UNITS 


Vos 


Input Offset Voltage 




250 450 


350 750 


fH 




Input Voltage Range (Note 8) 




1.1 1.3 
0.4 0.2 


1.1 1.3 
0.4 0.2 


V 
V 




Maximum Output Voltage Swing 


Output High, No Load 
Output High, Isource = 1mA 
Output High, Isource = 20mA 


2.30 2.50 
2.20 2.40 
1.80 2.10 


2.30 2.50 
2.20 2.40 
1.80 2.10 


V 
V 
V 


Output Low, No Load 
Output Low, Isink = 1mA 
Output Low, Isink = 20mA 


0.007 0.012 
0.040 0.070 
0.700 1.000 


0.007 0.012 
0.040 0.070 
0.700 1.000 


V 
V 
V 



2-198 



LT1215/LT1216 



€l€CTRKM CHRRRCTCRISTICS 



Note 1: A heat sink may be required to keep the junction temperature 

below absolute maximum when the output is shorted indefinitely. 

Note 2: Tj is calculated from the ambient temperature T A and power 

dissipation according to the following formulas: 

LT1215MJ8, LT1215AMJ8: Tj = T A + (P D x 1 00°C/W) 
LT1215CN8, LT1215ACN8: Tj = T A + (P D x 1 00°C/W) 
LT1215CS8: Tj = T A t (P x 1 50°C/W) 

LT1216CN: Tj =T A + (P D x 70°C/W) 

LT1216CS: Tj = T A + (P D x 100°C/W) 

Note 3: This parameter is not 100% tested. 

Note 4: Guaranteed by correlation to 3.3V and ±15V tests. 



Note 5: The LT1215/U1216 are not tested and are not quality-assurance 
sampled at -40°C and at 85°C. These specifications are guaranteed by 
design, correlation and/or inference from -55°C, 0°C, 25°C, 70°C and/or 
125°C tests. 

Note 6: Slew rate is measured between ±8.5V on an output swing of +1 0V 
on +15V supplies. 

Note 7: Most LT1 21 5/LT1 21 6 electrical characteristics change very little 
with supply voltage. See the 5V tables for characteristics not listed in the 
3.3V table. 

Note 8: Guaranteed by correlation to 5V and ±1 5V tests. 
Note 9: Guaranteed by correlation to 3.3V tests. 



TVPicni pcRFonmnncc chrrrctcristks 



Distribution ol Input Offset Voltage 





50 




45 




JO 




35 








30 


ZD 




O 


25 








20 






DC 


15 


o. 






10 




5 








_v s = 


5V 




LT 
LT 


215 N8 PACK 
215J8 PACK 


AGE 
AGE 



















































































































-525 -375 -225 -75 75 225 375 525 
INPUT OFFSET VOLTAGE (jiV) 

121*18 GW 



Distribution of Offset Voltage Drift 
with Temperature 



V; 


= 51 








LT12 
LT12 


15 N 

!5J 


8 PA 
SPA 


CKA 
M( 


3E 

E 
















































-\ 

































-5 -4 -3 -2 -1 1 2 3 4 5 
OFFSET VOLTAGE DRIFT WITH TEMPERATURE ( M W°C) 

ntmMI 



Distribution of Input Offset Voltage 



V S = ± 


15V 


1 1 
LT1215 N8 PACKAGE 
LT121 5 J8 PACKAGE 

























































-750 -450 -150 150 450 
INPUT OFFSET VOLTAGE (hV) 



Distribution of Input Offset Voltage 





50 




J 5 




40 




35 






. ' 


30 






O 


25 








20 






cc 


15 








10 




S 








_VS = 


5V 




I I I 
LT1215S8 PACKAGE 
LT1216N PACKAGE 
I T1T1G c OArtfAnr 

























- 


= 




















































































m 





-525 -375 -225 -75 75 225 375 525 
INPUT OFFSET VOLTAGE fjiV) 



Distribution of Offset Voltage Drift 
with Temperature 



i — r 

V S = 5V 



n — i — i — i — r— 

LT1215S8 PACKAGE 
LT1216N PACKAGE 
-LT1216S PACKAGE - 



u 



-10-8 -6 -4 -2 2 4 6 8 10 
OFFSET VOLTAGE DRIFT WITH TEMPERATURE (jiWC) 



Distribution of Input Offset 
Voltage 



£ 20 

Z 

I 15 

z 

§ 10 



V S = ±15V 



LT1215S8 PACKAGE 
LT1216N PACKAGE 
"LT1216SPACKAGE 



" 



-750 -450 -150 150 450 750 
INPUT OFFSET VOLTAGE (jiV) 



XTUDHS 



2-199 



LT1215/LT1216 



LT1215/LT1216 



TVPICHL P€Rf ORmnnC€ CHRRRCTCRISTICS 



Voltage Gain vs Frequency 



:40 
120 
100 
80 
60 
40 
20 

-20 













I 

C L = 20pF 
















R 














































t15V 














































\ 


S = 5 





Voltage Gain, Phase vs 
Frequency 



Gain-Bandwidth Product, 
Phase Margin vs Supply Voltage 



1 10 100 1k 10k 100k 1M 10M100M 
FREQUENCY (Hz) 




1M 10M 
FREQUENCY (Hz) 



3 5 7 10 20 30 40 
TOTAL SUPPLY VOLTAGE (V) 



Slew Rate vs Temperature 



-Ta = 25 
A v = -2 
□ . _ m 


'C 






















k - 














5 = 


tie 


V 






L " 






























































































's 


5V 























































































































-50 -25 25 50 75 100 125 
TEMPERATURE CO 



Slew Rate vs Supply Voltage 



-A v = -2 
R L = 10 






Ta= 125"C 














































T A = 25-C 






























'Ta = 


















-bb"C 






































































— 



























4 8 12 16 20 24 28 32 36 
TOTAL SUPPLY VOLTAGE (V) 

I21SHBGI4 



Capacitive Load Handling 





sv 










































































































A V = I > 






















A v = 5^ 
























































A v = 10- 






















1 



100 

CAPACITIVE LOAD (pF) 



Undistorted Output Swing 
vs Frequency, Vs = 5V 











llll 










M i ii 

V S = 5V 










-1 




























































-A 















































































































































































10k 100k 
FREQUENCY (Hz) 



Undistorted Output Swing 
vs Frequency, Vs = ±15V 




10k 100k 
FREQUENCY (Hz) 



Total Harmonic Distortion and 
Noise vs Frequency 



e 0.0001 




100 1k 10k 

FREQUENCY (Hz) 



100k 



2-200 



LT1215/LT1216 



TYPicni p€RFORmnnc€ 



Open-Loop Voltage Gain 
vs Supply Voltage 



> 6k 

E 
> 

2 5k 
S " 

<£ 
I— 

o 3k 

cu 
o 

3 2k 





-Rl 


= 2k 




















Ta 


= -5S°C 
































































T 


i = 25°C _ 






















































































Tfl 


= 125°C 






















/ 

































4 8 12 16 20 24 28 32 36 
TOTAL SUPPLY VOLTAGE (V) 

U1SNCSH 



Open-Loop Gain, V$ = 5V 




2 3 4 
OUTPUT (V) 



Positive Output Saturation 
Voltage vs Temperature 




-50 -25 25 50 75 100 125 
TEMPERATURE (°C) 



Voltage Gain vs Load Resistance 



Open-Loop Gain, V S = ±15V 




100 1k 
LOAD RESISTANCE (£2) 



Negative Output Saturation 
Voltage vs Temperature 



:| S i NK = 30mA- 

H — h" 



"V S = 5V" 



"'sink = 10mA- 



I S i NK = 10|jA_ 



-50 -25 25 50 75 100 125 
TEMPERATURE ("Q 



Channel Separation vs Frequency 



140 
130 
. 120 
• 110 
100 
90 
80 
70 
60 
50 
40 

















I I I III 

Vc = ±15V 
















T 


I = 


2 


5°C 









































































































































































































100k 1M 
FREQUENCY (Hz) 



Output Short-Circuit Current 
vs Temperature 





































Vs = 


5 V 










ySOL 


RCING 




















V 


S = ±1 
KING 
URCI 












SIN 
St 


)R 
JG 





































-50 -25 25 50 75 100 
CASE TEMPERATURE (°C) 



Output Impedance vs Frequency 




100k 1M 
FREQUENCY (Hz) 



2-201 



LT1215/LT1216 



TYPicni p€ftFORmnnc€ charactcristics 





2-202 



LT1215/LT1216 



TYPICAL PCRFORfTinnCC CHRRfiCT€RISTICS 



Supply Current vs Supply Votage 



Supply Current vs Temperature 



Warm-Up Drift vs Time 




12 3 4 

SUPPLY VOLTAGE (V) 

ms/19001 



Input Bias Current vs Temperature 















= 5V 














































lo 














t 









































-50 -25 25 50 75 100 125 
TEMPERATURE fC) 





























































































3 ■ 


t1 
























-v 


v- 












































y 












s = 


5V 





















































































































































-50 -25 25 50 75 
TEMPERATURE ("C) 

Input Bias Current vs 
Common-Mode Voltage 



£-200 

cc 

=1 

o 

to 

S-300 

I— 
=> 

D- 

~-400 
-500 



1 

V<s = 5V 












































































































25° 










-T 


\ = 2 


5"C- 


































A — 


55' 

























-10 12 3 

COMMON-MODE VOLTAGE (V) 



20 
. 15 
10 
5 

-5 
-10 
-15 
-20 













































, — 




































t 




















\ 








































v. 

Ri 




.5V 














4 TYPICAL AMPLIFIERS 













40 60 80 100 120 140 160 180 200 
TIME AFTER POWER-UP (SEC) 



Common-Mode Range 
vs Temperature 



V*-2 
V"+1 



-50 -25 



25 50 75 
TEMPERATURE (°C) 



125 



Input Noise Current, Noise 
Voltage Density vs Frequency 



i i mini 




VOLTAGE NOISE 



CURRENT NOISE 



100 1k 10k 

FREQUENCY (Hz) 



Common-Mode Rejection Ratio 
vs Frequency 



110 
100 
90 



-V S 




5V 













































































































































































































































































































































100k 1M 
FREQUENCY (Hz) 



Input Referred Power Supply 
Rejection Ratio vs Frequency 




2-203 



LT1215/LT1216 



nppucOTions inFORmnnon 

Supply Voltage 

The LT1215/LT1216 op amps are fully functional and all 
internal bias circuits are in regulation with 2.2V of supply. 
The amplifiers will continue to function with as little as 
1.5V, although the input common-mode range and the 
phase margin are about gone. The minimum operating 
supply voltage is guaranteed by the PSRR tests which are 
done with the input common mode equal to 500mV and a 
minimum supply voltage of 2.5V. The LT1 21 5/LT1 216 are 
guaranteed over the full -55°C to 125°C range with a 
minimum supply voltage of 2.7V. 

The positive supply pin of the LT1215/LT1216 should be 
bypassed with a small capacitor (about 0.01 jaF) within an 
inch of the pin. When driving heavy loads and for good 
settling time, an additional 4.7|iF capacitor should be 
used. When using split supplies, the same is true for the 
negative supply pin. 

Power Dissipation 

The LT1215/LT1216 amplifiers combine high speed and 
large output current drive into very small packages. Be- 
cause theseamplifiers work overa very wide supply range, 
it is possible to exceed the maximum junction temperature 
under certain conditions. To insure that the LT1215/ 
LT1 21 6 are used properly, calculate the worst case power 
dissipation, define the maximum ambient temperature, 
select the appropriate package and then calculate the 
maximum junction temperature. 

The worst case amplifier power dissipation is the total of 
the quiescent current times the total power supply voltage 
plus the power in the IC due to the load. The quiescent 
supply current of the LT121 5/LT1216 has a positive tem- 
perature coefficient. The maximum supply current of each 
amplifier at 125°C is given by the following formula: 

Ismax = 8.4 + 0.076 x (V s - 5) in mA 

V s is the total supply voltage. 

The power in the IC due to the load is a function of the 
output voltage, the supply voltage and load resistance. The 
worst case occurs when the output voltage is at half 
supply, if it can go that far, or its maximum value if it 
cannot reach half supply. 



For example, calculate the worst case power dissipation 
while operating on ±1 5V supplies and driving a 500Q load. 

Ismax = 8.4 + 0.076 x (30 - 5) = 1 0.3mA 

Pdmax = 2 x V s x Ismax + (Vs - V max) x Vomax/Rl 

Pdmax = 2 x 1 5V x 1 0.3mA + (15V- 7.5V) x 7.5V/500 

= 0.309 + 0.1 13 = 0.422 Watt per Amp 

If this is the dual LT1 21 5, the total power in the package is 
twice that, or 0.844W. Now calculate how much the die 
temperature will rise above the ambient. The total power 
dissipation times the thermal resistance of the package 
gives the amount of temperature rise. Forthis example, in 
the SO-8 surface mount package, the thermal resistance is 
150°C/W junction-to-ambient in still air. 

Temperature Rise = P DMA x x 6ja = 0.844W x 1 50°C/W 

= 126.6°C 

The maximum junction temperature allowed in the plastic 
package is 150°C. Therefore the maximum ambient al- 
lowed is the maximum junction temperature less the 
temperature rise. 

Maximum Ambient = 150°C - 126.6°C = 23.4°C 

That means the S08 dual can only be operated at or below 
room temperature on +15V supplies with a 500Q load. 
Obviously this is not recommended. Lowering the supply 
voltage is recommended, or use the DIP packaged part. 

As a guideline to help in the selection of the LT1215/ 
LT121 6, the following table describes the maximum sup- 
ply voltage that can be used with each part based on the 
following assumptions: 

1 . The maximum ambient is 70°C or 1 25°C depending 
on the part rating. 

2. The load is 500ft, includes the feedback resistors. 

3. The output can be anywhere between the supplies. 



PART 


MAX SUPPLIES 


MAX POWER AT MAX T A 


LT1215MJ8 


15.0V or ±1 0.3V 


500mW 


LT1215CN8 


20.3V or ±14.5V 


800mW 


LT1215CS8 


15.7V or ±1 0.8V 


533mW 


LT1216CN 


16.4V or ±1 1.4V 


1143mW 


LT1216CS 


13.0V or ±8.7V 


800mW 



2-204 



LT1215/LT1216 



nppucflTions inFORmnnon 

Inputs 

Typically at room temperature, the inputs of the LT1215/ 
LT1216 can common mode 400mV below ground (V") 
and to within 1 .5V of the positive supply with the amplifier 
still functional. However the input bias current and offset 
voltage will shift as shown in the characteristic curves. For 
full precision performance, the common-mode range 
should be limited between ground (V") and 2V below the 
positive supply. 

When either of the inputs is taken below ground (V - ) by 
more than about 700mV, that input current will increase 
dramatically. The current is limited by internal 100Q 
resistors between the input pins and diodes to each 
supply. The output will remain low (no phase reversal) for 
inputs 1 .3V belowground (V"). If the output does not have 
to sink current, such as in a single supply system with a 1 k 
load to ground, there is no phase reversal for inputs up to 
8V below ground. 

There are no clamps across the inputs of the LT1215/ 
LT1216 and therefore each input can be forced to any 
voltage between the supplies. The input current will re- 
main constant at about 360nA over most of this range. 
When an input gets closer than 2V to the positive supply, 
that input current will gradually decrease to zero until the 
input goes above the supply, then it will increase due to the 
previously mentioned diodes. If the inverting input is held 
more positive than the noninverting input by 200mV or 
more, while at the same time the noninverting input is 
within 300mV of ground (V"), then the supply current will 
increase by 5mA and the noninverting input current will 
increase to about 100uA. This should be kept in mind in 
comparator applications where the inverting input stays 
above ground (V") and the noninverting input does not. 

Output 

The output of the LT1215/LT1216 will swing to within 
0.61 V of the positive supply with no load. The open-loop 
output resistance, when the output is driven hard into the 
positive rail, is about 1 00Q as the output starts to source 



current; this resistance drops to about 20C2as the current 
increases. Therefore when the output sources 1mA, the 
output will swing to within 0.7V of the positive supply. 
While sourcing 30mA, it is within 1.25V of the positive 
supply. 

The output of the LT1 21 5/LT1 21 6 will swing to within 5mV 
of the negative supply while sinking zero current. Thus, in 
a typical single supply application with the load going to 
ground, the output will go to within 5mV of ground. The 
open-loop output resistance when the output is driven 
hard into the negative rail is about 25Qat low currents and 
reduces to about 21 Qat high currents. Therefore when the 
output sinks 1mA, the output is about 30mV above the 
negative supply and while sinking 30mA, it is about 
630mV above it. 

The output of the LT1215/LT1216 has reverse-biased 
diodes to each supply. If the output isforced beyond either 
supply, unlimited currents will flow. If the current is 
transient and limited to several hundred mA, no damage 
will occur. 

Feedback Components 

Because the input currents of the LT1 21 5/LT1 21 6 are less 
than 600nA, it is possible to use high value feedback 
resistors to set the gain. However, care must be taken to 
insure that the pole that is formed by the feedback resis- 
tors and the input capacitance does not degrade the 
stability of the amplifier. For example, if a single supply, 
noninverting gain of two is set with two 1 0k resistors, the 
LT1215/LT1216 will probably oscillate. This is because 
the amplifier goes open-loop at 7MHz (6dB of gain) and 
has 50° of phase margin. The feedback resistors and the 
10pF input capacitance generate a pole at 3MHz that 
introduces 67° of phase shift at 7MHz! The solution is 
simple, lowerthe values of the resistors or add a feedback 
capacitor of 1 0pF or more. 



TECHNOLOGY 



2-205 



I 



LT1215/LT1216 



nppucOTions inFORmnnon 

Comparator Applications 

Sometimes it is desirable to use an op amp as a compara- 
tor. When operating the LT1215/LT1216 on a single 3.3V 
or 5V supply, the output interfaces directly with most TTL 
and CMOS logic. 

The response time of the LT1215/LT1216 is a strong 
function of the amount of input overdrive as shown in the 



LT1215 Comparator Response (+) 
20mV, 10mV, 5mV, 2mV Overdrives 




Vs = 5V msnsAioi 



following photos. These amplifiers are unity-gain stable 
op amps and not fast comparators, therefore, the logic 
being driven may oscillate due to the long transition time. 
The output can be speeded up by adding 20mV or more of 
hysteresis (positive feedback), but the offset is then a 
function of the input direction. 



LT1215 Comparator Response (-) 
20mV, 10mV, 5mV, 2mV Overdrives 





2-206 JIT\MM 



LT1215/LT1216 



TVPICRL flPPLICHTIOnS 

Single Supply, AC Coupled Input, RMS Calibrated, Average Detector 




LT1 21 6 Photo Diode Amplifier 

■ 



TRANSIENT RESPONSE 




2-207 



TECHNOLOGY 



LT1227 

140MHz Video Current 
Feedback Amplifier 



F€RTUR€S 

- 140MHz Bandwidth: A v = 2, R L = 150Q 

- 1100V/us Slew Rate 

■ Low Cost 

■ 30mA Output Drive Current 

■ 0.01% Differential Gain 

■ 0.01° Differential Phase 

■ High Input Impedance: 14MQ, 3pF 

■ Wide Supply Range: ±2V to ±15V 

■ Shutdown Mode: Is < 250uA 

■ Low Supply Current: Is = 10mA 

■ Inputs Common Mode to Within 1 .5V of Supplies 

■ Outputs Swing Within 0.8V of Supplies 

nppucnTions 

■ Video Amplifiers 

■ Cable Drivers 

■ RGB Amplifiers 

■ Test Equipment Amplifiers 

■ 50Q Buffers for Driving Mixers 



D€SCMPTIOn 

The LT1227 is a current feedback amplifier with wide 
bandwidth and excellent video characteristics. The low 
differential gain and phase, wide bandwidth, and 30mA 
output drive current make the LT1227 well suited to drive 
cables in video systems. 

A shutdown feature switches the device into a high imped- 
ance, low current mode, allowing multiple devices to be 
connected in parallel and selected. Input to output isola- 
tion in shutdown is 70dBat10MHzfor input amplitudes up 
to 10Vp.p. The shutdown pin interfaces to open collector 
or open drain logic and takes only 4ns to enable or disable. 

The LT1227 comes in the industry standard pinout and 
can upgrade the performance of many older products. For 
a dual or quad version, see the LT1 229/1 230 data sheet. 

The LT1227 is manufactured on Linear Technology's 
proprietary complementary bipolar process. 



typical nppiicnTion 



Video Cable Driver 




Differential Gain and Phase 
vs Supply Voltage 



20 
3 ,6 

LU 
□ 

| 0.12 

Q- 
<. 

z 0.08 



II 

NTSC COMPOSITE 












1- 


3.5 


MH 




























































































































































"s 




iS 

















5 7 9 11 13 15 
SUPPLY VOLTAGE (±V) 

LT1227 • TAOS 



2-208 



LT1227 



niisoiuTC maximum rrtirgs 

Supply Voltage ±18V 

Input Current ±15mA 

Output Short Circuit Duration (Note 1) Continuous 

Operating Temperature Range 

LT1227C 0°C to 70°C 

LT1227M -55°Cto125°C 

Storage Temperature Range -65°C to 150°C 

Junction Temperature 

Plastic Package 150°C 

Ceramic Package 175°C 

Lead Temperature (Soldering, 10 sec.) 300°C 



PRCKRG€/ORD€R IRFORmflTIOO 




7] SHUTDOWN 

JJ OUT 
JJ NULL 



J8 PACKAGE N8 PACKAGE 

8-LEAD CERAMIC DIP 8-LEAD PLASTIC DIP 

TjMAX = 175°C,e JA =100"C/W(J) 
Tjmax = 1 50-C, e JA = 1 00°C/W (N) 



NULL [T 
-IN [T 
+IN [T 



JJ SHUTDOWN 
7J V* 
JJ OUT 
J] NULL 



S8 PACKAGE 
8-LEAD PLASTIC SO 

Tjmax = l50°C,ej A =l50°C/w 



ORDER PART 
NUMBER 



LT1227MJ8 
LT1227CN8 



LT1227CS8 



S8 PART MARKING 



1227 



Consult factory for Industrial grade parts. 



CLCCTRICfll CHRRRCTCRISTICS 



V C m = 0, ±5V < V s < +15V, pulse tested, unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS 


MIN TYP MAX 


UNITS 


Vos 


Input Offset Voltage 


T A = 25°C 




±3 ±10 
±15 


mV 
mV 




Input Offset Voltage Drift 






10 


uV/°C 


!|N+ 


Noninverting Input Current 


T A = 25°C 




±0.3 ±3 
±10 


uA 
uA 


Illr 


Inverting Input Current 


T A = 25°C 




±10 ±60 
±100 


uA 
HA 


e n 


Input Noise Voltage Density 


f = 1kHz, R F = 1k, R G = 10£i, R s = 0n 




3.2 


nV/VHz 


+in 


Noninverting Input Noise Current Density 


f = 1kHz 




1.7 


pA/VHz 


"in 


Inverting Input Noise Current Density 


f = 1kHz 




32 


pA/VHz 


R|N 


Input Resistance 


V| N = ±13V, V S = ±15V 
V| N = ±3V,V S = ±5V 




1.5 14 
1.5 11 


MS2 
MQ 


GfN 


Input Capacitance 






3 


PF 




Input Voltage Range 


V S = ±15V,T A = 25°C 
V S = ±5V,T A = 25°C 




±13 ±13.5 
±12 

±3 ±3.5 
±2 


V 
V 
V 
V 


CMRR 


Common-Mode Rejection Ratio 


V S = ±15V, V CM = ±13V,T A = 25°C 
V S = ±15V,V CM = ±12V 
V S = ±5V,V C M = ±3V,T A = 25°C 
V s = ±5V,Vcm = ±2V 




55 62 
55 

55 61 
55 


dB 
dB 
dB 
dB 




Inverting Input Current 
Common-Mode Rejection 


V S = ±15V, V CM = ±13V,T A = 25°C 
V S = ±15V, V CM = ±12V 
Vs = ±5V,V CM = ±3V,T A = 25°C 
V s = ±5V.Vcm = ±2V 




3.5 10 
10 

4.5 10 
10 


uA/V 
uA/V 
uA/V 
uA/V 



2-209 



LT1227 



€l€CTRICfll CHRRRCT€RISTICS V CM = O, ±5V < V s < ±1SW. pulse tested, unless otherwise noted 



O I IVIDUL 


PARAMETER 


CONDITIONS 


MIN 


TYP 


MAX 


UNITS 


PSRR 


Power Supply Rejection Ratio 


V s = ±2Vto±15V,T A = 25°C 




60 


80 




dB 






V S = ±3V to ±1 5V 


• 


60 






HO 

db 




Noninverting Input Current 


V S = ±2V to±15V,T A = 25°C 






2 


50 


nA/V 




Power Supply Rejection 


V s = ±3Vto±15V 


• 






3U 


nA/V 




Inverting Input Current 


V s = +2Vto±15V,T A = 25°C 






n 9^ 


(; 
u 


nA/\/ 




Power Supply Rejection 


V s = ±3Vto±15V 


• 






c 

u 


,,A/\/ 
U/VV 


Av 


Large-Signal Voltage Gain 


V S = ±15V, V 0U T = ±10V, R L = 1k 


• 


55 


72 




dB 






V s = ±5V, Vout = ±2V, R L = 150ft 


• 


DO 


70 
/ L 




HQ 
OD 




Transresistance, aVqijj/AIin- 


V S = ±15V, V OU T = ±10V, R L = 1k 


• 


100 


270 




I/O 






Vs = ±5V. Vout = ±2V, Rl = 1 50ft 


• 


100 


240 




kil 




"OUT 


Mavimiim fliitmit Vnltano Quuinn 
ividxn 1 1 ui 1 1 uuipui vuiLdyc owiny 


Vs = ±15V, Rl = 400ft, T A = 25°C 




+12 


±13.5 




V 








• 


+10 






V 






Vs = ±5V, R L = 1 50ft, T A = 25°C 




±3 


±3.7 




V 








• 


±2.5 






V 


'OUT 


Maximum Output Current 


Rl = On, T A = 25°C 




30 


60 




mA 


Is 


Supply Current (Note 2) 


V S = ±15V. V 0UT = OV. T A = 25°C 






10 


15.0 


mA 






• 






17.5 


mA 




Positive Supply Current, Shutdown 


V s = ±15V, Pin 8 Voltage = OV, T A = 25°C 






120 


300 


uA 








• 






500 


uA 


is 


Shutdown Pin Current (Note 3) 


V S = ±15V 


• 


300 


MA 




Output Leakage Current, Shutdown 


V s = ±1 5V, Pin 8 Voltage = OV, T A » 25°C 




10 


MA 


SR 


Slew Rate (Notes 4 and 5) 


T A = 25°C 




500 


1100 




V/ms 


t r , t f 


Rise and Fall Time, Vout = 1 Vp-p 




| 87 I ns 


BW 














MHz 


t„t f 


Small-Signal Rise and Fall Time 


V S = ±15V, Rp = 1k, R G = Ik, R L = 100Q 




3.3 


ns 




Propagation Delay 


V S = ±15V, Rf = 1k, R G = 1k, R L = 100£2 




3.4 


ns 




Small-Signal Overshoot 


V S = ±15V, Rp = 1 k, R G = 1k, R L = 100£i 




5 


% 


ts 


Settling Time 


0.1%, V 0UT = 10V, Rp = 1k, R G = 1k, R L = 1k 




50 


ns 




Differential Gain (Note 6) 


V s = ±1 5V, Rp = 1 k, R G = 1 k, R L = 1 50S1 






0.014 




% 






V S = ±15V, Rp = 1k, R G = 1k, Rl = 1k 






0.010 




% 




Differential Phase (Note 6) 


V S = +15V, Rp = 1k, R G = 1k, R L = 150fi 






0.010 




DEG 






V S = +15V, R F = 1k, R 6 = 1 k, Rl = 1k 






0.013 




DEG 



The • denotes specifications which apply over the operating temperature 
range. 

Note 1: A heat sink may be required depending on the power supply 
voltage. 

Note 2: The supply current of the LT1 227 has a negative temperature 
coefficient. For more information, see Typical Performance Characteristics 
curves. 

Note 3: Ramp pin 8 voltage down from 15V while measuring Is. When Is 
drops to less than 0.5mA, measure pin 8 current. 



Note 4: Slew rate is measured at ±5V on a +10V output signal while 
operating on ±15V supplies with R F = 2k, R G = 220Q. and R L = 400ft 
Note 5: AC parameters are 100% tested on the ceramic and plastic DIP 
package parts (J and N suffix) and are sample tested on every lot of the 
SO packaged parts (S suffix). 
Note 6: NTSC composite video with an output level of 2V. 



2-210 



LT1227 



tvpicrl P€RFORmnnc€ cHnRnaemsTics 



Voltage Gain and Phase vs 
Frequency, Gain = 6dB 



-3dB Bandwidth vs Supply 
Voltage, Gain = 2, R L = 100Q 



-3dB Bandwidth vs Supply 
Voltage, Gain = 2, R L = 1k 



PH 


AS 


E. 




















































































GA 


N 








































* 






























W 
OSi 
















"V S = ±1 
R L = 10 
R F = 91 
















Do 



















45 i 

90 £ 

135 3 

180 | 
225 



180 
160 
_ 140 
g.120 
s 100 

s 

i 80 

< 

m 

m 60 
1 40 
20 



1 1 1 1 1 

PEAKING <0.5d8 










- - PEAKING < 


5dB 












R F = 500Ci 












Rf = 


750; 




























1k 








/ 












































"fiT 


2k 
















1 







1 10 
FREQUENCY (MHz) 



100 



Voltage Gain and Phase vs 
Frequency, Gain = 20dB 



2 4 6 8 10 12 14 16 18 
SUPPLY VOLTAGE (±V) 

LT1227-TPC02 

-3dB Bandwidth vs Supply 
Voltage, Gain = 10, R L = 100« 




2 4 6 8 10 12 14 16 18 
SUPPLY VOLTAGE (±V) 

LT1227-TPC03 

-3dB Bandwidth vs Supply 
Voltage, Gain = 10. R L = 1k 




1 10 
FREQUENCY (MHz) 



4 6 8 10 12 14 16 18 
SUPPLY VOLTAGE (±V) 

LT1227-TPC0S 



2 4 6 8 10 12 14 16 18 
SUPPLY VOLTAGE (±V) 

LT1227 - TPC06 



Voltage Gain and Phase vs 
Frequency, Gain = 4DdB 




1 10 

FREQUENCY (MHz) 



-3dB Bandwidth vs Supply 
Voltage, Gain = 100, R L = 100Q 










18 




-a 






45 


I 




16 










90 


m 

Ui 

3: 




14 


135 




MH 


12 






i 


180 




E 

D 


10 


225 




S 



















































00£> 




















H 


F = 1k 














" R 


F = 2 













































































2 



4 6 8 10 12 14 16 18 
SUPPLY VOLTAGE (±V) 



-3dB Bandwidth vs Supply 
Voltage, Gain = 100, R L = 1k 











I 

_ Knnn 














-R F 








F = 1 


































** R 

































































































2 



4 6 8 10 12 14 16 18 
SUPPLY VOLTAGE (±V) 



2-211 



LT1227 



Tvpicnt p€RFORmnnce chrrrctcristics 



Maximum Capacitive Load 
vs Feedback Resistor 




1 2 3 

FEEDBACK RESISTOR (kn) 

LTIK7-TPC10 



Input Common Mode Limit 
vs Temperature 



















v*= 


2VTQ18V 
















































































V" = - 


-2VT0 


-18V 



































-50 -25 25 50 75 100 125 
TEMPERATURE (°C) 

Spot Noise Voltage and Current 
vs Frequency 



Total Harmonic Distortion 
vs Frequency 



IV s = t15V 
~R L = 400Si 

Rc = Rn = 1k 




































































































V 


























= 


7V„„ 
















































L 






















! 
























1V RM 


s 









































100 1k 10k 

FREQUENCY (Hz) 



Output Saturation Voltage 
vs Temperature 



100k 



I 

R L = °° 

*2V<V s <i18V 































































































-50 -25 25 50 75 100 125 
TEMPERATURE (°C) 

LT1227-TPCt« 

Power Supply Rejection 



Maximum Undistorted Output 
vs Frequency 

















I 1 I 1 1 1 

V S = ±15V 

R L =1k 

Rc=1k 














































A. 


= +10 




















-1 






Av 


= + 


\ 














































\ 


\a v 

























































100 



FREQUENCY (MHz) 



LT11Z7-TPC12 



Output Short-Circuit Current 
vs Junction Temperature 




-50 -25 25 50 75 100 125 150 175 
TEMPERATURE (°C) 



Output Impedance vs Frequency 




10 100 1k 10k 100k 

FREQUENCY (Hz) 

IT1727 • TPCtt 



100k 1M 10M 
FREQUENCY (Hz) 



100k 1M 10M 
FREQUENCY (Hz) 



2-212 



rrmm 



LT1227 



TYPICAL P€RFOftmnnC€ CHfiRnCT€RISTICS 



Settling Time to 10mV 
vs Output Step 




20 40 60 
SETTLING TIME {ns) 



Settling Time to 1mV 
vs Output Step 




12 16 
SETTLING TIME (us) 

IT1!27-TPCM 



20 



Supply Current vs Supply Voltage 





14 




13 


< 

§ 


12 


11 




10 


cc 






9 


CD 

o 




>■ 


8 






SUPI 


7 













































-55 




































25 


%^ 




































125 




















175 













































2 4 6 8 10 12 14 16 18 
SUPPLY VOLTAGE (±V) 

LT1227.TPC21 



Output Impedance in Shutdown 
vs Frequency 




100k 



1M 10M 
FREQUENCY (Hz) 



2nd and 3rd Harmonic Distortion 
vs Frequency 



V S = ±15V 
























Vo = 
-Rl = 

R F = 
-A v = 


2V P -p 

moo 
























B20O 


































































2N 


c I 






























3 

























































































































10 100 
FREQUENCY (MHz) 



Differential Phase vs Frequency 



Differential Gain vs Frequency 




1M 10M 
FREQUENCY (Hz) 



100M 



LTI227-TPC23 



3rd Order Intercept vs Frequency 



45 

_ 40 

E 

m 

£ 35 

o 
cc 

I 30 

I 25 
o 
o 
cc 

" 20 
15 



1M 10M 
FREQUENCY (Hz) 



Test Circuit for 3rd Order Intercept 



















1 1 1 

V S = ±15V 

R L = moo 






















63 

75 


a 
a 




































































































750 £ 50Q 

MEASU 

— IH7TC 



10 20 30 40 50 
FREQUENCY (MHz) 

U1277-1 



2-213 



LT1227 



simpiiFicD scHcmnnc 




nppucnTions infORmfiTion 

The LT1227 is a very fast current feedback amplifier. 
Because it is a current feedback amplifier, the bandwidth 
is maintained over a wide range of voltage gains. The 
amplifier is designed to drive low impedance loads such as 
cables with excellent linearity at high frequencies. 

Feedback Resistor Selection 

The small-signal bandwidth of the LT1227 is set by the 
external feedback resistors and the internal junction ca- 
pacitors. As a result, the bandwidth is a function of the 
supply voltage, the value of the feedback resistor, the 
closed-loop gain and load resistor. The characteristic 
curves of Bandwidth vs Supply Voltage show the effect of 
a heavy load (100Q) and a light load (1k). These curves 
use a solid line when the response has less than 0.5dB of 
peaking and a dashed line when the response has 0.5dB to 



5dB of peaking. The curves stop where the response has 
more than 5dB of peaking. 

At a gain of two, on +15V supplies with a 1k feedback 
resistor, the bandwidth into a light load is over 140MHz, 
but into a heavy load the bandwidth reduces to 120MHz. 
The loading has this effect because there is a mild reso- 
nance in the output stage that enhances the bandwidth at 
light loads but has its Q reduced by the heavy load. This 
enhancement is only useful at low gain settlings; at a gain 
of ten it does not boost the bandwidth. At unity gain, the 
enhancement is so effective the value of the feedback 
resistor has very little effect. At very high closed-loop 
gains, the bandwidth is limited by the gain bandwidth 
product of about 1GHz. The curves show that the band- 
width at a closed-loop gain of 1 00 is 1 2MHz, only one tenth 
what it is at a gain of two. 



2-214 



LT1227 



nppucmions inFORmnnon 



Small-Signal Rise Time, Ay = +2 




R F = Ik, R G =lk.R L = l00n *i 



Capacitance on the Inverting Input 

Current feedback amplifiers require resistive feedback 
from the output to the inverting input for stable operation. 
Take care to minimize the stray capacitance between the 
output and the inverting input. Capacitance on the invert- 
ing input to ground will cause peaking in the frequency 
response (and overshoot in the transient response), but it 
does not degrade the stability of the amplifier. 

Capacitive Loads 

The LT1227 can drive capacitive loads directly when the 
proper value of feedback resistor is used. The graph of 
Maximum Capacitive Load vs Feedback Resistor should 
be used to select the appropriate value. The value shown 
isfor5dB peaking when driving a 1 k load ata gain of 2. This 
is a worst case condition, the amplifier is more stable at 
higher gains and driving heavier loads. Alternatively, a 
small resistor (1 OQ to 2QQ.) can be put in series with the 
output to isolate the capacitive load from the amplifier 
output. This has the advantage that the amplifier band- 
width is only reduced when the capacitive load is present 
and the disadvantage that the gain is a function of the load 
resistance. 

Power Supplies 

The LT1 227 will operate from single or split supplies from 
±2V (4V total) to ±1 5V (30V total). It is not necessary to 
use equal value split supplies, however the offset voltage 



and inverting input bias current will change. The offset 
voltage changes about 500u.V per volt of supply mis- 
match. The inverting bias current can change as much as 
5.0uA per volt of supply mismatch, though typically the 
change is less than 0.5uA per volt. 

Slew Rate 

The slew rate of a current feedback amplifier is not 
independent of the amplifier gain configuration the way 
slew rate is in atraditional op amp. This is because both the 
input stage and the output stage have slew rate limitations. 
In the inverting mode, and for higher gains in the 
noninverting mode, the signal amplitude between the 
input pins is small and the overall slew rate is that of the 
output stage. For gains less than ten in the noninverting 
mode, the overall slew rate is limited by the input stage. 

The input stage slew rate of the LT1227 is approximately 
125V/ns and is set by internal currents and capacitances. 
The output slew rate is set by the value of the feedback 
resistors and the internal capacitances. At a gain of ten 
with a 1 k feedback resistor and ±1 5V supplies, the output 
slew rate is typically 1 1 0OV/ps. Larger feedback resistors 
will reduce the slew rate as will lower supply voltages, 
similar to the way the bandwidth is reduced. 

The graph of Maximum Undistorted Output vs Frequency 
relates the slew rate limitations to sinusoidal inputs for 
various gain configurations. 

Large-Signal Transient Response, A v = +1 







■ 


m 


mum 


M 


rrr" 










■■ 












Jj 
/ 




N 










I / 






mm* 










"j 






mmm 


m 






> 


I 






mmm 


HI 


— , 












i 










5U 






| 10. 









R F = 910O. R G =100n, R L = 400ii 



2-215 



LT1227 



nppucmrions inFORmnuon 

Large-Signal Transient Response, A v = +2 




Rp = 1k, R G =1k,R L = 400£2 



Large-Signal Transient Response, A v = -2 




R F = 1k.R G =510Q. R L = 400n 

Settling Time 

The characteristic curves show that the LT1 227 amplifier 
settles to within 1 0mV of final value in 40ns to 55ns for any 
output step up to 1 0V. The curve of settling to 1 mV of final 
value shows that there is a slowerthermal contribution up 
to 20u5. The thermal settling component comes from the 
output and the input stage. The output contributes just 
under 1mV per volt of output change and the input 
contributes 300uV per volt of input change. Fortunately 
the input thermal tends to cancel the output thermal. For 
this reason the noninverting gain of two configuration 
settles faster than the inverting gain of one. 



Shutdown 

The LT1227 has a high impedance, low supply current 
mode which is controlled by pin 8. In the shutdown mode, 
the output looks like a 12pF capacitor and the supply 
current drops to approximately the pin 8 current. The 
shutdown pin is referenced to the positive supply through 
an internal pullup circuit (see the simplified schematic). 
Pulling a current of greater than 50uA from pin 8 will put 
the device into the shutdown mode. An easy way to force 
shutdown is to ground pin 8, using open drain (collector) 
logic. Because the pin is referenced to the positive supply, 
the logic used should have a breakdown voltage of greater 
than the positive supply voltage. No other circuitry is 
necessary as an internal JFET limits the pin 8 current to 
about 100(jA. When pin 8 is open, the LT1227 operates 
normally. 

Differential Input Signal Swing 

The differential input swing is limited to about ±6V by an 
ESD protection device connected between the inputs. In 
normal operation, the differential voltage between the 
input pins is small, so this clamp has no effect; however, 
in the shutdown mode, the differential swing can be the 
same as the input swing. The clamp voltage will then set 
the maximum allowable input voltage. To allow for some 
margin, it is recommended that the input signal be less 
than +5V when the device is shutdown. 

Offset Adjust 

Pins 1 and 5 are provided for offset nulling. A small current 
to V + or ground will compensate for DC offsets in the 
device. The pins are referenced to the positive supply (see 
the simplified schematic) and should be left open if un- 
used. The offset adjust pins act primarily on the inverting 
input bias current. A 1 0k pot connected to pins 1 and 5 with 
the wiper connected to V + will null out the bias current, but 
will not affect the offset voltage much. Since the output 
offset is 

Vo = A v «Vos + (Iin-)*Rf 

at higher gains (Ay > 5), the Vqs term will dominate. To null 
out the Vns term, use a 1 0k pot between pins 1 and 5 with 
a 150k resistor from the wiper to ground for 15V split 

supplies, 47k for 5V split supplies. 



2-216 



LT1227 



TVPICRL flPPLICRTIOnS 

MUX Amplifier 

The shutdown function can be effectively used to con- 
struct a MUX amplifier, A two-channel version is shown, 
but more inputs could be added with suitable logic. By 
configuring each amplifier as a unity-gain follower, there 
is no loading by the feedback network when the amplifier 
is off. The open drains of the 74C906 buffers are used to 
interface the 5V logic to the shutdown pin. Feedthrough 
from the unselected input to the output is -70dB at 
1 0MHz. The differential voltage between MUX inputs V| N1 
and V|N2 appears across the inputs of the shutdown 
device, this voltage should be less than ±5V to avoid 
turning on the clamp diodes discussed previously. If the 
inputs are sinusoidal having a zero DC level, this implies 
that the amplitude of each input should be less than 
5Vp.p. The output impedance of the off amplifier remains 
high until the output level exceeds approximately 6V P .p at 
1 0MHz, this sets the maximum usable output level. Switch- 
ing time between inputs is about 4us without an external 
pullup. Adding a 1 0k pullup resistor from each shutdown 
pin to V + will reduce the switching time to 2us but will 
increase the positive supply current in shutdown by 1 .5mA. 



MUX Output 




V|N1=1V P -P,V| K =0V 



MUX Amplifier 




mi TAW 



MUX Input Crosstalk vs Frequency 



-40 




-90 1 1 — 1 1 1 

1 10 100 

FREQUENCY (MHz) 

LT1M7TA05 



2-217 



LT1227 



TVPicni nppiicnTions 



Single Supply AC-Coupled Amplifier 
Noninverting 



Single Supply AC-Coupled Amplifier 
Inverting 



VOUT 




^I50k zjz 



Z^Z 75pF 

i 3.579545MHz 




Bin 

VoUT 



CMOS Logic to Shutdown Interface 





VOUT 



vin — vvv — j | — vw 



Buffer with DC Nulling Loop 



I— MA,— * 

o iixF rv. 5 



h 



180Si> >180S2 




Optional Offset Nulling circuit 

Bnull 




R NULL .47kF0RV s .±5V 
R N ua= 150k FOR V S >±15V 

1BTTAII 



2-218 



LinCAE. 



LT1251/LT1256 



ECHNOLOGY 40MHz Video Fader and 
DC Gain Controlled Amplifier 



F€RTUR€S 

■ Accurate Linear Gain Control: ±1% Typ, ±3% Max 

■ Constant Gain with Temperature 

■ Wide Bandwidth: 40MHz 

■ High Slew Rate: 300V/ns 

■ Fast Control Path: 10MHz 

■ Low Control Feedthrough: 2.5mV 

■ High Output Current: 40mA 

■ Low Output Noise 

45nV/VHzatA v = 1 
270nVA/HzatA v = 100 

■ Low Distortion: 0.01% 

■ Wide Supply Range: +2.5V to ±15V 

■ Low Supply Current: 13mA 

■ Low Differential Gain and Phase: 0.02%, 0.02° 

nppucflTions 

■ Composite Video Gain Control 

■ RGB, YUV Video Gain Control 

■ Video Faders, Keyers 

■ Gamma Correction Amplifiers 

■ Audio Gain Control, Faders 

■ Multipliers, Modulators 

■ Electronically Tunable Filters 



DCSCRIPTIOn 

The LT1251/LT1256 are two-input, one-output, 40MHz 
current feedback amplifiers with a linear control circuit 
that sets the amount each input contributes to the output. 
These parts make excellent electronically controlled vari- 
able gain amplifiers, filters, mixers and faders. The only 
external components required are the power supply by- 
pass capacitors and the feedback resistors. Both parts 
operate on supplies from ±2.5V (or single 5V) to +15V 
(or single 30V). 

Absolute gain accuracy is trimmed at wafer sort to mini- 
mize part-to-part variations. The circuit is completely 
temperature compensated. 

The LT1 251 includes circuitry that eliminates the need for 
accurate control signals around zero and full scale. For 
control signals of less than 2% or greater than 98%, the 
LT1251 sets one input completely off and the other 
completely on. This is ideal for fader applications because 
it eliminates off-channel feedthrough due to offset or gain 
errors in the control signals. 

The LT1 256 does not have this on/off feature and operates 
linearly over the complete control range. The LT1256 is 
recommended for applications requiring more than 20dB 
of linear control range. 



TVPicm nppucOTion 

Two-Input Video Fader 




10 ' 


>i.5k : 


9 - 

8 









1.5k 



LT1256 

Gain Accuracy vs Control Voltage 



I 

V S = ±5V 
















v F 




5V 






































































































































GAI 


J AC 


CUR 


m 


%)= 


ki 




v 

2. 


1* 


100 



VOUT 



0.5 1.0 1.5 2.0 2.5 
CONTROL VOLTAGE (V) 



2-219 



LT1251/LT1256 



absolute mnximum rrtirgs 

Total Supply Voltage (V + to V") 36V 

Input Current +15mA 

Input Voltage on Pins 3,4,5,10,11,12 V"to V + 

Output Short Circuit Duration (Note 1) Continuous 

Specified Temperature Range (Note 2) 0°C to 70°C 

Operating Temperature Range -40°C to 85°C 

Storage Temperature Range -65°C to 150°C 

Junction Temperature (Note 3) 150°C 

Lead Temperature (Soldering, 10 sec) 300°C 



PACKRG€/ORD€R IflFORfRRTIOn 



IN1 [T 
FBI \Y 

v c [T 

NULL [T 

v-[7 




~w] IN2 
TT| FB2 

TTJ Ifs 
io] Rfs 
1~| V 

TKuT 



N PACKAGE 
14-LEAD PLASTIC DIP 



S PACKAGE 
14-LEAD PLASTIC SOIC 



T JMS x = 150 , C,6 JA = 70°C/W(N) 
Tj MS x = 150*C.e JA = 100°C/W(S) 



ORDER PART 
NUMBER 



LT1251CN 
LT1251CS 
LT1256CN 
LT1256CS 

(Note 2) 



Consult factory for Industrial and Military grade parts. 



SIGRRL flmPUFKR RC CHRRRCT€RISTICS 



0°C < T A < 70°C, V s = +5V, V IN = 1 V RMS , • = 1kHz, A VM ax = 1 , R F i = R F2 = 1 -5k, V FS = 2.5V, l c = l FS = NULL = Open, Pins 5,10 = GND, 
unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS 


MIN 


TYP MAX 


UNITS 


2%IN1 


2% Input 1 Gain 


V c (Pin 3) = 0.05V 


LT1251 
LT1256 






0.1 


0.1 
5.0 


% 
% 


10%IN1 


10% Input 1 Gain 


V c (Pin 3) = 0.25V 




7 


13 


% 


20%IN1 


20% Input 1 Gain 


V c (Pin 3) = 0.50V 




17 


23 


% 


30%IN1 


30% Input 1 Gain 


V c (Pin 3) = 0.75V 




27 


33 


% 


40%IN1 


40% Input 1 Gain 


V c (Pin 3) = 1.00V 




37 


43 


% 


50%IN1 


50% Input 1 Gain 


V c (Pin 3) = 1.25V 




47 


53 


% 


60%IN1 


60% Input 1 Gain 


V c (Pin 3) = 1.50V 




57 


63 


% 


70%IN1 


70% Input 1 Gain 


V c (Pin 3) = 1.75V 




67 


73 


% 


807.IN1 


80% Input 1 Gain 


V C (Pin 3) = 2.00V 




77 


83 


% 


90%IN1 


90% Input 1 Gain 


V c (Pin 3) = 2.25V 




87 


93 


% 


98%IN1 


98% Input 1 Gain 


V c (Pin 3) = 2.45V 


LT1251 
LT1256 




99.9 
95.0 


100.0 

99.9 


% 
% 


2%IN2 


2% Input 2 Gain 


V c (Pin 3) = 2.45V 


LT1251 
LT1256 






0.1 


0.1 
5.0 


% 
% 


10%IN2 


10% Input 2 Gain 


V c (Pin 3) = 2.25V 




7 


13 


% 


207.IN2 


20% Input 2 Gain 


V c (Pin 3) = 2.00V 




17 


23 


% 


30%IN2 


30% Input 2 Gain 


V c (Pin 3) = 1.75V 




27 


33 


% 


40%IN2 


40% Input 2 Gain 


V c (Pin 3) = 1.50V 




37 


43 


% 


507.IN2 


50% Input 2 Gain 


V c (Pin 3) = 1.25V 




47 


53 


% 


60%IN2 


60% Input 2 Gain 


V c (Pin 3) = 1.00V 




57 


63 


% 


70%IN2 


70% Input 2 Gain 


V c (Pin 3) = 0.75V 




67 


73 


% 


80%IN2 


80% Input 2 Gain 


V c (Pin 3) = 0.50V 




77 


83 


% 


907.IN2 


90% Input 2 Gain 


V c (Pin 3) = 0.25V 




87 


93 


% 


98%IN2 


98% Input 2 Gain 


V c (Pin 3) = 0.05V 


LT1251 
LT1256 




99.9 
95.0 


100.0 
99.9 


% 
% 



2-220 



LT1 251 /LT1 256 



siGnni nmpuFicR nc chrrrctcristics 

0°C < T A < 70°C, V s = +5V, V| N = 1 Vrms, f = 1kHz, Avmax = 1 , Rfi = Rf2 = 1 -5k, V F s = 2.5V, l c = l F s = NULL = Open, Pins 5,10 = GND, 
unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS 


■All! Tlin IIIU 

MIN TYP MAX 


UNITS 




Gain Supply Rejection 


V c = 1.25V, V s = +5Vto±15V 


• 


0.03 0.10 


%/V 




External Resistor Gain 
50% Input 1 


Pins 5,10 = Open, External 5k Resistors 
from Pins 4,1 1 to Ground, Vc = 1 .25V 


• 


45 55 


% 


SR 


Slew Rate 


V| N = ±2.5V, V at±2V, R L = 150Q 


• 


150 300 


V/us 




Control Feedthrough 


V c = 1 .25VDC + 2.5Vp- P at 1 kHz 




2.5 


mVp.p 




Full Power Bandwidth 


Vo = 1V RMS 




20 


MHz 


BW 


Small-Signal Bandwidth 


V S = ±5V 
V S = ±15V 




30 
40 


MHz 
MHz 




Differential Gain (Notes 4,5) 


Control = 0% or 100% 
Control = 25% or 75% 




0.02 
0.90 


% 
% 




Differential Phase (Notes 4,5) 


Control = 0% or 100% 
Control = 25% or 75% 




0.02 
0.55 


DEG 
DEG 


THD 


Total Harmonic Distortion 


Gain = 100% 
Gain = 50% 
Gain = 10% 




0.002 
0.015 
0.4 


% 
% 
% 


t r ,t( 


Rise Time, Fall Time 


10% to 90%,V = 100mV 




11 


ns 


OS 


Overshoot 


V = 100mV 




3 


% 


tpD 


Propagation Delay 


V = 100mV 




10 


ns 


k 


Settling Time 


0.1%,AV = 2V 




65 


ns 



SIGRRL RmPUFI€R DC CHRRRCTCRISTICS 

C < T A < 70 C, V s = ±5V, V CM = 0V, V FS = 2.5V, l c = Irs = NULL = Open, Pins 5,10 = GND, unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS 


MIN 


TYP 


MAX 


UNITS 


Vos 


Input Offset Voltage 


Either Input 

Difference Between Inputs 


• 
• 


-3 


2 
1 


5 
3 


mV 
mV 




Input Offset Voltage Drift 






10 


|xV/°C 


l|N + 


Noninverting Input Bias Current 


Either Input 


• 


-2.5 


0.5 


2.5 


uA 


l|N~ 


Inverting Input Bias Current 


Either Input 

Difference Between Inputs 


• 


-30 
-1 


10 
0.5 


30 


uA 
MA 






• 


1 




Inverting Input Bias Current Null Change 


Null (Pin 6) Open toV" 


• 


-280 


-170 


-60 


uA 


e n 


Input Noise Voltage Density 


f = 1 kHz 




2.7 


nV/VRz 


+in 


Noninverting Input Noise Current Density 


f = 1 kHz 




1.5 


pA/VHz 


-in 


Inverting Input Noise Current Density 


f = 1kHz 




29 


pAA/Hz 


R|N 


Input Resistance 


Either Noninverting Input 




5 


17 




Mn 


C|N 


Input Capacitance 


Either Noninverting Input 




1.5 


PF 




Input Voltage Range 


V S = ±5V 
V S = 5V 




+3 
2 


+3.2 


3 


V 
V 


CMRR 


Common-Mode Rejection Ratio 


V CM =-3Vto3V 

V S = 5V,V CM = 2Vto3V, V 


= 2.5V 




55 
50 


61 

57 




dB 
dB 




Inverting Input Current Common-Mode Rejection 


V CM = -3Vto 3V 

Vs = 5V,V CM = 2Vto 3V, V 


= 2.5V 






0.07 
0.17 


0.25 
0.70 


uA/V 
uA/V 


PSRR 


Power Supply Rejection Ratio 


V S = ±5V to±15V 




70 


76 




dB 




Noninverting Input Current Power Supply Rejection 


V s = +5Vto±15V 






30 


100 


nA/V 




Inverting Input Current Power Supply Rejection 


V s = ±5Vto±15V 






30 


200 


nA/V 



2-221 



LT1251/LT1256 



siGnm nmpuFicR dc chrrrctcristics 

C < T A < 70 C, V s = +5V, V CM = 0V, V FS = 2.5V, l c = l FS = NULL ■ Open, Pins 5,10 = GND, unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS 


MIN 


TYP 


MAX 


UNITS 


AvOL 


Large-Signal Voltage Gain 


V = -3Vto3V, R L = 150Q 




OJ 


CM 




UD 


Rol 


Transresistance. aVqut^Iin" 


V = -3Vto3V, R L = 150S2 




1.0 


1.8 




MQ 


VOUT 


Maximum Output Voltage Swing 


No Load 

R L = 150Q 

V S = ±15V, No Load 

Vs = 5V, V CM = 2.5V, (Note 6) 




±4.0 
±3.0 
±14.0 
1.2 


±4.2 
±3.5 
±14.2 


3.8 


V 
V 
V 
V 


lo 


Maximum Output Current 




V S = ±5V 

V S = 5V, V C M = V = 2.5V 




±30 
+20 


±40 
+30 




mA 
mA 


Is 


Supply Current 




V C = V FS = 2.5V 

V C = V FS = 1.25V 

V c = V FS = 0V 

V C = V FS = 2.5V,V S = ±15V 

V C = V FS = 0V, V S = ±15V 




10.0 
5.0 
0.8 

10.0 
0.8 


13.5 
7.5 
1.3 

14.5 
1.4 


17.0 
9.5 
1.8 
18.5 
2.0 


mA 
mA 
mA 
mA 
mA 


COflTROL ROD FULL SCRL€ RfIlPUFI€R CHRRRCTCRISTICS 

C < T A < 70 C, V$ = ±5U, V FS = 2.5V, l c = l FS = NULL = Open, Pins 5,1 = GND, unless otherwise noted. 


SYMBOL 


PARAMETER 




CONDITIONS 


MIN 


TYP 


MAX 


UNITS 




Control Amplifier Input Offset Voltage 


Pin 4 to Pin 3 


• 


5 15 


mV 




Full Scale Amplifier Input Offset Voltage 


Pin 11 to Pin 12 


• 




5 


15 


mV 






• 




MQ 




Full Scale Amplifier Input Resistance 




• 


25 


100 




M£2 




Control Amplifier Input Bias Current 




• 


-750 


-300 




nA 




Full Scale Amplifier Input Bias Current 




• 


-750 


-300 




nA 


Rc 


Internal Control Resistor 


T A = 25°C 




3.75 


5 


6.25 


kft 


Rfs 


Internal Full Scale Resistor 


T A = 25"C 




4 


5 


6 


kfi 




Resistor Temperature Coefficient 






0.2 


%/°C 




Control Path Bandwidth 


Small Signal, V c = 100mV, (Note 7) 




10 


MHz 




Control Path Rise and Fall Time 


Small Signal, V c = 100mV, (Note 7) 




35 


ns 




Control Path Transition Time 


0% to 100% 




150 


ns 




Control Path Propagation Dela 


y 


Small Signal, AV c = 100mV 
V c from 0% or 100% 




50 
90 


ns 
ns 



The • denotes specifications which apply over the specified operating 
temperature range. 

Note 1: A heat sink may be required depending on the power supply 
voltage. 

Note 2: Commercial grade parts are designed to operate over the 
temperature range of -40°C to 85°C but are neither tested nor guaranteed 
beyond 0°C to 70°C. Industrial grade parts specified and tested over 
-40°C to 85°C are available on special request. Consult factory. 
Note 3: Tj is calculated from the ambient temperature T A and the power 
dissipation P D according to the following formulas: 
LT1251CN/LT1256CN: T, = T A + (P D x 70°C/W) 
LT1 251 CS/LT1 256CS: Tj = T A + (P D x 1 00°C/W) 



Note 4: Differential gain and phase are measured using a Tektronix 
TSG120YC/NTSC signal generator and a Tektronix 1780R Video 
Measurement Set. The resolution of this equipment is 0.1% and 0.1°. Five 
identical amplifier stages were cascaded giving an effective resolution of 

0.02% and 0.02°. 

Note 5: Differential gain and phase are best when the control is set at 0% 
or 100%. See the Typical Performance Characteristics curves. 
Note 6: Tested with R L = 1 50Q to 2.5V to simulate an AC coupled load. 
Note 7: Small-signal control path response is measured driving Rc (pin 5) 
to eliminate peaking caused by stray capacitance on pin 4. 



2-222 



LT1251/LT1256 



TVPicni p€RFORmnnc€ chrrrctcristics 



LT1251 

Gain vs Control Voltage 



0.8 

S 0.6 

SB 

o 0.4 
0.2 





































































OB 
















S = S 


,5V 




































































N 






















\ 






















s 



0.5 1.0 1.5 2.0 
CONTROL VOLTAGE (V) 



& 4 

S 2 
■x 

S o 

C9 

iS -2 

§ -4 



10k 



100k 1M 10M 
FREQUENCY (Hz) 



LT1251/LT1256 
Control Path Bandwidth 



l 


i Minn nil 

OLTAGE DRIVE V 














S = 


±5 


il 


































I 






























































pin 


4 


-JOT 




c 


on 












































| SI 





























































LT1256 

Gain vs Control Voltage 





















/ 
















































Oil 


2" ■ 












V FS = 2.5V 










































an 


1 














































\ 






















\ 



0.5 1.0 1.5 2 
CONTROL VOLTAGE (V) 

LT1251/LT1256 
Control Path Bandwidth 



I I MINI! I I III 
VOLTAGE DRIVE R ( 
V c = GND 







































































































































































































100k 1M 10M 
FREQUENCY (Hz) 



Spot Input Noise Voltage and 
Current vs Frequency 



1 



I 10 



100 1k 
FREQUENCY (Hz) 



Undistorted Output Voltage 
vs Frequency 





































































































































-If 


























































































































































































6fl- 



















































































1M 10M 
FREQUENCY (Hz) 




THD Plus Noise vs Frequency 



_V S = ±5V,V IN = 1V„ MS 
A v = 1,R F = 1.5k, V FS = 2,5V 



0,001 



I I II I II 



v c = io%: 



Vc = 50K 



V c = 100% 




100 1k 10k 
FREQUENCY (Hz) 



2nd and 3rd Harmonic Distortion 
vs Frequency 




FREQUENCY (MHz) 



3rd Order Intercept vs Frequency 









v 


= ±15V 
= 1 

= 1.5k 








A, 

R 

, R 








V( 



































































5 10 15 20 25 30 
FREQUENCY (MHz) 



2-223 



LT1251/LT1256 



TVPICRL P€RFORfTinnC€ CHRRRCT€RISTICS 



Bandwidth vs Feedback 
Resistance, A v = 1, R L = 100t2 



Bandwidth vs Feedback 
Resistance, A v = 1 . R L = 1 k 



Voltage Gain and Phase 
vs Frequency 









— PEAKING < 
-- PEAKING < 


0.5dB 
5.0dB 






















±15V 




v 


= 5V N 












v 


= ±5v' 





















0.6 0.8 1.0 1.2 1.4 1.6 1.8 
FEEDBACK RESISTANCE (kQ) 

Bandwidth vs Feedback 
Resistance, A v = 10, R L = 10012 









— PEA 
--PEA 


KING < 0.5dB 
KING<5.0dB 


















V 


X V 


i = ±15 


1 




V s = 5 














V s = i5 






















08 1.0 1.2 1.4 1.6 
FEEDBACK RESISTANCE (kSi) 



1.8 



100k 



1M 10M 
FREQUENCY (Hz) 



100M 



Bandwidth vs Feedback 
Resistance, A v = 10, R L = 1k 



Off-Channel Isolation 
vs Frequency 




0.4 0.6 0.8 1.0 1.2 1.4 1.6 
FEEDBACK RESISTANCE (k£i) 

IMM1IH 

Bandwidth vs Feedback 
Resistance, A v = 100, R L = 100a 



0.4 0.6 8 1.0 1.2 1.4 If 
FEEDBACK RESISTANCE (kS2) 



Bandwidth vs Feedback 
Resistance, A v = 100, Rl = 1k 



100k 1M 10M 
FREQUENCY (Hz) 



100M 



-3dB Bandwidth vs 
Control Voltage 















NO 


=EAR 


NG 




Vs 


= '5 


1 






























Vs 


= ±5\ 


































- V 



































































0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 
FEEDBACK RESISTANCE (KJ) 

MMMH 















NO 


=EAK 


NG 




■ 


= ±15V 


































= i5\ 
















-v. 


= 5\ 







































































V S = 1 5V 

Ri = loon 
















v 
R 


S = 25V 
= 1.3k 












— 






/ 


** 
















/ 



























































0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 
FEEDBACK RESISTANCE (Ml) 

Mom 



0.5 1.0 1.5 2.0 
CONTROL VOLTAGE (V) 



2-224 



TECHNOLOGY 



LT1251/LT1256 



TVPicm p€RFORmnnc€ charactcristics 



Supply Current vs 
Full Scale Voltage 



Supply Current vs 
Full Scale Current 



Input Common-Mode Range 
vs Temperature 



1 1 

W S = ±5V 

IWTFHMfll RFQICTODQ 


















Ta = 


55'C. 

25°c y 












= 125°C 



































0.5 1.0 1.5 2.0 
FULL SCALE VOLTAGE. V FS (V) 



Inverting Input Bias Current 
vs Null Voltage 



400 
3 300 
S 200 

CE 

3 100 

CO 

co 
1-100 

g-200 

cr 

S-300 
-400 



-v FS = 


i5V 




T« = 25°C 




2.5V- 














T A = -55°C . 




125°C_ 































































50 100 150 200 250 300 
NULL VOLTAGE. REFERENCED TO V" (mV) 

tMMIi 

Positive Output Saturation 
Voltage vs Load Current 



1.7 

O 
> 

I 

t, 1.3 

i_d 
CD 

o 
> 

I 0.9 

az 

1 0.7 

t/i 

0.5 



-v s 


= ±5V 




























































































25°C 


-T A 


= -55 












■C— | 












































= 125°C 





















V; 
-v c 


1 

= ±5V 
-m/ 
























Ta 


= 12 


|"C, 






































l = - 


55°C 



































































100 200 300 400 500 
FULL SCALE CURRENT. I fs (pA) 

Inverting Input Bias Current 
vs Null Voltage 



m 

150 
100 
50 


-50 
- 1 00 
-150 

-200 



I I 

V s = ±5V 




I I 

T A = 25°C 






= l.£ 


DV 


-Ta = 


I 

-55"C / 
















A=1 


25°C 

















































































20 40 60 80 100 120 140 160 
NULL VOLTAGE. REFERENCED TO T (mV) 



Negative Output Saturation 
Voltage vs Load Current 





= iSV 




















A-' 




\ 








-Ta 


= 125 








55'C 






•c y 



























rv*-1 



^V*-2 

a 

o 

2 V~+2 



-50 -25 25 50 75 100 125 
TEMPERATURE (°C) 



Control and Full Scale Amp Input 
Bias Current vs Input Voltage 



-400 
-350 
-300 
-250 
-200 
-150 
-100 
-50 




T a = 


-55°C 




V S >±7.5V 










— t a = 










25"C 


















— T A = 


125"C 





























1 2 3 4 5 

INPUT VOLTAGE (V) 

Output Short-Circuit Current 
vs Temperature 



10 20 30 

LOAD CURRENT (mA) 



-10 -20 -30 
LOAD CURRENT (mA) 




-50 -25 25 50 75 100 125 
TEMPERATURE (°C) 



2-225 



LT1251/LT1256 



TVPicni PCRFORmnncc characteristics 



Slew Rate vs Full Scale 
Reference Voltage 





350 




300 




250 








200 






< 

gj 


150 








100 




50 








A v » 1 












Vs 


= ±15V/ 






















>v 

































0.5 1.0 1.5 2.0 2.5 
FULL SCALE REFERENCE VOLTAGE (V) 



Slew Rate vs Temperature 













Vs = 


*5V 












-A V = 
NO L 


1 - 
OAD 























































































-50 -25 25 50 75 
TEMPERATURE ("C) 



Power Supply Rejection Ratio 
vs Frequency 




10k 100k 1M 
FREQUENCY (Hz) 



Settling Time to 10mV 
vs Output Step 



_v s = 


±15V 










R F = 


1.5k 


* 
























'inverting, 










NONINVERTIN 


G 




















VERTING 






















■s^NC 


NINVEF 


TING 

















25 50 75 100 
SETTLING TIME (ns) 



125 150 



Settling Time tolmV 
vs Output Step 



_ 4 
: ■ 

S; 2 

™ 

£ -2 

° -4 
-6 



















NO 




RtlN 






















JVER 


1NG 






1 
























\ 


s = ± 

F=1 


sy 

5k 












F 
























JNINV 


ERTI 


G 






IMVE 
















TTING^ 











50 100 150 

SETTLING TIME (ns) 



Output Impedance vs Frequency 



i I I II I 

V s = *5V 






















R F = 1.5k 






























5V 




















































































































-A, 


- 



























































































































































































































10k 100k 1M 10M 
FREQUENCY (Hz) 



100M 



Differential Gain vs 
Controlled Gain 



60 70 80 90 
CONTROLLED GAIN, V C /V FS (%) 



Differential Phase vs 
Controlled Gain 




60 70 80 90 
CONTROLLED GAIN, V C /V FS (%) 



LT1251 

Switching Transient (Glitch) 




2-226 



LT1251/LT1256 



simpuFiCD scH€mnTic 




Vcc 




UchnSuoB 



2-227 



LT1251/LT1256 



nppucOTions inFORmnnon 

Supply Voltage 

The LT1 251/LT1 256 are high speed amplifiers. To prevent 
problems, use a ground plane with point-to-point wiring 
and small bypass capacitors (0.01 uf to 0.1 uf) at each 
supply pin. For good settling characteristics, especially 
driving heavy loads, a4.7uf tantalum within an inch ortwo 
of each supply pin is recommended. 

The LT1 251/LT1 256 can be operated on single or split 
supplies. The minimum total supply is 4V (pins 7 to 9). 
However, the input common-mode range is only guaran- 
teed to within 2V of each supply. On a 4V supply the parts 
must be operated in the inverting mode with the noninvert- 
ing input biased half way between pin 7 and pin 9. See the 
Typical Applications section for the proper biasing for 
single supply operation. 

The op amps in the control section operate from V" (pin 7) 
to within 2V of V + (pin 9). For this reason the positive 
supply should be 4.5V or greater in order to use 2.5V 
control and full scale voltages. 

inputs 

The noninverting inputs (pins 1 and 14) are easy to drive 
since they look like a 1 7M resistor in parallel with a 1 .5pF 
capacitor at most frequencies. However, the input stage 
can oscillate at very high frequencies (1 OOMHzto 200MHz) 
if the source impedance is inductive (like an unterminated 
cable). Several inches of wire look inductive at these high 
frequencies and can cause oscillations. Check for oscilla- 
tions at the inverting inputs (pins 2 and 13) with a 10x 
probe and a 200MHz oscilloscope. A small capacitor 
(1 OpFto 50pF) from the input to ground ora small resistor 
(100Q to 300C2) in series with the input will stop these 
parasitic oscillations, even when the source is inductive. 
These components must be within an inch of the IC in 
order to be effective. 

All of the inputs to the LT1251/LT1256 have ESD protec- 
tion circuits. During normal operation these circuits have 
no effect. If the voltage between the noninverting and 
inverting inputs exceeds 6V, the protection circuits will 
trigger and attempt to short the inputs together. This 
condition will continue until the voltage drops to less than 



500mV or the current to less than 1 0mA. If a very fast edge 
is used to measure settling time with an input step of more 
than 6V, the protection circuits will cause the 1 mV settling 
time to become hundreds of microseconds. 

Feedback Resistor Selection 

The feedback resistor value determines the bandwidth of 
the LT1251/LT1256 as in other current feedback amplifi- 
ers. The curves in the Typical Performance Characteristics 
show the effect of the feedback resistor on small- signal 
bandwidth for various loads, gains and supply voltages. 
The bandwidth is limited at high gains by the 500MHz to 
800MHz gain-bandwidth product as shown in the curves. 
Capacitance on the inverting input will cause peaking and 
increase the bandwidth. Take care to minimize the stray 
capacitance on pins 2 and 1 3 during printed circuit board 
layout for flat response. 

If the two input stages are not operating with equal gain, 
the gain versus control voltage characteristic will be 
nonlinear. This is true even if R F i equals Ffo- This is 
because the open-loop characteristic of a current feed- 
back amplifier is dependent on the Thevenin impedance at 
the inverting input. For linear control of the gain, the loop 
gain of the two stages must be equal. For an extreme 
example, let's take a gain of 1 01 on input 1 , R F i = 1 ,5k and 
Rqi = 1 5fl, and unity-gain on input 2, R F 2 = 1 -5k. The curve 
in Figure 1 shows about 25% error at mid-scale. To 
eliminate this nonlinearity we must change the value of 
Rf2- The correct value is the Thevenin impedance at 
inverting input 1 (including the internal resistance of 27Q) 
times the gain set at input 1. For a linear gain versus 
control voltage characteristic when input 2 is operating at 
unity-gain, the formula is: 

R F2 = A V i x (R F1 1 1 R G1 + 27) 

R F2 = 101 x (14.85 + 27) =4227 

Because the feedback resistor of the unity-gain input is 
increased, the bandwidth will be lower and the output 
noise will be higher. We can improve this situation by 
reducing the values of R F1 and Rqi , but at high gains the 

internal 27iJ dominates. 



2-228 



IXUQHIB 



LT1251/LT1256 



RppucATions mFORmnTion 



1 1 

Vfs = 2.5V 




















































































4.3 


y 














































5k 

































































0.5 1.0 1.5 2.0 2.5 
CONTROL VOLTAGE (V) 



Figure 1 . Linear Gain Control from to 101 
Capacitive Loads 

Increasing the value of the feedback resistor reduces the 
bandwidth and open-loop gain of the LT1251/LT1256; 
therefore, the pole introduced by a capacitive load can be 
overcome. If there is little or no resistive load in parallel 
with the load capacitance, the output stage will resonate, 
peak and possibly oscillate. With a resistive load of 1 50£2, 
any capacitive load can be accommodated by increasing 
the feedback resistor. If the capacitive load cannot be 
paralleled with a DC load of 1 50n, a network of 200pF in 
series with 100i2 should be placed from the output to 
ground. Then the feedback resistor should be selected for 
best response. 

The Null Pin 

Pin 6 can be used to adjust the gain of an internal current 
mirror to change the output offset. The open circuit 
voltage at pin 6 is set by the full scale current l FS flowing 
through 200Q to the negative supply. Therefore, the null 
pin sits 1 0OmV above the negative supply with V F s equal 
to 2.5V. Any op amp whose output swings within a few 



millivolts of the negative supply can drive the null pin. The 
AM modulator application shows an LT1077 driving the 
null pin to eliminate the output DC offset voltage. 

Crosstalk 

The amount of signal from the off input that appears at the 
output is a function of frequency and the circuit topology. 
The nature of a current feedback input stage is to force the 
voltage at the inverting input to be equal to the voltage at 
the noninverting input. This is independent of feedback 
and forced by a buffer amplifier between the inputs. When 
the LT1251/LT1256 are operating noninverting, the off 
input signal is presentatthe inverting input. Since one end 
of the feedback resistor is connected to this input, the off 
signal is only a feedback resistor away from the output. 
The amount of unwanted signal at the output is deter- 
mined by the size of the feedback resistor and the output 
impedance of the LT1 251/LT1 256. The output impedance 
rises with increasing frequency resulting in more crosstalk 
at higher frequencies. Additionally, the current that flows 
in the inverting input is diverted to the supplies within the 
chip and some of this signal will also show up at the 
output. With a 1.5k feedback resistor, the crosstalk is 
down about 86dB at low frequencies and rises to -78dB 
at 1 MHz and on to -60dB at 6MHz. The curves show the 
details. 

Distortion 

When only one input is contributing to the output (V c = 0% 
or 1 00%) the LT1 251/LT1 256 have very low distortion. As 
the control reduces the output, the distortion will increase. 
The amount of increase is a function of the current that 
flows in the inverting input. Larger input signals generate 
more distortion. Using a larger feedback resistor will 
reduce the distortion at the expense of higher output 
noise. 



rruum 

^ * TECHNOLOGY 



2-229 



LT1251/LT1256 



APPucRTions inFORmnnon 

Signal Path Description 




Figure 2 is the basic block diagram of the LT1251/LT1256 
signal path with external resistors R G i, Rfi, Rg2 and Rp 2 . 
Both input stages are operating as noninverting amplifiers 
with two input signals Vi and V 2 . 

Each input stage has a unity-gain buffer from the nonin- 
verting inputto the inverting input. Therefore, the inverting 
input is at the same voltage as the noninverting input. Ri 
and R 2 represent the internal output resistances of these 
buffers, approximately 27Q. 

K is a constant determined by the control circuit, and can 
be any value between and 1. The control circuit is 
described in a later section. 



Figure 2. Signal Path Block Diagram 

V? 

b = 7-ttw; 



i of the diagram: 

J 



v 



Ri 



R G1 +R F1 



r fi+ r i 



, R G1 



+ 1 



V 



R 2 + NW R F2 + R 2 
R G2 + R F2 

ln=KI 1 + fl-K)r2 



V R G2 J 



( 

R OL 



^ = b Jl + sRo L C) y 
Substituting and rearranging gives: 



KVi 



Q-k)v 2 



V = - 



R| , MM r 2+ NN 

R G1+ R F1 R G2 + R F2 



1 + SR 0L C 
R OL 



K 



R F1 + R 1 



Rfi +1 



ML 



R F 2 + R 2 [^ + 1 > 



, R G1 ) 

General Equation for the Noninverting Amplifier Case 



2-230 



TECHNOLOGY 



LT1251/LT1256 



RppucflTions inFORmnTion 

In low gain applications, R-| and R 2 are small compared to 
the feedback resistors and therefore we can simplify the 
equation to: 



KV| 



(i-k)v 2 

R G2 + R F2 
1 + S R 0L C | K , ( 1 -K) 
R 0L R F1 R F2 



V Q= R G1 +R F1 



Note that the denominator causes a gain error due to the 
open-loop gain (typically 0.1% for frequencies below 
20kHz) and for mismatches in Rpi and Rp2- A 1% mis- 
match in the feedback resistors results in a 0.25% error at 
K = 0.5. 



pi = Rp2 and assume Rol » r m (a 0.1% error 
at low frequencies) the above equation simplifies to: 



V =KV 1 A v1 + (1-K)v 2 Av2 
where A V1 = 1 + 



Rp1 and A V2 = 1+ R E2 



R G1 



R 



G2 



This shows that the output fades linearly from input 2, 
times its gain, to input 1, times its gain, as K goes from 
Oto 1. 

If only one input is used (for example, and pin 14 is 
grounded, then the gain is proportional to K. 



Similarly for the inverting case where the noninverting 
inputs are grounded and the input voltages Vi and V 2 drive 
the normally grounded ends of Rqi and Rq 2 , we get: 



V = - 



Rgi + r i 


V R F1 J 


+ ! — 

R G2 + R 2 


^ R F2 , 




1 + sR 0L C K 


^ + — 


(1-K) 





R F1 + R 1 



Rfi 

R G1 



+ 1 



R F2 + R2g + 1 



General Equation for the Inverting Amplifier Case 

Note that the denominator is the same as the noninverting 
case. In low gain applications, Ri and R 2 are small 
compared to the feedback resistors and therefore we can 
simplify the equation to: 



KV, 
_ R G1_ 



(i-k)v 2 

R G2 



1 + sRo L C { K { (1-K) 
R OL R F1 R F2 

Again if we set Rfi = Rf2 and assume Rol » R r-1 (a 0.1 % 
error at low frequencies) the above equation simplifies to: 

v = -[kv 1 a V i+(i-k)v 2 / 

where Aw = ^ 1 and A V2 = ^ 

vl D D 

H G1 H G2 

The four-resistor difference amplifier yields the same 
result as the inverting amplifier case, and the common- 
mode rejection is independent of K. 



.^^r TECHNOLOGY 



2-231 



LT1251/LT1256 



nppucmions inFORmnnon 

Control Circuit Description 




CONTROL V TO I FULL SCALE V TO I 



Figure 3. Control Circuit Block Diagram 

The control section of the LT1251/LT1256 consists of two 
identical voltage-to-current converters (V-to-l); each 
V-to-l contains an op amp, an NPN transistor and a 
resistor. The converter on the right generates a full scale 
current Ips and the one on the left generates a control 
current lg. The ratio Iq/Ifs is called K. K goes from a 
minimum of zero (when Ic is zero) to a maximum of one 
(when lrj is equal to, or greater than, l F s). K determines the 
gain from each signal input to the output. 

The op amp in each V-to-l drives the transistor until the 
voltage at the inverting input is the same as the voltage at 
the noninverting input. If the open end of the resistor (pin 
5 or 1 0) is grounded, the voltage across the resistor is the 
same as the voltage at the noninverting input. The emitter 
current is therefore equal to the inputvoltageVc divided by 
the resistor value Rq. The collector current is essentially 
the same as the emitter current and it is the ratio of the two 
collector currents that sets the gain. 

The LT1 251/LT1 256 are tested with pins 5 and 1 grounded 
and a full scale voltage of 2.5V applied to Vps (pin 1 2). This 
sets Ifs at approximately 500uA; the control voltage Vc is 
applied to pin 3. When the control voltage is negative or 
zero, Ic is zero and K is zero. When Vc is 2.5V or greater, 
Ic is equal to or greater than Ips and K is one. The gain of 
channel one goes from 0% to 100% as V c goes from zero 
to 2.5V. The gain of channel two goes the opposite way, 
from 100% down to 0%. The worst case error in K (the 



gain) is ±3% as detailed in the electrical tables. By using 
a 2.5V full scale voltage and the internal resistors, no 
additional errors need be accounted for. 

In the LT1 256, K changes linearly with l c . To insure that K 
is zero, Vc must be negative 15mV or more to overcome 
the worst case control op amp offset. Similarly to insure 
that K is 100%, V c must be 3% larger than V F s based on 
the guaranteed gain accuracy. 

To eliminate the overdrive requirement, the LT1251 has 
internal circuitry that senses when the control current is at 
about 5% and sets K to 0%. Similarly, at about 95% it sets 
K to 100%. The LT1251 guarantees that a 2% (50mV) 
input gives zero and 98% (2.45V) gives 100%. 

The operating currents of the LT1 251 /LT1 256 are derived 
from Ips and therefore the quiescent current is a function 
of Vfs and Rfs- The electrical tables show the supply 
current for three values of V F s including zero. An approxi- 
mate formula for the supply current is: 

ls = 1mA + (24xl FS ) + (V s /20k) 

where Vs is the total supply voltage between pins 9 and 7. 
By reducing Ips the supply current can be reduced, how- 
ever the slew rate and bandwidth will also be reduced as 
indicated in the characteristic curves. Using the internal 
resistors (5k) with Vfs equal to 2.5V results in Ifs ea . ua| to 
500liA; there is no reason to use a larger value of l FS . 

The inverting inputs of the V-to-l converters are available 
so that external resistors can be used instead of the 
internal ones. For example, if a 10V full scale voltage is 
desired, an external pair of 20k resistors should be used to 
set l F s to 500uA The positive supply voltage must be 2.5V 
greater than the maximum Vc and/or Vfs to keep the 
transistors from saturating. Do not use the internal resis- 
tors with external resistors because the internal resistors 
have a large positive temperature coefficient (0.2%/°C) 
that will cause gain errors. 

If the control voltage is applied to the free end of resistor 
Rc (pin 5) and the Vc input (pin 3) is grounded, the polarity 
of the control voltage must be inverted. Therefore, K will 
be 0% for zero input and 100% for-2.5V input, assuming 
Vps equals 2.5V. With pin 3 grounded, pin 4 is a virtual 
ground; this is convenient for summing several negative 
going control signals. 



2-232 



XTUflSl 



LT1251/LT1256 



TVPicni nppucnTions 

AM Modulator with DC Output Nulling Circuit 



2.5VDC 
INPUT 



0.1nF 

1MHz I I 

CARRIER | P 



220k 
-Wr 



0.%F 

AUDIO 

MODULATION I ~ 



| CONTROL I 




-VquT 



Four-Quadrant Multiplier as a Double-Sideband Suppressed-Carrier Modulator Modulation Gain vs Control Voltage 




:o.iiiF 



















I 

»±5V _ 
















Vf. 


= 2 


5V 



































































































































































0.5 1.0 1.5 2.0 2.5 
CONTROL VOLTAGE, PIN 3 (V) 



■TRIM FOR SYMMETRY 



'II 



LT1251/LT1256 



TYPICAL flPPUCRTIOnS 

Single Supply Inverting AC Amplifier 



C1 

10tiF Rgi 
11+ 1-5k 
-\ P— <W\r- 



R1 

20k 



1.5k 




" V 0UT 



Supply Noninverting AC Amplifier 
with Digital Gain Control 



luur "ui 

- 




Vhef 


Din 






T LTC1257 


CLK 




V? 


GND V CC 


LOAD 






1 1 






1251/56 TA06 



Controlled Gain, Voltage-to-Current Converter 
(Current Source) 




% Rf Vc OUTPUT RESISTANCE DEPENDS 
Ro \ Rg / Vfs ON MATCHING OF RESISTORS 



2-234 



LT1251/LT1256 



TVPICfiL RPPUCDTIOnS 



Logarithmic Gain Control (Noninverting) 




CONTROL — - 2.5VDC 
VOLTAGE 1.5k INPUT 

wv 



! I 
V FS = 2.5V 
















































































































































<1 


1BE 


1R0 








/ 








Av 


= 24dB x 
I 


i i 













1.25 

CONTROL VOLTAGE (V) 



Logarithmic Gain Control (Inverting) 



VlN- 




V IN " 



1.5k 
-Wv- 



2.5VDC 
INPUT 
1N914 



200pF : 



It 



1.5k 



VOUT 



V FS = 2.5V 
















































































































































<1 


IB I 


iHO 
















Av 


= 24dB x 
I 


{*"»)- 

I 













Soft Clipper 



1.25 

CONTROL VOLTAGE (V) 





A 


U.N 

A 




VOUT 




A 


w 




1C 1? 


200* 


f 



V FS = 2.5V 
V S = ±5V 
1 = 1kHz 



2-235 



LT1251/LT1256 



TVPICRL flPPUCRTIOnS 



1MHz Wien Bridge Oscillator 




TlOOpF TlOOpF 200!! 



Vc Rc Bfs Vfs 
3 _lf Jl° Li 



Basic Variable Integrator 




V| N — vw 



son 

-WV — Vqut 




R 



1.5k I 3 I 5 _L° I 12 



V C - - V FS 



T(s) = 



,Yfs 



R^Tok 



' VQUT 



THE TIME CONSTANT IS INVERSELY PROPORTIONAL TO V c . 

R DC IS REQUIRED TO DEFINE THE DC OUTPUT WHEN 

THE CONTROL IS AT ZERO. m,cr»„ 



Variable Lowpass, Highpass and Allpass Filter 




LOWPASS 



2-236 



LT1251/LT1256 




LT1251/LT1256 




2-238 



LT1251/LT1256 



mncRomoDCL 

For PSpice™ 

* Linear Technology LT1251/LT1256 VIDEO FADER MACROMODEL 

* Written: 3-11-1994 BY WILLIAM H. GROSS. 
* 

* Connections: as per datasheet pinout 
*l=first noninverting input 

*2= first inverting input 
*3=control voltage input 
*4=control current input 
*5=control resistor, RC 
*6=null input 
*7=positive supply 
*8=output 

*9=negative supply 

*10=full scale resistor, RFS 

*ll=full scale current input 

*12=full scale voltage input 

*13=second inverting input 

*14=second noninverting input 

* 

.SUBCKT LT1251 1 2 3 4 5 6 7 8 9 10 11 12 13 14 



* first 


input 


stage 






IBl 


1 





500NA 




RI1 


1 





17MEG 




CI 


1 





1.5PF 




El 


2A 





VALUE={ LIMIT 


frit}, V(8N)+0.4, V(8P)-0.4)+V(EN) /30} 


VOS1 


2A 


2B 


2 . 5MV 




Rl 


2B 


2 


27 


C2 


2 





1PF 




*second 


input 


stage 






IB2 


14 





4 50NA 




RI2 


14 





17 MEG 




C14 


14 





1.5PF 




E2 


13A 





VALUE={ LIMIT 


(V(14), V(8N)+0.4, V(8P)-0.4)+V(EN)/30 


VOS2 


13A 


13B 


1.5MV 




R2 


13B 


13 


27 




C13 
* 


13 





1PF 




♦control amp 








IBC 


3 





-300NA 




RIC 


3 





100MEG 




C3 


3 





1PF 




R3 


3 


3A 


1600 




CBWC 


3A 





10PF 




EC 


3B 





3A 


1.0 


vosc 


3B 


4 


5MV 




C4 


4 





1PF 




RC 


4 


5 


5K 




C5 


5 





1PF 





* 



PSpice is a trademark of MicroSim Corporation 



XTUKS 



2-239 



LT1251/LT1256 



mncftomoD€L 



*full 


scale 


amp 




IBFS 


12 





-300NA 


RIFS 


12 





100MEG 


C12 


12 





1PF 


R12 


12 


12A 


1600 


CBWFS 


12A 





10PF 


EFS 


12B 





12A 


VOSFS 


12B 


11 


-5MV 


Cll 


11 





1PF 


RFS 


11 


10 


5K 


CIO 


10 





1PF 



'generating K 

*** the next two lines are for the LT1251 

EK K TABLE {I (VOSC) /I (VOSFS) >= (-100,0) (0.04,0) (0.1,0.11) 

+ (0.9,0.907) (0.95,1.0) (100,1.0) 

*** the next two lines are for the LT1256 

*EK K TABLE { I ( VOSC) / I ( VOSFS ) } = (-100,0) (0,0) (0.2,0.21) 
*+ (0.9,0.9) (1.0,1.0) (100,1.0) 



RDUMMY 


K 





1MEG 


RNOISE1 


EN 





200K 


RNOISE2 


EN 





200K 


♦generates 40 
* 


7nV/rtHz 


*null circuit 






GNULL 


9 


6A 


VALUE={I (VOSFS) } 


RN1 


6A 


9 


200 


VNULL 


6A 


6B 


O.OV 


RN2 


6B 


6 


400 


C6 
* 


6 


9 


1PF 


♦output 


stage 






E6 


8A 







+VALUE= 


{1.8MEG*(I(VOSl)*V(K)+I(VOS2)*(l-V(K) ) -I (VNULL) +0 . 10UA+0 . 


RG 


8A 


8B 


1 . 8MEG 


CG 


8B 





3 . 4PF 


E8 


8C 





8B 1.0 


V8 


8C 


8D 


O.OV 


R8 
* 


8D 


8 


11 


•output 


swing 


and 


current limit 


DP 


8B 


8P 


Dl 


VDP 


8P 


7 


-1.4V 


DN 


8N 


8B 


Dl 


VDN 


8N 


9 


1.4V 


. MODEL 


Dl 


D 




GCL 
* 


8B 





TABLE {I(V8) }=(-!, -1) (-0.04,0) (0.04,0) (1,1) 


* supply 


current 




GQ 


7 


9 


VALUE={1MA+24*I (VOSFS) + (V ( 7 ) -V ( 9 ) ) /20K} 


GCC 


7 





TABLE (I(V8) }=(-l,0) (0,0) (1,1) 


GEE 
* 


9 





TABLE {I(V8 )}=(-!,-!) (0,0) (1,0) 


. ENDS LT1251 







2-240 



LT1251/LT1256 



mncRomoDCL 

LT1251/LT1256 Macro Model for PSpice 

PIN # IN □ NODE # IN A 
FIRST INPUT STAGE 

A»os, R ' 




SECOND INPUT STAGE 




CONTROL / 

LH-t— 



J H 6k /3a\ /3b\ 

-Lc3 ^ric VV 1cbwc 

-J-1pF ^£lOOM-j-tOpF 




K GENERATOR 



A 

5*1 



Rdummv 
1M 



NULL CIRCUIT 



NOISE GENERATOR 

A 

> RNOISE1 > RNOISE2 
>200k >200k 



A 



Hun ' m 



-T-1PF 




— * 

SUPPLY CURRENTS 

[p [D 



FULL SCALE AMP 



R12 

1.6k 



—I — C12 Iri^^ZI— Cbwf: 
■300nA — j— 1pF ^100M — j — 10pF 



) Ibfs 



A A X s ? " 




OUTPUT STAGE AND VOLTAGE SWING/CURRENT LIMIT 



A 



1.8M 
I — VvV- 




T p JLr — x. — JL 
(^)v DP Qv DN (j) GcL Q 



2-241 




TECHNOLOGY 



LT1252 

Low Cost 
Video Amplifier 



FCRTURCS 

■ Low Cost 

■ Current Feedback Amplifier 

■ Differential Gain: 0.01%, R L = 150Q, V s = ±5V 

■ Differential Phase: 0.09°, R L = 150£2, V s = ±5V 

■ Flat to 30MHz, 0.1 dB 

■ 100MHz Bandwidth on ±5V 

■ Wide Supply Range: ±2V(4V) to +14V(28V) 

■ Low Power: 85mW at ±5V 

nppucflTions 

■ RGB Cable Drivers 

■ Composite Video Cable Drivers 

■ Gain Blocks in IF Stages 



D€SCRIPTIOn 

The LT1252 is low cost current feedback amplifier for 
video applications. The LT1252 is ideal for driving low 
impedance loads such as cables and filters. The wide 
bandwidth and high slew rate of this amplifier make 
driving RGB signals between PCs and workstations easy. 
The linearity of the LT1252 is outstanding; it is unsur- 
passed for driving composite video. 

The LT1 252 is available in the 8-pin Dl P and the S8 surface 
mount package. For higher performance and shutdown 
operation, see the LT1227. For dual and quad amplifiers 
with similar performance see the LT1253/LT1254. 





TVPICRL flPPUCOTIOn 



Transient Response 




AT AMPLIFIER OUTPUT. R t = 150Q 

6dB LESS AT Vqut V = 1V 



2-242 



LT1252 



absolute maximum rrtiiigs 

Total Supply Voltage (V + to V") 28V 

Input Current ±15mA 

Output Short-Circuit Duration (Note 1) Continuous 

Operating Temperature Range 0°C to 70°C 



Storage Temperature Range -65°C to 150°C 

Junction Temperature (Note 2) 150°C 

Lead Temperature (Soldering, 10 sec) 300°C 



PRCKRG€/ORD€R MFORmflTIOn 





TOP VIEW 




nc LT 






T| NC 


-IN |Y 






T\ V* 


+IN [T 






T\ OUT 








T] NC 



S8 PACKAGE 
8-LEAD PLASTIC SO 

TjMAX = 150°C,e JA =150°C/W 



ORDER PART 
NUMBER 



LT1252CS8 



S8 PART MARKING 



1252 




N8 PACKAGE 
8-LEAD PLASTIC DIP 

TjMAX=150°C,8jA=10IW:/W 



ORDER PART 
NUMBER 



LT1252CN8 



Consult factory for Industrial and Military grade parts. 



€L€CTRICRL CHRRRCTCRISTICS 



0°C < Ta < 7D C, Vs = ±5V to :12V. unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS 


MIN 


TYP 


MAX 


UNITS 


Vos 


Input Offset Voltage 






5 


15 


mV 


♦la 


Noninverting Bias Current 






1 


15 


uA 


-Ib 


Inverting Bias Current 






20 


100 


uA 


AvOL 


Large-Signal Voltage Gain 


V s = ±5V, V = ±2V, R L = 150£1 


560 


1500 




V/V 


PSRR 


Power Supply Rejection Ratio 


V s = ±3Vto±12V 


60 


70 




dB 


CMRR 


Common-Mode Rejection Ratio 


V S = +5V, V CM = ±2V 


55 


65 




dB 


VoUT 


Maximum Output Voltage Swing 


V S = ±12V, R L = 500Q 


+7.0 


±10.5 




V 






V S = ±5V, R L = 150£2 


±2.5 


±3.7 




V 


'OUT 


Maximum Output Current 




30 


55 




mA 


Is 


Supply Current 




8.5 18 


mA 


RlN 


Input Resistance 




1 10 


Mfi 


C|N 


Input Capacitance 




3 


PF 




Power Supply Range Dual 
Single 





±2 
4 




±12 
24 


V 
V 


SR 


Input Slew Rate 


A v = 1 


125 


V/us 


' 


Output Slew Rate 

' 


A v = 2 


250 


V/ns 



2-243 



€l€CTRICRl CHRRRCT€RISTICS O C<T A < 70 C.V S = ±5V to ±12V, unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS 


MIN TYP MAX 


UNITS 


tr 


Small-Signal Rise Time 


V S = ±12V,A V = 2 


3.5 


ns 


Rise and Fall Time 


V S = ±5V,A V = 2, V 0UT =1Vp-P 


5.2 


ns 


tp 


Propagation Delay 


V S = ±5V,A V = 2 


3.5 


ns 



Note 1: A heat sink may be required to keep the junction temperature LT1252CN8: Tj = T A + (Pq x 100°C/W) 

below absolute maximum when the output is shorted indefinitely. LT1252CS8: Tj = T A + (Pq x 150°C/W) 
Note 2: Tj is calculated from the ambient temperature T A and power 
dissipation P D according to the following formulas: 



tvpicrl nc p€RFonmnnc€ 

BANDWIDTH 



v s 


A V 


Rl 


Rf 


Rg 


SMALL SIGNAL 
-3dB BW (MHz) 


SMALL SIGNAL 
-0.1dB BW (MHz) 


SMALL SIGNAL 
PEAKING (dB) 


±12 


1 


150 


2370 


None 


282 


45 


1.9 


±12 


-1 


1000 


1100 


1100 


58 


17 


0.1 


±12 


-1 


150 


909 


909 


73 


34 


0.1 


±12 


2 


1000 


1210 


1210 


253 


20 


0.1 


±12 


2 


150 


909 


909 


142 


38 


0.1 


±12 


5 


1000 


1000 


249 


73 


25 


0.1 


±12 


5 


150 


866 


215 


75 


31 


0.1 


±12 


10 


1000 


909 100 67 26 


0.1 


±12 


10 


150 


768 




69 32 0.1 


±5 


1 


1000 


2210 


None 


260 


10 


2.4 


±5 


1 


150 


1300 


None 


232 


50 


0.8 


±5 


-1 


1000 


1000 


1000 


50 


11 


0.1 


±5 


-1 


150 


732 


732 


69 


34 


0.1 


±5 


2 


1000 


909 


909 


133 


24 


0.1 


+5 


2 


150 


787 


787 


100 


30 


0.1 


±5 


5 


1000 


825 


205 


62 


21 


0.1 


±5 


5 


150 


698 


174 


66 


30 


0.1 


±5 


10 


1000 


750 


82.5 


58 


22 


0.1 


±5 


10 


150 


619 


68.1 


60 


30 


0.1 


NTSC VIDEO (Note 1) 


v s 


Av 


Rl 


Rf 


Rg 


DIFFERENTIAL 
GAIN 


DIFFERENTIAL 
PHASE 


±12 


2 


1000 


1000 


1000 


0.02% 


0.02° 


+12 


2 


150 


1000 


1000 


0.03% 


0.04° 


±5 


2 


1000 


1000 


1000 


0.02% 


0.08° 


+5 


2 


150 


1000 


1000 


0.01% 


0.09° 



Note 1: Differential Gain and Phase are measured using a Tektronix TSG amplifier stages were cascaded giving an effective resolution of 0.01% and 
120 YC/NTSC signal generator and a Tektronix 1780R Video Measurement 0.01°. 
Set. The resolution of this equipment is 0.1% and 0.1°. Ten identical 



2-244 



LT1252 



TYPICAL P€RFORimnnC€ chrrhctcristics 



Supply Current vs Supply Voltage 





14 




13 


< 


12 


11 


■ ' 


10 


a: 




az 


9 


O 




>■ 


8 






— 


7 




6 




5 




4 













































-5S 




































25 






































125 




















175 













































Input Common-Mode Limit 
vs Temperature 



2 4 6 8 10 12 14 16 18 
SUPPLY VOLTAGE (tV) 







1 








2VT0 


12V 


















































































2VTC 


1?V- 



































Output Saturation 
vs Temperature 



-50 -25 25 50 75 100 125 
TEMPERATURE ("C) 



_±2V<V S <±12V. 





























































































-50 -25 25 50 75 
TEMPERATURE (°C) 



Settling Time to 10mV 
vs Output Step 




20 40 60 80 100 
SETTLING TIME (ns) 

iraa.TOK 

Spot Noise Voltage and Current 
vs Frequency 




10 100 1k 10k 100k 

FREQUENCY (Hz) 



2nd and 3rd Harmonic Distortion 
vs Frequency 



Power Supply Rejection 
vs Frequency 




10 

FREQUENCY (MHz) 



100k 1M 10M 
FREQUENCY (Hz) 



Output Impedance 
vs Frequency 



Output Short-Circuit Current 
vs Junction Temperature 




100M 



100k 1M 10M 
FREQUENCY (Hz) 

LTIZSZ-IPCOe 



-50 -25 25 50 75 100 125 150 175 
TEMPERATURE CO 



2-245 



LT1252 



TYPICAL P€RFORfTinnC€ CHI 



±12V Frequency Response 













































































pi 


AS[ 






11 






















































G 


































































a 






















A v = 1 
R L = 150f 
R F = 2.37k 













































-20 
-40 
-60 

-80 | 
-10o| 

-as 

-140 



1M 



10M 100M 
FREQUENCY (Hz) 



-180 
-200 



LT12H-TPC10 



±12V Frequency Response 











































































\ p 


HASE 


























































































































A v = 2 
























= 1MK2 








G 












= 909£! 

























-20 
-40 
-60 

-80 | 
-100 " 
-120 5 
-140 
-160 
-180 



10M 



100M 



FREQUENCY (Hz) 



LT12S2-TPC12 



±12V Frequency Response 




10M 100M 
FREQUENCY (Hz) 



±5V Frequency Response 




+5V Frequency Response 




10M 100M 
FREQUENCY (Hz) 

±5V Frequency Response 




10M 100M 
FREQUENCY (Hz) 



LTI252-TFC1S 



2-246 



XTUHSg 



LT1252 

TYPICAL P€RFORmnnC€ CHRRRCTCRISTICS 

Transient Response Transient Response 





V S = ±5V R F = 619I2 
A v =10 R G = 68.1S2 
R L =150Q V = 1.5V 



TYPICAL RPPUCRTIOnS 



Single Supply AC-Coupled Amplifier 
Noninverting 




Single Supply AC-Coupled Amplifier 
Inverting 



RS + 51Q 
BW = 14Hz to 60MHz 




220 ( if 
Rs \ i+ 51£2 

Vin — VA — ) VW 



Half Wave Rectifier 




VuUT 



XT 



2-247 



LT1252 



simpuFicD scHcmnTic 



-O 



— 




TECHNOLOGY 



LT1253/LT1254 



Low Cost Dual and Quad 
Video Amplifiers 



F€flTUR€S 

■ Low Cost 

■ Current Feedback Amplifiers 

■ Differential Gain: 0.03%, R L = 150Q, V s = +5V 

■ Differential Phase: 0.28°, R L = 150Q, V s = +5V 

■ Flat to 30MHz, 0.1 dB 

■ 90MHz Bandwidth on ±5V 

■ Wide Supply Range: ±2V(4V) to +14V(28V) 

■ Low Power: 60mW per Amplifier at ±5V 

RPPLICRTIOnS 

■ RGB Cable Drivers 

■ Composite Video Cable Drivers 

■ Gain Blocks in IF Stages 



D€SCRIPTIOn 

The LT1 253 is a low cost dual current feedback amplifier 
for video applications. The LT1254 is a quad version of the 
LT1 253. The amplifiers are completely isolated except for 
the power supply pins and therefore have excellent isola- 
tion, over 94dB at 5MHz. Dual and quad amplifiers signifi- 
cantly reduce costs compared with singles; the number of 
insertions is reduced and fewer supply bypass capacitors 
are required. In addition, these duals and quads cost less 
per amplifier than single video amplifiers. 

The LT1253/LT1254 amplifiers are ideal for driving low 
impedance loads such as cables and filters. The wide 
bandwidth and high slew rate of these amplifiers make 
driving RGB signals between PCs and workstations easy. 
The excellent linearity of these amplifiers makes them 
ideal for composite video. 

The LT1253 is available in 8-pin DIPs and the S8 surface 
mount package. The LT1254 is available in 14-pin DIPs 
and the S1 4 surface mount package. Both parts have the 
industry standard dual and quad op amp pin out. For 
higher performance, see the LT1 229/LT1 230. 




2-249 



LT1253/LT1254 

absolute mnximum ratihgs 

Total Supply Voltage (V + to V") 28V 

Input Current +15mA 

Output Short-Circuit Duration (Note 1) Continuous 

Operating Temperature Range 
LT1253C, LT1254C 0°Cto70°C 



Storage Temperature Range -65°C to 150°C 

Junction Temperature (Mote 2) 150°C 

Lead Temperature (Soldering, 10 sec) 300°C 



PACKAG€/ORD€R inFORfllATIOn 



OUT A [T 
-IN A |T 
♦IN A \J 
T \± 



TOP VIEW 

— O — 




¥] v* 

T\ OUTB 
T] -INB 
T\ +INB 



N8 PACKAGE 
8-LEAD PLASTIC DIP 



S8 PACKAGE 
8-LEAD PLASTIC SOIC 



TjMAX = 150°C,e JA =100-C/W(N) 
T jmm = 150°C.8ja=150°C/W(S) 



ORDER PART 
NUMBER 



LT1253CN8 
LT1253CS8 



S8 PART MARKING 



1253 




N PACKAGE 
14-LEAD PLASTIC DIP 



S PACKAGE 
14-LEAD PLASTIC SOIC 



T JMAX = 150»C,ej,= 70°C/W(N) 
TjHAX=150°C,ej A =100»C/W(S) 



ORDER PART 
NUMBER 



LT1254CN 
LT1254CS 



Consult factory for Industrial and Military grade parts. 



€l€CTRICAl CHARACTERISTICS oc t a < 70°C, V s = ±5V to ±12V, unless otherwise noted. 



Symbol 


Parameter 


CONDITIONS 


MIN 


TYP 


MAX 


UNITS 


Vos 


Input Offset Voltage 






5 


15 


mV 


+IB 


Noninverting Bias Current 




1 15 


uA 


-Ib 


Inverting Bias Current 






20 


100 


MA 


%)L 


Large-Signal Voltage Gain 


V s = ±5V, V = +2V, R L = 150£2 


560 


1500 




V/V 


PSRR 


Power Supply Rejection Ratio 


V s = ±3Vto+12V 


60 


70 




dB 


CMRR 


Common-Mode Rejection Ratio 


V S = ±5V,V CM = ±2V 


55 


65 




dB 


VoUT 


Maximum Output Voltage Swing 


V S = +12V, R L = 500n 
V S = ±5V, R L = 150fl 


+7.0 
±2.5 


±10.5 
±3.7 




V 
V 


'OUT 


Maximum Output Current 




30 


55 




mA 


Is 


Supply Current 


Per Amplifier 




6 


11 


mA 


RfN 


Input Resistance 




1 


10 




Mfi 


C|N 


Input Capacitance 




3 


PF 




Power Supply Range Dual 
Single 




±2 
4 




±12 
24 


V 
V 




Channel Separation 


f = 10MHz 


88 


dB 


SR 


Input Slew Rate 


A v = 1 


125 


V/LIS 




Output Slew Rate 


Ay = 2 


250 


V/ns 



2-250 



LT1 253/ LT 1254 



€l€CTRICRl CHRRflCT€RISTKS O C<T A i 70 C.V S = ±5V to ±12V, unless otherwise noted. 



Symbol 


Parameter 


CONDITIONS 


MIN TYP MAX 


UNITS 


tr 


Small-Signal Rise Time 


V S = ±12V,A V = 2 


3.5 


ns 


Rise and Fall Time 


V S = ±5V,A V = 2, V 0U T = 1Vp-P 


5.8 


ns 


«P 


Propagation Delay 


V S = ±5V,A V = 2 


3.5 


ns 



Note 1: A heat sink may be required to keep the junction temperature LT1253CN8: Tj = T A + (P D x 100°C/W) 

below absolute maximum when the output is shorted indefinitely. LT1 253CS8: Tj = T A + (P D x 1 50°C/W) 

Note 2: Tj is calculated from the ambient temperature T A and power LT1 254CN: Tj = T A + (P D x 70°C/W) 

dissipation P D according to the following formulas: LT1 254CS: Tj = T A + (P D x 1 00°C/W) 



TVPicni nc p€RFORmnnc€ 



BANDWIDTH 



Vs 


A V 


Rl 


Rf 


Rg 


Small Signal 
-3dB BW (MHz) 


Small Signal 
-0.1dB BW (MHz) 


Small Signal 
Peaking (dB) 


±12 


1 


1000 


1100 


None 


270 


51 


3.4 


±12 


1 


150 


1000 


None 


204 


48 


1.3 


±12 


-1 


1000 


750 


150 


110 


59 


0.1 


±12 


-1 


150 


768 


768 


89 


50 


0.1 


±12 


2 


1000 


715 


715 


179 


76 


0.3 


±12 


2 


150 


715 


715 


117 


62 





+12 


5 


1000 


680 


180 


106 


42 





±12 


5 


150 


680 


180 


90 


47 





±12 




1000 


620 


68.1 


89 


49 


0.1 


±12 




150 


620 


68.1 


80 


46 


0.1 


±5 




1000 


787 


None 


218 


53 


1.5 


±5 




150 


787 


None 


158 


91 


0.1 


+5 




1000 


715 


715 


76 


28 


0.1 


±5 




150 


715 


715 


70 


30 


0.1 


±5 


2 


1000 


620 


620 


117 


58 


0.1 


±5 


2 


150 


620 


620 


92 


52 


0.1 


±5 


5 


1000 


620 


150 


82 


36 





±5 


5 


150 


620 


150 


72 


34 





±5 


10 


1000 


562 


61.9 


70 


35 





±5 


10 


150 


562 


61.9 


65 


28 





NTSC VIDEO (Note 1) 


Vs 


A V 


Rl 


Rf 


Rg 


DIFFERENTIAL 
GAIN 


DIFFERENTIAL 
PHASE 


+12 


2 


1000 


750 


750 


0.01% 


0.03° 


±12 


2 


150 


750 


750 


0.01% 


0.12 


±5 


2 


1000 


750 


750 


0.03% 


0.18° 


±5 


2 


150 


750 


750 


0.03% 


0.28° 



Note 1 : Differential Gain and Phase are measured using a Tektronix TSG amplifier stages were cascaded giving an effective resolution of 0.01 % 
1 20 YC/NTSC signal generator and a Tektronix 1 780R Video Measurement and 0.01 °. 
Set. The resolution of this equipment is 0.1 % and 0.1 °. Ten identical 



2-251 



LT1 253/ LT 1254 



TVPICflL P€RFORmnnC€ CHRRRCTCRISTICS 

Supply Current vs Supply Voltage 



Output Saturation Voltage 
vs Temperature 

















































-5! 


•c 
































-25 


c— 










12ITU 



















































































V* 
£-0.5 
f -1.0 



Q. 

o 0.5 



































-R L = 
t2V< 


V s < 












12V 















































2 4 6 8 10 12 14 16 18 
SUPPLY VOLTAGE (±V) 

LT125M4 • TPC01 



Settling Time to 10mV 
vs Output Step 



-50 -25 25 50 75 100 125 
TEMPERATURE (°C) 

LTI2S3VS4 • TPC02 

2nd and 3rd Harmonic Distortion 
vs Frequency 



I I I 

WnMIMVFRTIMR 




i i 

IMWFRTINfi - 














t 
































































Vs 


= ±1 
= Rg 


>v 
= lk 










■ - 






R F 






























































NUNIIMVLKIIIYb 

I I I 




INVtKIIIMla 

^ I 







20 4 60 
SETTLING TIME (ns) 




1 10 

FREQUENCY (MHz) 



LTlZS3rc«'TPC04 



LT1253VH.TPC05 



Spot Noise Voltage and Current 
vs Frequency 



Output Impedance 
vs Frequency 




10k 100k 1M 10M 100M 

FREQUENCY (Hz) 

LT1253S4-TPC08 



Input Common-Mode Limit 
vs Temperature 



-50 -25 25 50 75 100 125 
TEMPERATURE (°C) 

LTiasawiPCro 

Power Supply Rejection 
vs Frequency 




10k 100k 1M 10M 100M 

FREQUENCY (Hz) 



Output Short-Circuit Current 
vs Temperature 




-50 -25 25 50 75 100 125 150 175 
TEMPERATURE IX) 

LT1 253*1. TPCOO 



2-252 



LT1253/LT1254 



TVPICUL PCRFORmnncc 



±12V Frequency Response 



±5V Frequency Response 




10M 1O0M 
FREQUENCY (Hz) 



+12V Frequency Response 




10M 10OM 
FREQUENCY (Hz) 




10M 100M 
FREQUENCY (Hz) 



LT125iS*-TPCr 



±5V Frequency Response 




FREQUENCY (Hz) 



LT1253WTFC13 



±12V Frequency Response 



±5V Frequency Response 




10M 100M 
FREQUENCY (Hz) 




10M 10OM 
FREQUENCY (Hz) 



tTIESWTPCH 



2-253 



LT1253/LT1254 



typical p€RFonmnnc€ cmrrrct€ristics 



Transient Response 



Transient Response 




V S = ±5V R F = 7S7Q 
Av=1 V = 1V 
R L =150Q 




R F = 562£2 V S = ±5V 
R s = 61.9£l A v = 10 
V = 1.5V R L = 150£i 



LT1K3.S'! - T PC 1 7 



APPiicRTions inFORmnnon 

Power Dissipation 

The LT1 253/LT1 254 amplifiers combine high speed and 
large output current drive into very small packages. Be- 
cause theseamplifiers work overavery wide supply range, 
it is possible to exceed the maximum junction temperature 
under certain conditions. To insure that the LT1253/ 
LT1254 are used properly, we must calculate the worst 
case power dissipation, define the maximum ambient 
temperature, select the appropriate package and then 
calculate the maximum junction temperature. 

The worst case amplifier power dissipation is the total of 
the quiescent current times the total power supply voltage 
plus the power in the IC due to the load. The quiescent 
supply current of the LT1 253/LT1 254 has a strong nega- 
tive temperature coefficient. The supply current of each 
amplifier at 150°C is less than 7mA and typically is only 
4.5mA. The power in the IC due to the load is a function of 
the output voltage, the supply voltage and load resistance. 
The worst case occurs when the output voltage is at half 
supply, if it can go that far, or its maximum value if it 
cannot reach half supply. 

For example, let's calculate the worst case power dissipa- 
tion in a video cable driver operating on a±1 2Vsupply that 
delivers a maximum of 2V into 1 



PDMAX = 2 x V S x l SMAX + (V S - Vomax) x VomAx/Rl 

Pdmax = 2 x 1 2V x 7mA + (1 2V - 2V) x 2V/1 50 

= 0.168 + 0.133 = 0.301 Watt per Amp 

Now if that is the dual LT1253, the total power in the 
package is twice that, or 0.602W. We now must calculate 
how much the die temperature will rise above the ambient. 
The total power dissipation times the thermal resistance of 
the package gives the amount of temperature rise. For the 
above example, if we use the S8 surface mount package, 
the thermal resistance is 150°C/W junction to ambient in 
still air. 



Temperature Rise = Pdmax x Rgja : 
x150°C/W = 90.3°C 



0.602W 



The maximum junction temperature allowed in the plastic 
package is 150°C. Therefore the maximum ambient al- 
lowed is the maximum junction temperature less the 

temperature rise. 

Maximum Ambient = 150°C - 90.3°C = 59.7°C 

Note that this is less than the maximum of 70°C that is 
specified in the absolute maximum data listing. In order to 
use this package at the maximum ambient we must lower 
the supply voltage or reduce the output swing. 



2-254 



LT1 253/ LT 1254 



nppucflTions inFORmnnon 

As a guideline to help in the selection of the LT1253/ 
LT1 254, the following table describes the maximum sup- 
ply voltage that can be used with each part based on the 
following assumptions: 

1. The maximum ambient is 70°C. 

2. The load is a double-terminated video cable, 150Q. 

3. The maximum output voltage is 2V (peak or DC). 







MAX POWER 
at MAX T fl 


LT1253CN8 


V s <±14(Abs Max) 


0.800W 


LT1253CS8 


V s <±10.6 


0.533W 


LT1254CN 


V s < ±11.4 


1.1 43W 


LT1254CS 


V s < +7.6 


0.727W 









simpuFi€D scHcmnnc 



One Amplifier 




2~255 




TECHNOLOGY 



LT1259/LT1260 



Low Cost Dual and Triple 
130MHz Current Feedback 
Amplifiers with Shutdown 



F€ATUR€S 

■ 90MHz Bandwidth on ±5V 

■ 0.1dB Gain Flatness >30MHz 

■ Completely Off in Shutdown, OuA Supply Current 

■ High Slew Rate: 1 600V/jis 

■ Wide Supply Range: ±2V(4V) to ±1 5V(30V) 

■ 60mA Output Current 

■ Low Supply Current: 5mA/Amplifier 

■ Differential Gain: 0.016% 

■ Differential Phase: 0.075° 

■ Fast Turn-On Time: 100ns 

■ Fast Turn-Off Time: 40ns 

■ 14-Pin and 16-Pin Narrow SO Packages 



APPLICATION 



RGB Cable Drivers 
Spread Spectrum Amplifiers 
MUX Amplifiers 
Composite Video Cable Drivers 
Portable Equipment 



DCSCRIPTIOn 

The LT1259 contains two independent 130MHz current 
feedback amplifiers, each with a shutdown pin. These 
amplifiers are designed for excellent linearity while driving 
cables and other low impedance loads. The LT1260 is a 
triple version especially suited to RGB video applications. 
These amplifiers operate on all supplies from single 5V to 
±15V and draw only 5mA per amplifier when active. 

When shut down, the LT1 259/LT1 260 amplifiers draw 
zero supply current and their outputs become high 
impedance. Only two LT1260s are required to make a 
complete 2-input RGB MUX and cable driver. These 
amplifiers turn on in only 100ns and turn off in 40ns, 
making them ideal in spread spectrum and portable 
equipment applications. 

The LT1259/LT1260 amplifiers are manufactured on 
Linear Technology's proprietary complementary bipolar 
process. 



TVPICflL APPUCATIOn 

2-lnput Video MUX Cable Driver Square Wave Response 





2-256 



rrunm 

^Lmf TECHNOLOQt- 



LT1259/LT1260 



rbsoiut€ mnximum rrtiogs 

Supply Voltage ±18V 

Input Current ±15mA 

Output Short-Circuit Duration (Note 1 ) Continuous 

Specified Temperature Range (Note 2) 0°C to 70°C 



Operating Temperature Range -40°C to 85°C 

Storage Temperature Range -65°C to 150°C 

Junction Temperature (Note 4) 150°C 

Lead Temperature (Soldering, 10 sec) 300°C 



PRCKRG€/ORD€R IRFORRIRTIOn 



-IN A |T 
+INA [T 
GND \J 
GND LT 
GND \T 
+ INB |T 
-IN B LT 



TOP VIEW 

— c — 



fen 



\ i T_4] EN A 

L-TJ] OUTA 
TJ] V* 
TT| GND 
TJ] V" 
T| OUTB 
J] EN B 



N PACKAGE S PACKAGE 

14-LEAD PLASTIC DIP 14-LEAD PLASTIC SOIC 

Tjii«=i50"C,ejA = ro''C/w(N) 

Tj MS x=150°C,e JA =110°C/W(S) 



ORDER PART 
NUMBER 



LT1259CN* 
LT1259CS* 



-INR LT 
+ INR QE 
GND LT 



+ ING LT 

GND LT 

+INB LT 

-IN B LT 



TJ] EN R 
TJ] OUTR 
14] V + 



-ING LT |Nr TJ] ENG 

-P~~\- 



TJ] OUTG 

TTJ r 

TJ] OUT B 
Tf] EN B 



N PACKAGE S PACKAGE 

16-LEAD PLASTIC DIP 16-LEAD PLASTIC SOIC 

T JM „ = 150°C,ej A = 70°C/W(N) 
T JMAX = 150°C,e JA =100'C/W(S) 



ORDER PART 
NUMBER 



LT1260CN* 
LT1260CS* 



"See Notes 2 and 3. 

Consult factory for Industrial and Military grade parts. 



€L€CTRICRL CHRRRCTCRISTICS 

C < T A < 70 C, each amplifier V C m = 0V. ±5V < V s < i 15V. EN pins = 0V, pulse tested, unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS 


MIN TYP MAX 


UNITS 


Vos 


Input Offset Voltage 


T A = 25°C 


• 


2 10 
12 


mV 
mV 




Input Offset Voltage Drift 




• 


15 


nv/°c 


!|N + 


Noninverting Input Current 


T A = 25°C 


• 


0.5 3 
6 


uA 
uA 


■in - 


Inverting Input Current 


T A « 25°C 


• 


8 60 
70 


pA 
uA 


e„ 


Input Noise Voltage Density 


f = 1kHz, Rf = 1k, R G = 10U, R s = 0Q 




3.6 


nV/VHz 


+ in 


Noninverting Input Noise Current Density 


f = 1kHz 




1.3 


pAA/Hz 


-in 


Inverting Input Noise Current Density 


f = 1kHz 




45 


pA/Vfiz 


R|N 


Input Resistance 


V| N = ±13V, V S = ±15V 
V| N = ±3V, V S = ±5V 


• 
• 


2 17 
2 25 


Mn 

MQ 


C|N 


Input Capacitance 


Enabled 
Disabled 




2 
4 


pF 
PF 


COUT 


Output Capacitance 


Disabled 




4.4 


PF 



2-257 



LT1259/LT1260 



€l€CTMCm CHnRnCT€RISTICS 



0°C<T A <70°C, each amplifier Vcm = OV, ±5V< V s <+15V, EN pins = OV, pulse tested, unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS 


MIN 


TYP 


MAX 


UNITS 


V)N 


Input Voltage Range 


V S = ±15V,T A = 25°C 
V S = ±5V,T A = 25X 


* 


±13 
±12 

±3 
±2 


±13.5 
±3.5 




V 
V 
V 
V 


... 

VOUT 


Maximum Output Voltage Swing 


V S = ±15V, R L = 1k 

V S = ±5V, R L = 150ftT A = 25°C 


• 


±12.0 
±3.0 

±2.5 


±14.0 
±3.7 




V 
V 

v 


CMRR 


Common-Mode Rejection Ratio 


V s = ±15V,V CM = ±13V,T fl = 25°C 
V s = ±15V,V C fvi = ±12V 
Vs = +DV, VfjM = ±JV, l A = ^5 L. 
V S = ±5V,V CM = +2V 


• 
• 


55 
55 
52 
52 


69 
63 




dB 
dB 
dB 
dB 




Inverting Input Current 
Common-Mode Rejection 


Vg = ±1 5V, VcM = ± 13V, I a = 25 u 
Vc = +15V, VrM = + 12V 
V s = ±5V,Vcm = ±3V,T a = 25°C 
V S = ±5V,V CM = ±2V 


# 
• 




3.5 
4.5 


10 
10 
10 
10 


uA/V 
uA/V 
uA/V 
uA/V 


PSRR 


Power Supply Rejection Ratio 


V s = ±2V to ±15V, EN Pins at V", T A = 25°C 
V s = ±3Vto±15V, EN Pins at V" 


• 


60 
60 


80 




dB 
dB 




Noninverting Input Current 
Power Supply Rejection 


V s = ±2V to ±1 5V, EN Pins at V", T A = 25°C 
V s = ±3Vto±15V, EN Pins at V" 


* 




15 


50 
60 


nA/V 
nA/V 




Inverting Input Current 
Power Supply Rejection 


V s = ±2V to ±1 5V, EN Pins at V", T A = 25°C 
V s = ±3Vto±15V, EN Pins at V" 


• 




0.1 


5 
5 


uA/V 
uA/V 


Av 


Large-Signal Voltage Gain 


V s = ±15V,Vout = +10V, R L = 1k 
V s = +5V, Vout = ±2V, R L = 150£2 


• 
• 


57 
57 


72 
69 




dB 
dB 


Rol 


Transresistance, aVout'AIin" 


V S = ±15V, V OU T = +10V, R L = 1k 

\i _i_rri / w _i_iw D i 

Vs = ±ov, Vout = ±< ; v, Hl = i buu 


• 

*- 


120 
100 


300 
200 




Icq 
kQ 


'out 


Mavimirm fliitnut Pnrrpnt 
IVIdAEl 1 IUI 1 1 UULjJLH ouilclll 


D fin T ocoP 

Kl = U£l, I A = 2b C 




30 


60 




mA 


If. 


supply ouiigiii pel Miiipniici 
(Note 5) 


V$ = ±1 5V. Vqut - ov, r A = 25 
V s = ±5V,V O uT = 0V,T A = 25°C 






5.0 
4.5 


7.5 
7.9 
6.7 


mA 
mA 
mA 




Disable Supply Current per Amplifier 


V s - ±15V, EN Pin Voltage = 14.5V, R L = 150Q 
V S = ±15V, Sink 1uA From EN Pin 


• 




3 
1 


16.7 

2.7 


uA 
MA 




Enable Pin Current 


V s = +1 5V, EN Pin Voltage = OV. T A = 25°C 


• 




60 


100 
150 


HA 
uA 


SR 


Slew Rate (Note 6) 


T A = 25°C 




900 


1600 




V/|iS 


t0N 


Turn-On Delay Time (Note 7) 


A V = 10,T A = 25°C 






100 


200 


ns 


tOFF 


Turn-Off Delay Time (Note 7) 


A v =10, T A = 25°C 






40 


150 


ns 


Uf 


Small-Signal Rise and Fall Time 


V S = ±12V, R F = R G = 1.5k. R L = 150£2 




4.2 


ns 




Propagation Delay 


V s = ±1 2V, R F = R G = 1.5k, R L = 150£2 




4.7 


ns 




Small-Signal Overshoot 


V S = ±12V, R F =R G = 1.5k, R L = 150Q 




5 


% 


ts 


Settling Time 


0.1%, V 0UT = 10V, R F = R G = 1.5k, R L = 1k 






75 




ns 




Differential Gain (Note 8) 


V S = ±12V, R F = R G = 1.5k. R L = 150Q 




0.016 


% 




Differential Phase (Note 8) 


V S = ±12V, R F = R G = 1.5k, R L = 150Q 




0.075 


DEG 



The • denotes specifications which apply over the specified operating Note 2: Commercial grade parts are designed to operate over the 

temperature range. temperature range of -40°C to 85°C but are neither tested nor guaranteed 

Note 1 : A heat sink may be required depending on the power supply be y° nd °° c t0 70 ° c - Industrial grade parts specified and tested over 

voltage and how many amplifiers have their outputs short circuited. "40°C to 85°C are available on special request Consult factory. 



2-258 



LT1259/LT1260 



€l€CTMCm CHRRflCTCRISTICS 

Note 3: Ground pins are not internally connected. For best 
performance, connect to ground. 

Note 4: Tj is calculated from the ambient temperature T A and the 
power dissipation P D according to the following formulas: 

LT1259CN: Tj = T A + (P D x 70°C/W) 

LT1 259CS: Tj = T A + (P D x 1 1 0°C/W) 

LT1260CN: Tj = T A + (P D x 70°C/W) 

LT1 260CS: Tj = T A + (P D x 1 00°C/W) 
Note 5: The supply current of the LT1 259/LT1 260 has a negative 
temperature coefficient. See Typical Performance Characteristics. 
Note 6: Slew rate is measured at ±5V on a ±10V output signal while 
operating on ±1 5V supplies with R F = 1 k, Rq = 1 1 0Q and R L = 1 k. 



Note 7: Turn-on delay time is measured while operating on ±5V 
supplies with R F = 1 k, Rg = 1 1 0n and R L = 1 50Q. The toN is measured 
from control input to appearance of 0.5V at the output, for V| N = 0.1V. 
Likewise, turn-off delay time is measured from control input to 
appearance of 0.5V on the output for V| N = 0.1V. 
Note 8: Differential gain and phase are measured using a Tektronix 
TSG120YC/NTSC signal generator and a Tektronix 1780R Video 
Measurement Set. The resolution of this equipment is 0.1% and 0.1°. 
Six identical amplifier stages were cascaded giving an effective 
resolution of 0.016% and 0.016°. 



TYPicm ac p€RFOftmnnc€ 



Vs(V) 


A V 


R L (n) 


R F (£2) 


Rg(") 


SMALL SIGNAL 
-3dB BW(MHz) 


SMALL SIGNAL 
0.1dB BW(MHz) 


SMALL SIGNAL 
PEAKING (dB) 


±12 


2 


150 


1.5k 


1.5k 


130 


53 


0.1 


±5 


2 


150 


1.1k 


1.1k 


93 


40 





+12 


10 


150 


1.1k 


121 


69 


20 


0.13 


±5 


10 


150 


825 


90.9 


61 


16 







2-259 



LT1259/LT1260 



TVPICflL P€RFORmnnC€ CHfififlCT€RISTICS 





12 




11 




10 




9 




8 




7 


<c 






6 




5 



±5V Frequency Response, A v = 2 



+5V Frequency Response, Av = 10 































































PHA 


SE 




























































C 


A 


N 




































\ 






























V S = ±5V 
. R L = 150Si 
R F = R G = 1.1k 































10 

FREQUENCY (MHz) 



Total Harmonic Distortion 
vs Frequency 



0.001 



zV s = ±12V 
- Ri.i 400O 
Rc = Rc = 1. 














































k 
































































\ 






6V P 


MS 






































































































- v O= lv RMS 









































































































































100 1k 10k 100k 

FREQUENCY (Hz) 

LT1!S&S0-TPC05 



Power Supply Rejection 
vs Frequency 




100k 1M 10M 100f 
FREQUENCY (Hz) 

LTCIHWO-TPCOB 



-20 

-40 

-60 

-80 | 

-100^ 

-120S 

-140 

-160 

-180 

-200 




1 



10 

FREQUENCY (MHz) 



2nd and 3rd Harmonic Distortion 
vs Frequency 




1 10 

FREQUENCY (MHz) 



Spot Noise Voltage and Current 
vs Frequency 



100 1K 10K 100K 

FREQUENCY (Hz) 

LT 1259/60 ■ TPC09 



LT 1 259/60 -TPC04 



Maximum Undistorted Output 
vs Frequency 







\ 














in 

V S = ±15V 
R L = 1k 
Rc = 2k 


























































































ft. 













A 




1 








2 1 

















































































































1 10 

FREQUENCY (MHz) 



LT123S9«0-TPCa? 



Output Impedance vs Frequency 



























a - 












































































































F 





























































































































































































































































































































































10k 100k 1M 10M 100M 

FREQUENCY (Hz) 

LT125MO-TPC10 



XTTJOfflB 



LT1259/LT1260 



TYPICAL P€RFORmRnC€ CHflRflCT€RISTICS 



Output Impedance in Shutdown 
vs Frequency 




Output Saturation Voltage 
vs Temperature 



1 1 

R L = ~ 

*9W <r \lr. <r 4.1SW 







































































































-50 -25 25 50 75 
TEMPERATURE (°C) 



Maximum Capacitive Load 
vs Feedback Resistor 



















V s = ±15 




w-f — 








































































A v = 2 










R L =150!i 
PEAKING <5dB 



1 2 3 4 5 6 

FEEDBACK RESISTOR (kil) 

LT12SW60-TPC1! 

Input Common-Mode Limit 
vs Temperature 





V* 




-0.5 




-1.0 




CD 


-1.5 


< 


-2.0 






O 




s 




Z 


2.0 


o 




E 
S 


15 


o 




o 


1.0 




0.5 




ir 













V 


* = 2V 


TO 18 


i 














































































vr 


»-2V 


T0-1 





































-25 25 50 75 
TEMPERATURE fC) 



100 125 



Supply Current vs Supply Voltage 



7 
6 

< 5 

I 4 
cc 

1 3 

§> 2 

CO 

1 













--55 


"C— 


























25 


c 
















125 


•c 































































2 4 6 8 10 12 14 16 18 
SUPPLY VOLTAGE (±V) 



LT1E59/60-TPG13 



Output Short-Circuit Current 
vs Junction Temperature 




LT125gffiO.TPC14 



LT12SaTC0-TPC!6 



25 50 75 100 125 150 
TEMPERATURE fC) 

ltiks/wtpcis 



Settling Time to 10mV 
vs Output Step 













-~ I I 

Vq = *12V 














i f =1 


5k 




































NOMI 


JVER1 


IMG 














NVER 




riNG 










w 































































100 200 300 400 500 600 700 800 
SETTLING TIME (ns) 

masiwo.rpci? 



Small-Signal Rise Time 




V s = ±1 5V R F =R G = 1.6k 
A v = 2 R L = 150n 



LT125W0.TPC1S 



2-261 



LT1259/LT1260 




Rppucmions inFORmnnon 

Feedback Resistor Selection 

The small-signal bandwidth of the LT1 259/ LT1 260 are set 
by the external feedback resistors and the internal junction 
capacitors. As a result, the bandwidth is a function of the 
supply voltage, the value of the feedback resistor, the 
closed-loop gain and the load resistor. The LT1 259/LT1 260 
have been optimized for +5V supply operation and have a 
-3dB bandwidth of 90MHz. See resistor selection guide in 
Typical AC Performance table. 

Capacitance on the Inverting Input 

Current feedback amplifiers require resistive feedback 
from the outputto the inverting inputfor stable operation. 
Take care to minimize the stray capacitance between the 
output and the inverting input. Capacitance on the invert- 
ing input to ground will cause peaking in the frequency 
response (and overshoot in the transient response). See 
the section on Demo Board Information. 

Capacitive Loads 

The LT1259/LT1260 can drive capacitive loads directly 
when the proper value of feedback resistor is used. The 
graph of Maximum Capacitive Load vs Feedback Resistor 
should be used to select the appropriate value. The value 
shown is for <5dB peaking when driving a 1 50Q load at a 
gain of 2. This is a worst case condition. The amplifier is 



more stable at higher gains. Alternatively, a small resistor 
(1 OQto 20Q) can be put in series with the outputto isolate 
the capacitive load from the amplifier output. This has the 
advantage that the amplifier bandwidth is only reduced 
when the capacitive load is present. The disadvantage is 
that the gain is a function of the load resistance. 

Power Supplies 

The LT1259/LT1260 will operate from single or split 
supplies from ±2V (4V total) to +1 5V (30V total). It is not 
necessary to use equal value split supplies, however the 
offset voltageand inverting input bias current will change. 
The offset voltage changes about 500juV per volt of 
supply mismatch. The inverting bias current can change 
as much as 5jjA per volt of supply mismatch though 
typically, the change is about 0.1 ijA per volt. 

Slew Rate 

The slew rate of a current feedback amplifier is not 
independent of the amplifier gain configuration the way 
slew rate is in a traditional op amp. This is because both the 
input stage and the output stage have slew rate limitations. 
In the inverting mode, and for higher gains in the nonin- 
verting mode, the signal amplitude between the input pins 
is small and the overall slew rate is that of the output stage. 
For gains less than ten in the noninverting mode, the 
overall slew rate is limited by the input stage. 



2-262 



LT1259/LT1260 



nppucmions inroRmnnon 

The input slew rate of the LT1259/LT1260 is approxi- 
mately 270V/us and is set by internal currents and capaci- 
tances. The output slew rate is set by the value of the 
feedback resistors and internal capacitances. At a gain of 
10 with at 1k feedback resistor and ±15V supplies, the 
output slew rate is typically 1600V/us. Larger feedback 
resistors will reduce the slew rate as will lower supply 
voltages, similar to the way the bandwidth is reduced. 

The graph of Maximum Undistorted Output vs Frequency 
relates the slew rate limitations to sinusoidal input for 
various gains. 

Large-Signal Transient Response, A v = 2 



looks like a 4.4pF capacitor in parallel with a 75k resistor, 
excluding feedback resistor effects. These amplifiers are 
designed to operate with open drain logic: the EN pins have 
internal pullups and the amplifiers draw zero current when 
these pins are high. To activate an amplifier, its EN pin is 
pulled to ground (or at least 2V below the positive supply). 
The enable pin current is approximately 60|iA when 
activated. Input referred switching transients with no 
input signal applied are only 35mV positive and 80mV 
negative with R|_ = 100Q. 

Output Switching Transient 






V S = ±15V R L = 400!2 
R F = R G = 1.6k 



Large-Signal Transient Response, Av = 10 



4 


! 6 


.20" 


J 


\ 

20m 


i 



V S = ±15V 
Rf = 1k 



R G = 110Si 
R L = 400S! 



Enable/Disable 

The LT1 259/LT1 260 amplifiers have a unique high imped- 
ance, zero supply current mode which is controlled by 
independent EN pins. When disabled, an amplifier output 



V S = ±5V 
Vl„ = 0V 



R F = R G = 1.6k 
R L =100£! 



The enable/disable times are very fast when driven from 
standard 5V logic. The amplifier enables in about 1 00ns 
(50% point to 50% point) while operating on ±5V sup- 
plies. Likewise the disable time is approximately 40ns 
(50% point to 50% point) or 75ns to 90% of the final 
value. The output decay time is set by the output capaci- 
tance and load resistor. 

Amplifier Enable Time, Av = 10 




2-263 



LT1259/LT1260 



nppucnnons inFORmnnon 

Amplifier Disable Time, Ay = 10 




OUTPUT 



V S = ±5V R F = 1k R L = 150f! 

v, N = o.iv R G = iion 



LI1HWT12M-AI0S 



Amplifier Enable/Disable Time, A v = 2 




LT1IS*LT12W.ft[ 



Differential Input Signal Swing 

The differential input swing is limited to about +6V by an 
ESD protection device connected between the inputs. In 
normal operation, the differential voltage between the 



input pins is small, so this clamp has no effect. In the 
disabled mode however, the differential swing can be the 
same as the input swing, and the clamp voltage will set the 
maximum allowable input voltage. 



TYPICAL APPUCfiTIOnS 

2-lnput Video MUX Cable Driver 

The application on the first page shows a low cost, 2- 
input video MUX cable driver. The scope photo displays 
the cable output of a 30MHz square wave driving 1 50Q. 
In this circuit the active amplifier is loaded by Rp and Rq 
of the disabled amplifier, but in this case it only causes a 
1.2% gain error. The gain error can be eliminated by 

2-input Video MUX Switching Response 




S 5 200m 



V S = ±5V R, = R G = 1.6k 

Vi»« = V,„ 2 =2VPPat2MH; R L .1O0£i 



configuring each amplifier as a unity-gain follower. The 
switching _time between channels is 100ns when both 
EN A and EN B are driven. 

2-lnput RGB MUX Cable Driver Demonstration Board 

A complete 2-input RGB MUX has been fabricated on PC 
Demo Board #039A. The board incorporates two LT1 260s 
with outputs summed through 75£2 back termination 
resistors as shown in the schematic. There are several 
things to note about Demo Board #039A: 

1 . The feedback resistors of the disabled LT1 260 load 
the enabled amplifier and cause a small (1 % to 2%) 
gain error depending on the values of Rp and Rq. 
Configure the amplifiers as unity-gain followers to 

eliminate this error. 

2. The feedback node has minimum trace length connect- 
ing R F and Rg to minimize stray capacitance. 

3. Ground plane is pulled away from R F and R G on both 
sides of the board to minimize stray capacitance. 



2-264 



LT1259/LT1260 



tvpicrl nppLicnnons 

4. Capacitors C1 and C6 areoptional and only needed to 
reduce overshoot when EN 1 or EN 2 are activated with 
a long inductive ground wire. 

5. The R, G and B amplifiers have slightly different 
frequency responses due to different output trace 
routing to Rp (between pins 3 and 4). All amplifiers 
have slightly less bandwidth in PCB #039 than when 
measured alone as shown in the Typical AC Perfor- 
mance table. 

6. Part-to-part variation can change the peaking by 
±0.25dB. 

RGB Demo Board Gain vs Frequency 



RGB Demo Board All Hostile Crosstalk 




1 10 100 

FREQUENCY (MHz) 



RGB Demo Board Gain vs Frequency 



— o 
. ■ 

CD _2 



III 

V s = ±5V 
R L = 150Q 
_Rc = R^ = 1 1 






























































-> R ' B 


















r 
































































V 











































10 100 
FREQUENCY (MHz) 



V S = ±12V 

R L = ioon 

_R f = R G = 1.6 

R s = ion 
















































































-to 
























■"R 
















































■^R 





































































10 

FREQUENCY (MHz) 



P-DIP PC Board #039 















ESI 

*** 


TSSZ 


V- 




LT1 259/60 'TA07 



2-265 



LT1259/LT1260 



TVPicni nppiicnTions 



Demonstration PC Boa 



ci 

0.01 nF 



EN 1 EN 2 V+ V" GND 




Vqut RED 



Vqut GREEN 



V UT BLUE 



OPTIONAL 



2-266 




TECHNOLOGY 



LT1354 



1 2MHz, 400V/lis Op Amp 



F€ATUR€S 

■ 12MHz Gain-Bandwidth 

■ 400V/us Slew Rate 

■ 1.25mA Maximum Supply Current 

■ Unity Gain Stable 

■ C-Load™ Op Amp Drives All Capacitive Loads 

■ 1 0nV/VHz Input Noise Voltage 

■ 800|j.V Maximum Input Offset Voltage 

■ 300nA Maximum Input Bias Current 

■ 70nA Maximum Input Offset Current 

■ 12V/mV Minimum DC Gain, R L =1k 

■ 230ns Settling Time to 0.1%, 10V Step 

■ 280ns Settling Time to 0.01%, 10V Step 

■ +12.5V Minimum Output Swing into 500n 

■ ±3V Minimum Output Swing into 150i2 

■ Specified at ±2.5V,±5V, and +15V 



flppucmions 

■ Wideband Amplifiers 

■ Buffers 

■ Active Filters 

■ Data Acquisition Systems 

■ Photodiode Amplifiers 



DCSCRIPTIOn 



The LT1354 is a low power, high speed, high slew rate 
operational amplifier with outstanding AC and DC perfor- 
mance. The LT1 354 has much lower supply current, lower 
input offset voltage, lower input bias current, and higher 
DC gain than devices with comparable bandwidth. The 
circuit topology is a voltage feedback amplifier with the 
slewing characteristics of a current feedback amplifier. 
The amplifier is a single gain stage with outstanding 
settling characteristics which makes the circuit an ideal 
choice for data acquisition systems. The output drives a 
500Q load to ±1 2.5V with ±1 5V supplies and a 1 50n load 
to +3V on +5V supplies. The amplifier is also stable with 
any capacitive load which makes it useful in buffer or cable 
driver applications. 

The LT1 354 is a member of a family of fast, high perfor- 
mance amplifiers using this unique topology and employ- 
ing Linear Technology Corporation's advanced bipolar 
complementary processing. For dual and quad amplifier 
versions of the LT1354 see the LT1355/LT1356 data 
sheet. For higher bandwidth devices with higher supply 
current see the LT1357 through LT1365 data sheets. 
Singles, duals, and quads of each amplifier are available. 

C-Load is a trademark of Linear Technology Corporation 



TVPICflL flPPUCflTIOn 



100kHz, 4th Order Butterworth Filter 



A v = -1 Large-Signal Response 




VOUT 




2-267 



LT1354 



ni3soiuT€ mnximum Rnnnos 

Total Supply Voltage (V + to V") 36V 

Differential Input Voltage ±10V 

Input Voltage ±Vs 

Output Short-Circuit Duration (Note 1) Indefinite 

Operating Temperature Range -40°C to 85°C 



Specified Temperature Range -40°C to 85°C 

Maximum Junction Temperature (See Below) 

Plastic Package 150°C 

Storage Temperature Range -65°C to 150°C 

Lead Temperature (Soldering, 10 sec) 300°C 



PRCKRG€/ORD€R IRFORRIRTIOn 



NULL [T 
-IN [7 
+IN |T 

r Li 



TOP VIEW 
— — 



T| NULL 

7]v< 

H VOUT 
T) NC 



N8 PACKAGE, 8-LEAD PLASTIC DIP 
Tjmm = 150°C.8ja = 130'C/W 



ORDER PART 
NUMBER 



LT1354CN8 




S8 PACKAGE, 8-LEAD PLASTIC SOIC 
TjMAX = 150°C.e J A = 1W'C/W 



ORDER PART 
NUMBER 



LT1354CS8 



S8 PART MARKING 



1354 



Consult factory for Industrial and Military grade parts. 



€l€CTRICfll CHRRRCTCRISTICS T A = 25 C. Vcm = 0V unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS 


VsUPPLY 


MIN 


TYP 


MAX 


UNITS 


Vos 


Input Offset Voltage 




±15V 




0.3 


0.8 


mV 






±5V 




0.3 


0.8 


mV 








±2.5V 




0.4 


1.0 


mV 


los 


Input Offset Current 




±2,5Vto±15V 




20 


70 


nA 


k 


Input Bias Current 




±2.5Vto±15V 


80 300 


nA 


e n 


Input Noise Voltage 


f = 10kHz 


±2.5Vto±15V 


10 


nVA/Hz 


in 


Input Noise Current 


f = 10kHz 


±2.5Vto+15V 


0.6 


pA/VHz 


Rin 


Input Resistance 


V CM = ±12V 


±15V 


70 


160 




MQ 






Differential 


±15V 




11 




M£2 


C|N 


Input Capacitance 




±15V 


3 


PF 




Input Voltage Range * 




+15V 


12.0 


13.4 




V 








±5V 


2.5 


3.5 




V 








±2.5V 


0.5 


1.1 




V 




Input Voltage Range - 




±15V 




-13.2 


-12.0 


V 








±5V 




-3.4 


-2.5 


V 








±2.5V 




-0.9 


-0.5 


V 


CMRR 


Common-Mode Rejection Ratio 


V CM = ±12V 


r15V 


83 


97 




dB 






V C M = ±2.5V 


±5V 


78 


84 




dB 






V CM = ±0.5V 


±2.5V 


68 


75 




dB 


PSRR 


Power Supply Rejection Ratio 


V s = ±2.5Vto +1 5V 




92 


106 




dB 


Avol 


Large-Signal Voltage Gain 


V 0UT = ±12V. R L = 1k 


±15V 


12 


36 




V/mV 






Vout = ±10V, R L = 500Q 


±15V 


5 


15 




V/mV 






V 0U T = ±2.5V, R L = 1k 


±5V 


12 


36 




V/mV 






V 0U T = ±2.5V, R L = 500Q 


±5V 


5 


15 




V/mV 






V 0U T = ±2 5V, R L = 150£2 


+5V 


1 


4 




V/mV 






V O uT = ±1V,R L = 500£2 


±2.5V 


5 


20 




V/mV 


V OUT 


Output Swing 


R L = 1k, V| N = +40mV 


+15V 


13.3 


13.8 




+V 






Rl = 500n, Vin = ±40mV 


±15V 


12.5 


13.0 




+V 






R L = 500Q, V| N = ±40mV 


±5V 


3.5 


4.0 




±V 






R L = 150n. V| N = ±40mV 


±5V 


3,0 


3.3 




±V 






R L = 500n, V| N = ±40mV 


±2.5V 


1.3 


1.7 




±V 



2-268 



LT1354 



€l€CTRICR I CH RR fl CT€R ISTICS T A = 25 C. V CM = OV unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS 


^SUPPLY 


MIN 


TYP 


MAX 


UNITS 


|q|JJ 


Output Current 


V OUT = ±12.5V 
V 0UT = ±3V 


+15V 
±5V 


25 
20 


30 
25 




mA 
mA 


Isc 


Short-Circuit Current 


Vout = 0V, V| N = ±3V 


±15V 


30 


42 




mA 


SR 


Slew Rate 


A v = -2, (Note 2) 


±15V 
±5V 


200 
70 


400 
120 




V/ns 
V/u.s 




Full Power Bandwidth 


10V Peak, (Note 3) 
3V Peak, (Note 3) 


±15V 
±5V 


6.4 
6.4 


MHz 
MHz 


raw 


Gain-Bandwidth 


f = 200kHz, R L = 2k 


i IOV 

±5V 
±2.5V 


9.0 

7.5 


12.0 
10.5 
9.0 




MH7 

ivinz 
MHz 
MHz 


tr.if 


Rise Time, Fall Time 


A v = 1, 1 0%-90%, 0.1V 


±1 5V 
±5V 


14 

17 


ns 
ns 




Overshoot 


A v = 1, 0.1V 


+15V 
+5V 


20 
18 


% 
% 




Propagation Delay 


50% V| N to 50% V 0UT , 0.1V 


±15V 
±5V 


16 
19 


ns 
ns 


ts 


Settling Time 


10V Step, 0.1%, A v = -1 
10V Step, 0.01%, A v = -1 
5VStep, 0.1%, A v = -1 
5V Step, 0.01%, A v = -1 


±15V 
±15V 
±5V 




230 
280 
240 
380 




ns 
ns 
ns 






+5V 






ns 




Differential Gain 


f = 3.58MHz, A v = 2, R L = 1k 


±15V 
±5V 


2.2 
2.1 


% 
% 




Differential Phase 


f = 3.58MHz, A v = 2, R L = 1k 


±15V 
±5V 


3.1 
3.1 


Deg 
Deg 


Ro 


Output Resistance 


A v = 1 , f = 100kHz 


±15V 


0.7 


Q 




Supply Current 





+15V 
±5V 




1.0 
0.9 


1.25 
1.20 


mA 
mA 


Is 







€l€CTRICfll CHRRRCTCRISTICS o c t„ < 70°C, V C m ■ 0V unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS 


VsUPPLV 


MIN 


TYP MAX 


UNITS 


Vos 


Input Offset Voltage 




±15V 






1.0 


mV 








±5V 






1.0 


mV 








±2.5V 






1.2 


mV 




Input Vos Dri ft 


(Note 4) 


±2.5Vto±15V 




5 8 


u.V/"C 


los 


Input Offset Current 




±2.5V to ±15V 




100 


nA 


Ib 


Input Bias Current 




±2.5Vto±15V 




450 


nA 


CMRR 


Common-Mode Rejection Ratio 


V CM = ±12V 


±15V 




81 




dB 






V CM = ±2.5V 


±5V 




77 




dB 






V CM = ±0.5V 


±2.5V 




67 




dB 


PSRR 


Power Supply Rejection Ratio 


V s = ±2.5Vto±15V 






90 


dB 


AvOL 


Large-Signal Voltage Gain 


V 0U T = ±12V, R L = 1k 


±15V 




10.0 




V/mV 






V OU T = ±10V, R L = 500n 


±15V 




3.3 




WmV 






V 0UT = ±2.5V, R L = 1k 


±5V 




10.0 




V/mV 






V OUT = ±2.5V, R L = 500n 


±5V 




3.3 




V/mV 






V 0UT = ±2.5V, R L = 150O 


+5V 




0.6 




V/mV 






V 0UT = ±1V, R L = 500n 


±2.5V 




3,3 




V/mV 



techSoB 



2-269 



LT1354 



€l€CTRICRl CHRR RCT€RISTICS O C < T A < 70 C, V CM = OV unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS 


^SUPPLY 


MIN TYP MAX 


UNITS 


VOUT 


Output Swing 




Rl = 1k, V, N = ±40mV 


±15V 


# 


13.2 


m 








R L = 500n, V, N = ±40mV 


±15V 




12.0 


±V 








Rl = 500Q, V| N = ±40mV 


±5V 




3.4 


±V 








R L = 150£2, V| N = ±40mV 


±5V 




2.8 


±V 








R L = 500£2, V|M = ±40mV 


±2.5V 




1.2 


±v 


'OUT 


Output Current 




V ut = ±12V 


±15V 




24.0 


mA 






Vout = +2.8V 


±5V 




18.7 


mA 


l sc 


Short-Circuit Current 


V OU T=0V, V| N = ±3V 


±15V 




24 


mA 


SR 


Slew Rate 




A v = -2, (Note 2) 


±15V 




150 


V/ns 










+5V 




60 


V/u.s 


GBW 


Gain-Bandwidth 




f = 200kHz, R L = 2k 


±15V 




7.5 


MHz 










±5V 




6.0 


MHz 


Is 


Supply Current 






+15V 




1.45 


mA 










+5V 




1.40 


mA 
















€l€CTRICRl CHRRRCTCRISTICS -40 C <T A < 85 C. V CM = OV unless otherwise noted. (Note 5) 


SYMBOL 


PARAMETER 


CONDITIONS 


"supply 


MIN TYP MAX 


UNITS 


Vos 


Input Offset Voltage 






±15V 




1.5 


mV 










±5V 




1.5 


mV 










±2.5V 




1.7 


mV 




Input V s Drift 




(Note 4) 


±2.5Vto±15V 




5 8 


M.V/°C 


los 


Input Offset Current 




±2.5V to ±15V 




200 


nA 




Input Bias Current 




±2.5V to ±1 5V 




550 


nA 


CMRR 


Common-Mode Rejection Ratio 


V CM = ±12V 


+15V 




80 


dB 








V C M = +2.5V 


±5V 




76 


dB 








V CM = +0.5V 


±2.5V 




66 


dB 


PSRR 


Power Supply Rejection Ratio 


V S = ±2.5V to ±1 5V 






90 


dB 


AvOL 


Large-Signal Voltage Gain 




V 0U T = ±12V, Rl = 1k 


±15V 




7.0 


V/mV 








V OU T = ±10V, R L = 500fi 


±15V 




1.7 


V/mV 








V 0UT = ±2.5V, R L = 1k 


±5V 




7.0 


V/mV 








Vqut = ±2.5V, Rl = 50012 


±5V 




1.7 


V/mV 








V ut = ±2.5V, R L = 150Q 


+5V 




0.4 


V/mV 








V 0UT = +1V, R L = 500£2 


±2.5V 




1.7 


V/mV 


VOUT 


Output Swing 




Rl = 1k, V| N = ±40mV 


+15V 




13.0 


+V 








R L = 500£2, V| N = ±40mV 


±15V 




11.5 


±V 








Rl = 500S2, V| N = ±40mV 


±5V 




3.4 


±V 








R L = 150i2, V| N = ±40mV 


±5V 




2.6 


±V 








R L = 500Q, V| N = ±40mV 


±2.5V 




1.2 


±v 


l0UT 


Output Current 




Vout = ±11.5V 


±15V 




23.0 


mA 








V OU T=±2.6V 


±5V 




17.3 


mA 


lsc 


Short-Circuit Current 


Vout = 0V,V in = ±3V 


+15V 




23 


mA 


SR 


Slew Rate 




A v = -2, (Note 2) 


±15V 




120 


V/p.s 










±5V 




50 


V/ns 



2-270 



LT1354 



€l€CTRICRl CHARACTERISTICS -40 C < T A < 85 C. V CM = OV unless otherwise noted. (Note 5) 



SYMBOL 


PARAMETER 


CONDITIONS 


VsUPPLY 


MIN 


TYP MAX 


UNITS 


GBW 


Gain-Bandwith 


f = 200kHz, Rl - 2k 


±15V 


• 


7.0 




MHz 








±5V 


• 


5.5 




MHz 


Is 


Supply Current 




±15V 


• 




1.50 


mA 








±5V 


• 




1.45 


mA 



The • denotes specifications that apply over the full operating 
temperature range. 

Note 1: A heat sink may be required to keep the junction temperature 
below absolute maximum when the output is shorted indefinitely. 
Note 2: Slew rate is measured between +1 0V on the output with ±6V input 



Note 3: Full power bandwidth is calculated from the slew rate 

measurement: FPBW = SR/2tcV p . 

Note 4: This parameter is not 100% tested. 

Note 5: The LT1354 is not tested and is not quality-assurance sampled at 
-40°C and at 85°C. These specifications are guaranteed by design, 



for ±1 5V supplies and ±1 V on the output with ±1 .75V input for ±5V supplies. correlation, and/or inference from 0°C, 25°C, and/or 70°C tests. 



TVPicni p€RFonmnnc€ characteristics 



Supply Current vs 
and Temperature 

















125°C 
















2b"C 








-55°C 











Input Common-Mode Range vs 
Supply Voltage 



5 10 15 

SUPPLY VOLTAGE (±V) 



T A = 25°C 






AV 0S < 


mV 







































































Input Bias Current vs 

Input Common-Mode Voltage 



v s = 
' tap 


±15V 
25°C 
Ir + + Ir I 








2 















































5 10 15 

SUPPLY VOLTAGE (±V) 



-15 -10 -5 5 10 15 
INPUT COMMON-MODE VOLTAGE (V) 



Input Bias Current vs 
Temperature 



200 
175 
\ 150 
125 
100 
75 
50 
25 












V S = ±15V 

Ib = |' b+ + Ib "|" 































































































-50 -25 25 50 75 100 
TEMPERATURE (°C) 



Input Noise Spectral Density 



Open-Loop Gainvs 
Resistive Load 




100 1k 10k 
FREQUENCY (Hz) 



100 1k 
LOAD RESISTANCE (£2) 



2-271 



LT1354 



TVPicni p€RFORmnnc€ cHnRna€RisTics 



Open-Loop Gain vs Temperature 



97 
96 

tn 

S. 94 

5 93 
a. 

§ 92 

5 91 
o 

90 



Rl = 1k 
- V = ±12V 
V S = ±15V 

























































































































-50 -25 25 50 75 100 125 
TEMPERATURE (»C) 



Output Short-Circuit Current vs 
Temperature 





65 


< 

E 


60 






B 


55 


cr 




cr 

13 


50 


CJ 






45 


cr 


40 


o 
ce 




o 


35 


2: 

CO 




=1 


30 


a 




E 


25 


o 






20 











V s = ±5V 




V 
















































SINK 










SOU 


RCE^ 



















































Output Voltage Swing vs 
Supply Voltage 



Output Voltage Swing vs 
Load Current 



T A = 25"C 




Rl 


= 1k 












Rl 


= 500£i 














R 


= 500Si 
















R 


L = 1k 



5 10 15 

SUPPLY VOLTAGE (±V) 



Settling Time vs Output Step 
(Noninverting) 



-50 -25 25 50 75 100 125 
TEMPERATURE (°C) 






-0.5 




-1.0 


> 


-1.5 


CD 


-2.0 


s 




CO 


■2.5 






< 




o 
> 


2.5 






Q- 


2.0 






O 


1.5 



l 

V S = ±5V 




85' 


C 






V 


N = 


00rr 


V 






























i«C- 




















( — 
















— 2 




^ \ 




•c 






















=25' 


C 










-4 


)'C 

























































-50-40 -30 -20 -10 10 20 30 40 50 
OUTPUT CURRENT (mA) 

1364 Gra 

Settling Time vs Output Step 
(Inverting) 



50 100 150 200 250 300 350 
SETTLING TIME (ns) 




50 100 150 200 250 300 350 
SETTLING TIME (ns) 



Output Impedance vs Frequency 



Gain and Phase vs Frequency 



Gain-Bandwidth and Phase 
Margin vs Supply Voltage 














PHASE MARGIN 












































G 


AIN-BANUWIUIH 








, = 25°C - 






T 



10k 100k 1M 10M 100M 
FREQUENCY (Hz) 

13S4G13 



10k 100k 1M 10M 
FREQUENCY (Hz) 



50 




48 




46 




44 






> 


42 






40 


> 

33 


CO 


33 






"3 


36 


m 

CD 


34 




32 




30 





5 10 15 

SUPPLY VOLTAGE (±V) 



2-272 



rruum 

*^LmJ TECHNOLOGY 



LT1354 



TVPicni p€RFORmnnc€ characteristics 



Gain-Bandwidth and Phase 
Margin vs Temperature 



Frequency Response vs 
Supply Voltage (A v = 1) 




-50 -25 25 50 75 
TEMPERATURE (°C) 



1M 10M 
FREQUENCY (Hz) 



Frequency Response vs 
Supply Voltage (A v = -1 ) 




100k 



M 10M 
FREQUENCY (Hz) 



Frequency Response vs 
Capacitive Load 




100M 



Power Supply Rejection Ratio 
vs Frequency 



*j 40 











v s = 

Ta = 


±15V 
25°C 




+PSRR 




^-PSR 


\ 









































100 1k 10k 



100k 1M 
(Hz) 



10M 100M 



Common-Mode Rejection Ratio 
vs Frequency 



120 
' 100 









T» 


j±15V 
>25°C 





















































1k 10k 100k 1M 10M 100M 
FREQUENCY (Hz) 



Slew Rate vs Supply Voltage 



Slew Rate vs Temperature 



Slew Rate vs Input Level 




5 10 
SUPPLY VOLTAGE (±V) 



350 
300 
[ 250 
200 
150 
100 
50 



A v = -2 




























V 


3 = ±1 


V 


_SF 


i Sf 


*tSR 
2 






























w 















400 

5 300 

S 200 
co 

100 



V S = ±15V 
A v =-1 
_ Rc = Rc = 2k 


























_ S 
_ T 


a _ SR* + SF 














2 

« = 25°C 



































































































































25 50 75 100 125 
TEMPERATURE (°C) 



2 4 6 8 10 12 14 16 18 20 
INPUT LEVEL (Vp.p) 



2-273 



TVPicni p€RFORmnnc€ cHnftnacRisncs 



Total Harmonic Distortion 
vs Frequency 




100 1k 10k 

FREQUENCY (Hz) 



2nd and 3rd Harmonic Distortion 
vs Frequency 





-20 




-30 


£ 








-40 




- 




o 
>— 




w 


-50 


Q 




O 




o 


-60 




cc 
< 






-70 




Undistorted Output Swing vs 
Frequency (±15V) 



Differential Gain and Phase 
vs Supply Voltage 



Undistorted Output Swing vs 
Frequency (±5V) 






























































































































































s 




vg = ±ov 
R L = 5k 
A v = 1, 

may nlRTnRTinw 






\ 
















A v = -1. 
- 3% MAX 
I I 
















UISIUKIIUN 

llllll 













1M 

FREQUENCY (Hz) 



Capacitive Load Handling 





DIFFE 


RENTIAL 


3AIN 




Av 

R L 

Ta 


= 2 

= 1k - 








= 25°C 










DIFFERE 


MTIAL PH 


\SE 















100k 200k 400k 1M 2M 4M 10M 
FREQUENCY (Hz) 



±5 ±10 ±15 

SUPPLY VOLTAGE (V) 




100p 1000p 0.01(1 0.1|i 
CAPACITIVE LOAD (F) 



Small-Signal Transient 
(Av = 1) 




Small-Signal Transient 
(Av = -1) 



Small-Signal Transient 
(A v = -1, C L = 1000pF) 




2-274 



LT1354 

TYPICAL P€RFOftmnnC€ CHRRRCT6RISTICS 

Large-Signal Transient Large-Signal Transient Large-Signal Transient 

(A v = 1) (A v = -1) (A v = 1,C L = 10,000pF) 



fippucflTions inFORmRTion 

The LT1354 may be inserted directly into many high 
speed amplifier applications improving both DC and AC 
performance, provided that the nulling circuitry is 
removed. The suggested nulling circuit for the LT1354 is 
shown below. 

Offset Nulling 



v* 




1354 AI01 



Layout and Passive Components 

The LT1 354 amplifier is easy to apply and tolerant of less 
than ideal layouts. For maximum performance (for 
example fast settling time) use a ground plane, short lead 
lengths, and RF-quality bypass capacitors (0.01 uf to 
O.ljaF). For high drive current applications use low ESR 
bypass capacitors (1uJ to 10^Ftantalum). Sockets should 
be avoided when maximum frequency performance is 
required, although low profile sockets can provide 
reasonable performance up to 50MHz. For more details 
see Design Note 50. 







The parallel combination of the feedback resistor and gain 
setting resistor on the inverting input can combine with 
the input capacitance to form a pole which can cause 
peaking or oscillations. For feedback resistors greater 
than 5kn, a parallel capacitor of value 

C F > R G x C| N /R F 

should be used to cancel the input pole and optimize 
dynamic performance. For unity-gain applications where 
a large feedback resistor is used, Cp should be greater 
than or equal to C| N . 

Capacitive Loading 

The LT1354 is stable with any capacitive load. This is 
accomplished by sensing the load induced output poleand 
adding compensation at the amplifier gain node. As the 
capacitive load increases, both the bandwidth and phase 
margin decrease so there will be peaking in the frequency 
domain and in the transient response as shown in the 
typical performance curves.The photo of the small-signal 
response with 1 0OOpF load shows 43% peaking. The large 
signal response with a 10,000pF load shows the output 
slew rate being limited to 5V/|is by the short-circuit 
current. Coaxial cable can be driven directly, but for best 
pulse fidelity a resistor of value equal to the characteristic 
impedance of the cable (i.e., 75Q) should be placed in 
series with the output. The other end of the cable should 
be terminated with the same value resistor to ground. 



jjwm 



2-275 



LT1354 



nppucRTions inFonmmrion 

Input Considerations 

Each of the LT1 354 inputs is the base of an NPN and a PNP 
transistor whose base currents are of opposite polarity 
and provide first-order bias current cancellation. 
Because of variation in the matching of NPN and PNP 
beta, the polarity of the input bias current can be positive 
or negative. The offset current does not depend on beta 
matching and is well controlled. The use of balanced 
source resistance at each input is recommended for 
applications where DC accuracy must be maximized. The 
inputs can withstand differential input voltages of up to 
10V without damage and need no clamping or source 
resistance for protection. 

Power Dissipation 

The LT1354 combines high speed and large output drive 
in a small package. Because of the wide supply voltage 
range, it is possible to exceed the maximum junction 
temperature under certain conditions. Maximum junction 
temperature (Tj) is calculated from the ambient tempera- 
ture (Ja) and power dissipation (Pq) as follows: 

LT1354CN8: Tj = T A + (P D x 130°C/W) 
LT1 354CS8: Tj = T A + (P D x 1 90°C/W) 

Worst case power dissipation occurs at the maximum 
supply current and when the output voltage is at 1/2 of 
either supply voltage (or the maximum swing if less than 
1/2 supply voltage). Therefore Pqmax is: 

Pdmax = (V + -V-)(I SM ax) + (V + /2) 2 /R l 

Example: LT1354CS8 at 70°C, V s = ±15V, R L = 100Q 
(Note: the minimum short-circuit current at 70°C is 
24mA, so the output swing is guaranteed only to 2.4V with 
TOOA) 

Pdmax= (30V)(1 .45mA) + (1 5V-2.4V)(24mA) =346mW 
Tjmax = 70°C + (346mW)(190°C/W) = 136°C 



Circuit Operation 

The LT1354 circuit topology is a true voltage feedback 
amplifier that has the slewing behavior of a current feed- 
back amplifier. The operation of the circuit can be under- 
stood by referring to the simplified schematic. The inputs 
are buffered by complementary NPN and PNP emitter 
followers which drive an 800n resistor. The input voltage 
appears across the resistor generating currents which are 
mirrored into the high impedance node. Complementary 
followers form an output stage which buffers the gain 
node from the load. The bandwidth is set by the input 
resistor and the capacitance on the high impedance node. 
The slew rate is determined by the current available to 
charge the gain node capacitance. This current is the 
differential input voltage divided by R1, so the slew rate 
is proportional to the input. Highest slew rates are there- 
fore seen in the lowest gain configurations. For example, 
a 1 0V output step in a gain of 1 has only a 1 V input step, 
whereas the same output step in unity gain has a 1 times 
greater input step. The curve of Slew Rate vs Input Level 
illustrates this relationship. The LT1 354 is tested for slew 
rate in a gain of -2 so higher slew rates can be expected 
in gains of 1 and -1 , and lower slew rates in higher gain 
configurations. 

The RC network across the output stage is bootstrapped 
when the amplifier is driving a light or moderate load and 
has no effect under normal operation. When driving a 
capacitive load (or a low value resistive load) the network 
is incompletely bootstrapped and adds to the compensa- 
tion at the high impedance node. The added capacitance 
slows down the amplifier which improves the phase 
margin by moving the unity gain frequency away from the 
pole formed by the output impedance and the capacitive 
load. The zero created by the RC combination adds phase 
to ensure that even for very large load capacitances, the 
total phase lag can never exceed 1 80 degrees (zero phase 
margin) and the amplifier remains stable. 



2-276 



LT1354 



— 



TVPICflL APPUCflTIOnS 



Instrumentation Amplifier 




1_ f R2 R3] R2 + R3_] 
2 ^ Rl + R4 J + R5 j 



TRIM R5 FOR GAIN 

TRIM R1 FOR COMMON-MODE REJECTION 
BW = 120kHz 



VOUT 



1354TA03 



100kHz, 4th Order Butterworth Filter 
(Sallen-Key) 



V|N -^W< * VW 

R1 R2 
2.87k 26.7k 




simpiiFi€D scHcmnnc 




□ out 



rrurmi 

^mtmi W TECHNOLOGY 



2-277 



LT1355/LT1356 



TECHNOLOGY 



F€RTUR€S 

■ 12MHz Gain-Bandwidth 

■ 400V/|is Slew Rate 

■ 1 .25mA Maximum Supply Current per Amplifier 

■ Unity Gain Stable 

■ C-Load™ Op Amp Drives All Capacitive Loads 

■ 1 0rtV/VHz Input Noise Voltage 

■ 800(iV Maximum Input Offset Voltage 

■ 300nA Maximum Input Bias Current 

■ 70nA Maximum Input Offset Current 

■ 12V/mV Minimum DC Gain, R L =1k 

■ 230ns Settling Time to 0.1%, 10V Step 

■ 280ns Settling Time to 0.01%, 10V Step 

■ +12.5V Minimum Output Swing into 500Q 

■ ±3V Minimum Output Swing into 150Q 

■ Specified at ±2.5V, ±5V, and +15V 

RPPLICOTIOnS 

■ Wideband Amplifiers 

■ Buffers 

■ Active Filters 

■ Data Acquisition Systems 

■ Photodiode Amplifiers 



Dual and Quad 
12MHz, 400V/(is Op Amps 

DCSCRIPTIOn 

The LT1355/LT1356 are dual and quad low power high 
speed operational amplifiers with outstanding AC and DC 
performance. The amplifiers feature much lower supply 
current and higher slew rate than devices with comparable 
bandwidth. The circuit topology is a voltage feedback 
amplifier with matched high impedance inputs and the 
slewing performance of a current feedback amplifier. The 
high slew rate and single stage design provide excellent 
settling characteristics which make the circuit an ideal 
choice for data acquisition systems. Each output drives a 
500Q load to +1 2.5V with ±1 5V supplies and a 1 50Q load 
to +3V on +5V supplies. The amplifiers are stable with any 
capacitive load making them useful in buffer applications. 

The LT1355/LT1356 are members of a family of fast, high 
performance amplifiers using this unique topology and 
employing Linear Technology Corporation's advanced 
bipolar complementary processing. For a single amplifier 
version of the LT1 355/LT1 356 see the LT1 354 data sheet. 
For higher bandwidth devices with higher supply currents 
see the LT1357 through LT1 365 data sheets. Bandwidths 
of 25MHz, 50MHz, and 70MHz are available with 2mA, 
4mA, and 6mA of supply current per amplifier. Singles, 
duals, and quads of each amplifier are available. 

C-Load is a trademark of Linear Technology Corporation 



TVPICfiL flPPUCOTIOn 



100kHz, 4th Order Butterworth Filter 



Av = -1 Large-Signal Response 



6.81k 

-vw 




Vcut 




2-278 



LT1355/LT1356 



nasoiuTc mnximum RnnnGs 

Total Supply Voltage (V + to V") 36V 

Differential Input Voltage ±10V 

Input Voltage ±Vs 

Output Short-circuit Duration (Note 1) Indefinite 

Operating Temperature Range -40°C to 85°C 



Specified Temperature Range -40°C to 85°C 

Maximum Junction Temperature (See Below) 

Plastic Package 150°C 

Storage Temperature Range -65°C to 150°C 

Lead Temperature (Soldering, 10 sec) 300°C 



PRCKRG€/ORD€R IflFORfTlflTIOfl 



OUT A [J 
-IN A |T 
+INA [T 

V - LT 



TOP VIEW 
^ 




T| v* 

~T\ OUTB 
T\ -IN B 
J] +IN B 



N8 PACKAGE 
8-LEAD PLASTIC DIP 
TjMAX=150'C,e JS = 130-C/W 



ORDER PART 
NUMBER 



LT1355CN8 



OUT A LT 
-IN A [7 
+IN A LT 

v" LT 




JJ OUTE 
T| -IN B 
~T\ +IN B 



S8 PACKAGE 
8-LEAD PLASTIC SOIC 
TjMAX=150 3 C,e JA = 190"C/W 



ORDER PART 
NUMBER 



LT1355CS8 



S8 PART MARKING 



1355 




N PACKAGE 
14-LEAD PLASTIC DIP 



Tjmax = 150=C. e JA = 1 10"C/W 



ORDER PART 
NUMBER 



LT1356CN 



16] OUTD 
N D 



TOP VIEW 
OUTA FT I 1| 

+ IN A |T - -1/ XJ- iJJ +IN D 

V* LT ' 13] V 

tIN B LT - -K /I- n\ +IN c 
F= B>lK c —i 




S PACKAGE 
16-LEAD PLASTIC SOIC 
Tjmax = 150°C8ja = 150-C/W 



ORDER PART 
NUMBER 



LT1356CS 



Consult factory for Industrial and Military grade parts. 



€l€CTRICRL CHfiRRCT€RISTICS Ta = 25°C, Vcm = 0V unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS 


^SUPPLY 


MIN TYP MAX 


UNITS 


Vos 


Input Offset Voltage 




±15V 

±5V 

+2.5V 


0.3 0.8 
0.3 0.8 
0.4 1.0 


mV 
mV 
mV 


los 


Input Offset Current 




±2.5V to +15V 


20 70 


nA 


La 


Input Bias Current 




±2.5V to ± 15V 


80 300 


nA 


e n 


Input Noise Voltage 


f = 10kHz 


±2.5V to ± 15V 


10 


nVNHl 


in 


Input Noise Current 


f = 10kHz 


±2.5V to ± 15V 


0.6 


pAAHz 


R|N 


Input Resistance 


V CM = ±12V 


±15V 


70 160 


M£2 




Input Resistance 


Differential 


±15V 


11 


M£i 




Input Capacitance 




±15V 


3 


PF 



rrvvm. 

TECHNOLOGY 



2-279 



LT1355/LT1356 



€l€CTRICM. CHARACTERISTICS T A = 25°C,V C M = 0V unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS 


VSUPPLY 


MIN 


TYP 


MAX 


UNITS 




Input Voltage Range * 




±15V 


12.0 


13.4 




V 








±5V 


2.5 


3.5 




V 








+2.5V 


0.5 


1.1 




V 




1 n nut Vnltaop Rannp ~ 




+15V 




-13.2 


-12.0 


v 








+5V 




-3.4 


-2.5 


V 








+2.5V 




-0.9 


-0.5 


V 


CMRR 


nnmmnn-Mnrip Rpiprtinn Ratin 


Mm - +12V 
V CM - l£v 


±15V 


83 


97 




dB 






Vni = +2 5V 


±5V 


78 


84 




dB 






Vn« = +0 5V 


±2.5V 


68 


75 




dB 


PSRR 


Power Supply Rejection Ratio 


Vs = ±£.uV tO ± IOV 




yd 


1UO 




Qti 


Avol 


Large-Signal Voltage Gain 


V 0U T = ±12V, Rl = 1k 


+15V 


12 


36 




V/mV 






"OUT = ± lUV, Hl = oUUii 


±15V 


5 


15 




v/mv 






VniiT = +2 5V, R, = 1 k 


±5V 


12 


36 




V/mV 






Vout = ±2.5V, R L = 500U 


+5V 


5 


15 




V/mV 






V 0U T = ±2.5V, R L = 150Q 


±5V 


1 


4 




V/mV 






V 0U T = ±1V, R L = 500Q 


±2.5V 


5 


20 




V/mV 


VOUT 


Output Swing 


Rl = 1k, V, N = ±40mV 


±15V 


13.3 


13.8 




±V 






R L = 500fi, V, N = ±40mV 


±15V 


12.5 


13.0 




±V 






R L = 500fl, V| N = ±40mV 


±5V 


3.5 


4.0 




±V 






R L = 150Q. V IN = ±40mV 


±5V 


3.0 


3.3 




±V 






Rl = 500Q, V| N = ±40mV 


±2.5V 


1.3 


1.7 




±V 


'OUT 


Output Current 


V 0UT = ±12.5V 


±15V 


25 


30 




mA 






V 0U T=±3V 


±5V 


20 


25 




mA 


'sc 


Short-Circuit Current 


V O UT = 0V, V IN = +3V 


+ 15V 


30 


42 




mA 


SR 


Slew Rate 


A v = -2, (Note 2) 


±15V 


200 


400 




V/uS 








±5V 


70 


120 




V/p.s 




Full Power Bandwidth 


10V Peak, (Note 3) 


±15V 




6.4 




MHz 






3V Peak, (Note 3) 


±5V 




6.4 




MHz 


GBW 


Gain-Bandwidth 


f = 200kHz, Rl = 2k 


±15V 


9.0 


12.0 




MHz 








±5V 


7.5 


10.5 




MHz 








±2.5V 




9.0 




MHz 


tr.tf 


Rise Time, Fall Time 


A v = 1, 10%-90%, 0.1V 


±15V 




14 




ns 








+5V 




17 




ns 




Overshoot 


A v = 1, 0.1V 


±15V 




20 




% 








±5V 




18 




% 




Propagation Delay 


50% Vin to 50% Vout. 0.1V 


±15V 




16 




ns 








±5V 




19 




ns 


ts 


Settling Time 


4 f\\ 1 r**** A 4 ft/ A * 

10V Step, 0.1%, Ay = -1 


±15V 




230 




ns 






10V Step, 0.01%. A v = -1 


±15V 




280 




ns 






5V Step, 0.1%, A v = -1 


±5V 




240 




ns 






5V Step. 0.01%. A v = -1 


±5V 




380 




ns 




Differential Gain 


f = 3.58MHz, A v = 2, R L = 1k 


±15V 




2.2 




% 








±5V 




2.1 




% 




Differential Phase 


f = 3.58MHz, A v = 2, R L = 1k 


+ 15V 




3.1 




Deg 
Deg 








±5V 




3.1 




Ro 


Output Resistance 


A v = 1 . f = 100kHz 


±15V 


0.7 


Q 




Channel Separation 


V OUT = ±10V, R L -500n 


±15V 


100 


113 




dB 


Is 


Supply Current 


Each Amplifier 


±15V 




1.0 


1.25 


mA 






Each Amplifier 


±5V 




0.9 


1.20 


mA 



2-280 JTWM 



LT1355/LT1356 



€l€CTRICni CHRRI1CT€RISTICS 0°C < T A < 70°C, V CM = OV unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS 


Vsupplv 


MIN 


TYP MAX 


UNITS 


Vos 


Input Offset Voltage 




+15V 


• 




1.0 


mV 








±5V 






1.0 


mV 








±2.5V 






1.2 


mV 




Input Vos Drift 


(Note 4) 


+2.5V to ±1 5V 


# 

— - 


5 8 


p.V/°C 


los 


Input Offset Current 




+? SV tn +1SV 




100 


nA 


In 




Input Bias Current 




±2.5V IO+15V 


• 


450 


nA 


CMRR 


Common-Mode Rejection Ratio 


V CM = ±12V 


±15V 


• 


81 




dB 






V CM = ±2.5V 


±5V 


• 


77 




dB 






V CM = +0.5V 


±2.5V 


• 


67 




dB 


PSRR 


Power Supply Rejection Ratio 


V s = ±2.5Vto ±15V 




• 


90 


dB 


AvOL 


Large-Signal Voltage Gain 


V 0UT = ±12V, R L = 1k 


+15V 


• 


10.0 




V/mV 






V 0U T = ±10V, R L = 500n 


±15V 


• 


3.3 




V/mV 






V ut = ±2.5V, R L = 1k 


±5V 


• 


10.0 




V/mV 






w_ l(T _ +o cw d. _ c;nno 

"OUT — — t.Jv, n[_ — juuii 


±5V 


• 


3.3 




V/mV 






Vout = ±2.5V, Rl = 1 50£J 


±5V 


* 


0.6 




V/mV 






V 0U T = ±1V, R L = 50012 






3.3 




V/mV 


v OUT 


Diitnut Swinn 


Ri - 1k Vim - +40mV 


±1 5V 




13.2 




+V 






R L = 500£2, V| N = *tOmV 


±15V 




12.0 




±v 






R L = 500n, V| N = ±40mV 


±5V 


# 


3.4 




+v 






R L = 150£2, V| N = ±40mV 


±5V 




2.8 




±v 






R L = 500£2, V| N = ±40mV 


±2.5V 




1.2 




±v 


'OUT 


Output Current 


V 0U T = ±12V 


±15V 




24.0 




mA 






V ut = +2.8V 


±5V 




18.7 




mA 


•sc 


Short-Circuit Current 


Vout = OV, V| N = ±3V 


±15V 




24 


mA 


SR 


Slew Rate 


A v = -2, (Note 2) 


±15V 




150 




V/ns 








±5V 




60 




V/ns 


GBW 


Gain-Bandwidth 


f = 200kHz, R L = 2k 


±15V 




7.5 




MHz 








±5V 




6.0 




MHz 




Channel Separation 


V OUT = ±10V, R L = 500£2 


±15V 




98 


dB 


Is 


Supply Current 


Each Amplifier 


±15V 






1.45 


mA 






Each Amplifier 


±5V 






1.40 


mA 


€l€CTRICRl CHRRflCTCRISTICS -4o°c<t a <85°c,v C m=ov unless ot 


lerwis 


! noted. (Note 5) 


SYMBOL 


PARAMETER 


CONDITIONS 


V SUPPLY 


MIN 


TYP MAX 


UNITS 


Vos 


Input Offset Voltage 




+15V 






1.5 


mV 








±5V 






1.5 


mV 








±2.5V 






1.7 


mV 




Input Vos Drift 


(Note 4) 


±2.5V to ±15V 




5 8 


u.V/°C 


los 


Input Offset Current 




±2.5Vto+15V 




200 


nA 




Input Bias Current 




±2.5V to ±15V 




550 


nA 


CMRR 


Common-Mode Rejection Ratio 


V C M = ±12V 


±15V 




80 




dB 






V C M = ±2.5V 


±5V 




76 




dB 






V CM = ±0.5V 


±2.5V 




66 




dB 


PSRR 


Power Supply Rejection Ratio 


V s = ±2.5Vto ±15V 






90 


dB 



2-281 



LT1355/LT1356 



€l€CTRIC Al CHRRRCTCRISTICS -40 c < t a < ss c. v CM i ov unless « 



(Note 5) 



SYMBOL 


PARAMETER 


CONDITIONS 


VsUPPLY 


MIN 


TYP MAX 


UNITS 


AVOL 


Large-Signal Voltage Gain 


V 0U t = ±12V. R L = 1k 


+15V 


• 


7.0 




V/mV 






V OU T = ±10V, R L = 50052 


±15V 


• 


1.7 




V/mV 






V ut = ±2.5V, R L = 1k 


±5V 


• 


7.0 




V/mV 






ii ±o cw D. _ Rnnn 

vquj = ±<:.0V, Hl = DUUii 


±5V 


• 


1.7 




\//m\/ 

V/fllV 






(Jul — t--iJV, n|_ — i JUic 


±5V 


* 


0.4 




V/mV 






VniiT = +1 V Ri = 500£J 

UUI — 1 v t 1 ■ |_ 


XL. JV 


— 


1.7 




V/mV 


"OUT 


uuipui owiiiy 


n|_— IK, v|^ — IHUIIIV 


X 1 JV 




13.0 




+v 






R L = 500n, V| N = +40mV 


±15V 




11.5 




+v 






R L = 500fi. Vim = ±40mV 


±5V 


# 


3.4 




±v 






R L = 150£J, V, N = +40mV 


+ 5V 




2.6 




±v 






R L = 500fi, V| N = ±40mV 


±2.5V 




1.2 




±v 


l0UT 


Output Current 


V UT=±11.5V 


±15V 




23.0 




mA 






V ut = ±2.6V 


±5V 




17.3 




mA 


Isc 


Short-Circuit Current 


Vout = OV, V| N = ±3V 


±15V 




23 


mA 


SR 


Slew Rate 


A v = -2, (Note 2) 


+15V 




120 




Wus 








±5V 




50 




V/us 


GBW 


Gain-Bandwidth 


f = 200kHz, R L = 2k 


±15V 




7.0 




MHz 








+5V 




5.5 




MHz 




Channel Separation 


V OU t = ±10V, R L = 500Q 


+15V 




98 


dB 


Is 


Supply Current 


Each Amplifier 


±15V 






1.50 


mA 






Each Amplifier 


±5V 






1.45 


mA 



The • denotes specifications that apply over the full operating temperature 
range. 

Note 1: A heat sink may be required to keep the junction temperature 
below absolute maximum when the output is shorted indefinitely. 
Note 2: Slew rate is measured between ±10V on the output with ±6V input 
for±15V supplies and ±1V on the output with ±1 .75V input tor±5V 
supplies. 



Note 3: Full power bandwidth is calculated from the slew rate 

measurement: FPBW = (SR)/2nV P . 

Note 4: This parameter is not 100% tested. 

Note 5: The LT1355/LT1356 are not tested and are not quality-assurance 

sampled at -40°C and at 85°C. These specifications are guaranteed by 

design, correlation, and/or inference from 0°C, 25°C, and/or 70°C tests. 



TYPICAL P€RFORfTiAnC€ CHARRCT€RISTICS 



Supply Current vs Supply Voltage 
and Temperature 

















125°C 








25°C 








-55°C 











5 10 15 20 

SUPPLY VOLTAGE (±V) 



Input Common-Mode Range vs 
Supply Voltage 





V* 




-0.5 




-1.0 








■1 5 


< 

m 


2.0 


o 




o 




5 




z 


20 


o 




s 


1.5 


o 




o 


1.0 




0.5 




r 



T A = 25°C 






iV 0S < 


mv 







































































5 10 15 

SUPPLY VOLTAGE (±V) 



Input Bias Current vs 

Input Common-Mode Voltage 



v s = 
Ta = 

" ie = 


±15V 
25°C 

Ir* t Ir I 








2 















































-15 -10 -5 5 10 15 
INPUT COMMON-MODE VOLTAGE (V) 



2-282 



LT1355/LT1356 



TVPKflL P€RFORmnnC€ CHflmKT€RISTKS 



Input Bias Current vs 
Temperature 



200 
175 
[ 150 
125 

: 100 

I 75 
50 
25 












V S = ±15V 































































































-50 -25 25 50 75 100 125 
TEMPERATURE (°C) 



Input Noise Spectral Density 



Open-Loop Gain vs 
Resistive Load 




1k 10k 
FREQUENCY (Hz) 



100 1k 
LOAD RESISTANCE (Q) 



Open-Loop Gain vs Temperature 



-v 


I 

= ±15V 










= 1k 
-now 











































































































Output Voltage Swing vs 
Supply Voltage 



T A = 251 




Rl 


= 1k 












Rl 


= 500n 














R 


= 50on 
















Rl = 1 k 



Output Voltage Swing vs 
Load Current 



> 


-1.5 


CD 


-2.0 


S 




to 


-2.5 










o 
> 


25 






Q_ 


20 


a 




o 


1.5 




1 


V%0.5 



V S = ±5V 








B5 


C 






V 


N = 


00i 


V 




0°C 














































i°C- 


















—2 






I 85°C 






















• 25" 


c 










-4 


3 C 























































-50 -25 25 50 75 
TEMPERATURE (°C) 



5 10 15 

SUPPLY VOLTAGE (±V) 



-50-40 -30 -20 -10 10 20 30 40 50 
OUTPUT CURRENT (mA) 



Output Short-Circuit Current vs 
Temperature 











V S = ±5V 




















































SINK 










_sou 


RCE^ 

















































-50 -25 25 50 75 100 125 
TEMPERATURE (°C) 



Settling Time vs Output Step 
(Noninverting) 



Settling Time vs Output Step 
(Inverting) 




100 150 200 250 300 
SETTLING TIME (ns) 



50 100 150 200 250 300 350 
SETTLING TIME (ns) 



2-283 



LT1355/LT1356 



typical p€RFonmnnc€ chrrrctcrisucs 



Output Impedance vs Frequency 



Frequency Response vs 
Capacitive Load 



Gain-Bandwidth and Phase 
Margin vs Supply Voltage 




10k 



100k 1M 10M 100M 
FREQUENCY (Hz) 






18 




17 




16 


X 


15 


s 




14 


O 




S 


13 


Q 




IS 
< 


12 


m 






11 


< 






10 




9 













PHASE MARGIN 












































C 


AIN-BANUWIUIH 








4 = 25°C - 






T 



Gain-Bandwidth and Phase 
Margin vs Temperature 




-50 -25 25 50 75 100 125 
TEMPERATURE («B) 

1355/1356 S16 



Gain and Phase vs Frequency 




1M 10M 
FREQUENCY (Hz) 



Frequency Response vs 
Supply Voltage (A v = 1) 



100M 



5 10 15 

SUPPLY VOLTAGE (±V) 



Frequency Response vs 
Supply Voltage (A u = -1) 



52 






5 


50 






4 


48 






3 


46 


"O 

n 




2 




> 






44 






1 










42 


> 









E2 


< 


40 




Eg 


-1 




o 






38 


S 




-2 


36 






-3 


34 






-4 


32 






-5 




100k 



1M 10M 
FREQUENCY (Hz) 



-5 

100M 100k 



III 

T A = 25°C 
A v = -1 

_ Rr - R*. - 


III! 


















2k — 














































































































































±5 


/ 




























































.i:.2. 

Ill 


in III 1 1 







10M 

(Hz) 



Power Supply Rejection Ratio 
vs Frequency 



Common-Mode Rejection Ratio 
vs Frequency 



5 40 





+PSRR 






v s = 

Ta = 


±15V 
25°C 






V-PSR 


\ 









































100k 1M 10M 
FREQUENCY (Hz) 



10k 100k 1M 
FREQUENCY (Hz) 



10M 100M 









Ta 


= ±15V 
= 25°C 





















































100k 1M 
FREQUENCY (Hz) 



10M 100M 



2-284 



LT1355/LT1356 



typical P€RFonmnnc€ charactcristics 



Slew Rate vs Supply Voltage 



Slew Rate vs Temperature 



Slew Rate vs Input Level 



500 

f 400 
3- 

5 300 

CC 

s 

si 200 



100 




T A = 25"C 
A v = -1 








Rr = 
SR = 


SR* + SR"" 

























































5 10 
SUPPLY VOLTAGE (±V) 



Total Harmonic Distortion 
vs Frequency 




100 1k 10k 
FREQUENCY (Hz) 



2nd and 3rd Harmonic Distortion 
vs Frequency 




100k 200k 400k 1M 2M 4M 
FREQUENCY (Hz) 



ENCY (Hz) 



350 
300 
[ 250 
200 
150 
100 
50 





























V 


l-±1 


V 


A v = -2 

SR = SR%SR 














2 




















f s =± 


5V 















25 50 75 100 125 
TEMPERATURE (°C) 



Undistorted Output Swing vs 
Frequency (+15V) 




m 

FREQUENCY (Hz) 



Crosstalk vs Frequency 




1M 10M 
FREQUENCY (Hz) 



S, 200 



1 1 1 

T A = 25X 
V S = ±15V 
- Ay = -1 

SR= ^R_+SP 









































































































































































2 4 6 8 10 12 14 16 
INPUT LEVEL (Vp.p) 



Undistorted Output Swing vs 
Frequency (±5V) 



. Av = -1 



A v =1 



V s = ±5V 
Rl = 5k 
A«=1, 

2% MAX DISTORTION 
Av = -1. 

3% MAX DISTORTION 

i i i i inn 



1M 

FREQUENCY (Hz) 



Capacitive Load Handling 




10p 100p 1000p 0.01m 0.1li 1 M 
CAPACITIVE LOAD (F) 

13SM356G30 



2-285 



TVPICfll P€RFORfllflnC€ CHRRRCTCRISTICS 



Small-Signal Transient 
(Av = D 



Small-Signal Transient 
(A V = -1) 





Small- Signal Transient 
(A v = -1. C L = 1000pF) 



\A ' 



|V — 



Large-Signal Transient 
(A V = D 



Large-Signal Transient 
(A V = -1) 



Large-Signal Transient 
(A v = 1,C L = 10,000pF) 






RPPUCRTIOnS IRFORfRRTIOn 



Layout and Passive Components 

The LT1 355/LT1 356 amplifiers are easy to use and toler- 
ant of less than ideal layouts. For maximum performance 
(for example, fast 0.01% settling) use a ground plane, 
short lead lengths, and RF-quality bypass capacitors 
(0.01 u.F to 0.1 u.F). For high drive current applications use 
low ESR bypass capacitors (1ufto 10uf tantalum). 

The parallel combination of the feedback resistor and gain 
setting resistor on the inverting input combine with the 
input capacitance to form a pole which can cause peaking 
or oscillations. If feedback resistors greater than 5kfiare 
, a parallel capacitor of value 

C F >R G xC| N /R F 



should be used to cancel the input pole and optimize 
dynamic performance. For unity-gain applications where 
a large feedback resistor is used, C F should be greater than 

or equal to % 

Capacitive Loading 

The LT1355/LT1356 are stable with any capacitive load. 
As the capacitive load increases, both the bandwidth and 
phase margin decrease so there will be peaking in the 
frequency domain and in the transient response. Coaxial 
cable can be driven directly, but for best pulse fidelity a 
resistor of value equal to the characteristic impedance of 
the cable (i.e., 75Q) should be placed in series with the 
output. The other end of the cable should be terminated 
with the same value resistor to ground. 



LT1355/LT1356 



nppucmions inFORmnnon 

Input Considerations 

Each of the LT1 355/LT1 356 amplifier inputs is the base of 
an NPN and PNP transistor whose base currents are of 
opposite polarity and provide first-order bias current 
cancellation. Because of variation in the matching of NPN 
and PNP beta, the polarity of the input current can be 
positive or negative. The offset current does not depend 
on beta matching and is well controlled. The use of 
balanced source resistance at each input is recommended 
for applications where DC accuracy must be maximized. 
The inputs can withstand differential input voltages of up 
to 10V without damage and need no clamping or source 
resistance for protection. 

Circuit Operation 

The LT1355/LT1356 circuit topology is a true voltage 
feedback amplifier that has the slewing behavior of a 
current feedback amplifier. The operation of the circuit can 
be understood by referring to the simplified schematic. 
The inputs are buffered by complementary NPN and 
PNP emitter followers which drive an 800Q resistor. The 
input voltage appears across the resistor generating 
currents which are mirrored into the high impedance 
node. Complementary followers form an output stage 
which buffers the gain node from the load. The bandwidth 
is set by the input resistor and the capacitance on the high 
impedance node. The slew rate is determined by the 
current available to charge the gain node capacitance. 
This current is the differential input voltage divided by R1 , 
so the slew rate is proportional to the input. Highest slew 
rates are therefore seen in the lowest gain configurations. 
For example, a 1 0V output step in a gain of 1 has only a 
1 V input step, whereas the same output step in unity gain 
has a 1 times greater input step. The curve of Slew Rate 
vs Input Level illustrates this relationship. The LT1 355/ 
LT1 356 are tested for slew rate in a gain of -2 so higher 
slew rates can be expected in gains of 1 and -1 , and lower 
slew rates in higher gain configurations. 



The RC network across the output stage is bootstrapped 
when the amplifier is driving a light or moderate load and 
has no effect under normal operation. When driving a 
capacitive load (or a low value resistive load) the network 
is incompletely bootstrapped and adds to the compensa- 
tion at the high impedance node. The added capacitance 
slows down the amplifier which improves the phase 
margin by moving the unity-gain frequency away from the 
pole formed by the output impedance and the capacitive 
load. The zero created by the RC combination adds phase 
to ensure that even for very large load capacitances, the 
total phase lag can never exceed 1 80 degrees (zero phase 
margin) and the amplifier remains stable. 

Power Dissipation 

The LT1 355/LT1 356 combine high speed and large output 
drive in small packages. Because of the wide supply 
voltage range, it is possible to exceed the maximum 
junction temperature under certain conditions. Maximum 
junction temperature (Tj) is calculated from the ambient 
temperature (Ta) and power dissipation (Pd) as follows: 

LT1355CN8: Tj = T A + (P D x 130°C/W) 

LT1 355CS8: Tj = T A + (P D x 1 90°C/W) 

LT1356CN: Tj = T A + (P D x 110°C/W) 

LT1356CS: Tj = T A + (P D x 150°C/W) 

Worst case power dissipation occurs at the maximum 
supply current and when the output voltage is at 1/2 of 
either supply voltage (or the maximum swing if less than 
1/2 supply voltage). For each amplifier P DMA x is: 

Pdmax = (V + -V-)(I SMA x) + (V + /2) 2 /R l 

Example: LT1 356 in S1 6 at 70°C, V s = ±1 5V, R L = 1 k 

Pdmax = (30V)(1.45mA) + (7.5V) 2 /1kW = 99.8mW 

Tjmax = ?0°C + (4 x 99.8mW)(150°C/W) = 130°C 



XTUDSS 



2-287 



LT1355/LT1356 



tvpical nppucnnons 



Instrumentation Amplifier 




R4 ! . 1 R2 R3 
Av= R3 [ 1+ 2 [rT + R4 j 

TRIM R5 FOR GAIN 
TRIM R1 FOR COMMON-MODE REJECTION 
BW = 120kHz 





2-288 



IM 

TECHNOLOGY 



LT1357 
Op Amp 



F€fiTUfi€S 

■ 25MHz Gain-Bandwidth 

■ 600V/us Slew Rate 

■ 2.5mA Maximum Supply Current 

■ Unity Gain Stable 

■ C-Load™ Op Amp Drives All Capacitive Loads 

■ 8nV/VRz Input Noise Voltage 

■ 600u.V Maximum Input Offset Voltage 

■ 500nA Maximum Input Bias Current 

■ 120nA Maximum Input Offset Current 

■ 20V/mV Minimum DC Gain, R L =1k 

■ 115ns Settling Time to 0.1 %, 1 0V Step 

■ 220ns Settling Time to 0.01%, 10V Step 

■ ±12.5V Minimum Output Swing into 500ft 

■ ±3V Minimum Output Swing into 150ft 

■ Specified at ±2.5V, +5V, and ±1 5V 



flppucmions 

■ Wideband Amplifiers 

■ Buffers 

■ Active Filters 

■ Data Acquisition Systems 

■ Photodiode Amplifiers 



DCSCRIPTIOn 

The LT1357 is a high speed, very high slew rate opera- 
tional amplifier with outstanding AC and DC performance. 
The LT1357 has much lower supply current, lower input 
offset voltage, lower input bias current, and higher DC gain 
than devices with comparable bandwidth. The circuit 
topology is a voltage feedback amplifier with the 
slewing characteristics of a current feedback amplifier. 
The amplifier is a single gain stage with outstanding 
settling characteristics which makes the circuit an ideal 
choice for data acquisition systems. The output drives a 
500ft load to ±12.5V with +15V supplies and a 150ft 
load to +3V on ±5V supplies. The amplifier is also 
stable with any capacitive load which makes it useful in 
buffer or cable driver applications. 

The LT1357 is a member of a family of fast, high perfor- 
mance amplifiers using this unique topology and employ- 
ing Linear Technology Corporation's advanced bipolar 
complementary processing. For dual and quad amplifier 
versions of the LT1357 see the LT1 358/LT1 359 data 
sheet. For higher bandwidth devices with higher supply 
current see the LT1360 through LT1365 datasheets. For 
lower supply current amplifiers see the LT1 354 and LT1 355/ 
LT1356 data sheets. Singles, duals, and quads of each 
amplifier are available. 

C-Load is a trademark ot Linear Technology Corporation 



TYPICfil fiPPUCATIOn 

DAC l-to-V Converter 



DAC 
INPUTS ' 




Vout 



Av = -1 Large-Signal Response 




XTUESS 



2-289 



LI IvJO/ 



rbsolut€ mnximum rrtirgs 

Total Supply Voltage (V + to V") 36V 

Differential Input Voltage ±10V 

Input Voltage ±Vs 

Output Short-Circuit Duration (Note 1) Indefinite 

Operating Temperature Range -40°C to 85°C 



Specified Temperature Range -40°C to 85°C 

Maximum Junction Temperature (See Below) 

Plastic Package 150°C 

Storage Temperature Range -65°C to 1 50°C 

Lead Temperature (Soldering, 10 sec) 300°C 



PRCKRG6/ORDCR IRFORRIRTIOn 



NULL LT 
-IN [7 
♦IN \J 

r Li 



TOP VIEW 

— <3> — 



T\ NULL 
Tj V 
H VOUT 

T| NC 



N8 PACKAGE, 8-LEAO PLASTIC DIP 
TjMAX = 150°C.e JA = !30°C/W 



ORDER PART 
NUMBER 



LT1357CN8 




S8 PACKAGE, 8-LEAD PLASTIC SOIC 
Tjmax = '50°C,9ja=190°C/W 



ORDER PART 
NUMBER 



LT1357CS8 



S8 PART MARKING 



1357 



Consult factory tor Industrial and Military grade parts. 



€L€CTRICRL CHRRRCTCRISTICS T A = 25 C, V CM = 0V unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS 


VsuPPLY 


MIN TYP MAX 


UNITS 


v 0S 


Input Offset Voltage 




±15V 

±5V 

±2.5V 


0.2 0.6 
0.2 0.6 
0.3 0.8 


mV 
mV 
mV 


I OS 


Input Offset Current 




±2.5V to±15V 


40 120 


nA 


Ib 


Input Bias Current 




±2.5V to ±15V 


120 500 


nA 


e n 


Input Noise Voltage 


f = 10kHz 


+2.5V to ±1 5V 


8 


nV/VHz 


in 


Input Noise Current 



f = 10kHz 


±2.5Vto±15V 


0.8 


pAA'Hz 


R|N 


Input Resistance 


V CM = ±12V 
Differential 


±15V 
±15V 


35 80 
6 


MQ 
Mn 


C|N 


Input Capacitance 




+15V 


3 


PF 




Input Voltage Range * 




±15V 
±5V 
±2.5V 


12.0 13.4 
2.5 3.5 
0.5 1.1 


V 
V 
V 


Input Voltage Range ~ 




+15V 
±5V 

r2 5V 


-13.2 -12.0 
-3.3 -2.5 
-0.9 -0.5 


V 
V 
V 


CMRR 


Common-Mode Rejection Ratio 


V CM = ±12V 
V CM = ±2.5V 
V CM = ±0.5V 


±15V 

±5V 

±2.5V 


83 97 
78 84 
68 75 


dB 
dB 
dB 


PSRR 


Power Supply Rejection Ratio 


V S = +2.5V to ±1 5V 




92 106 


dB 


AvOL 


Large-Signal Voltage Gain 


V 0U T = ±12V, R L = 1k 
V OU T = ±10V, R L = 5O0n 
V OU T = ±2.5V,R L = 1k 
Vout = ±2 5V, R L = 500Q 
V ut = ±2.5V, R L = 150n 
V 0U T = ±1V, R L = 500U 


±15V 

±15V 

±5V 

+5V 

±5V 

±2.5V 


20.0 65 
7.0 25 

20.0 45 
7.0 25 
1.5 6 
7.0 30 


V/mV 
V/mV 
V/mV 
V/mV 
V/mV 
V/mV 


VOUT 


Output Swing 


Rl = 1k, V| N = ±40mV 
R L = 500£2, V| N = ±40mV 
R L = 500£2, V| N = ±40mV 
R L = 150ii, V, N = ±40mV 
R L = 500Q, V| N = ±40mV 


+15V 

±15V 

±5V 

±5V 

±2.5V 


13.3 13.8 
12.5 13.0 
3.5 4.0 
3.0 3.3 
1.3 1.7 


±v 
+v 

+v 



2-290 



xruoai 



LT1357 



€l€CTRICRl CHRRRCTCRISTICS T A = 25 C, V CM = OV unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS 


^SUPPLY 


MIN TYP MAX 


UNITS 


'out 


Output Current 


v OUT = ± l'- 3v 

V ut = ±3V 


_tl OV 

+5V 


OU 

20 25 


ffiA 
mA 


he 


Short-Circuit Current 


"OUT = OV, V im = +JV 


± 1 OV 




mA 


SR 


Slew Rate 


A V = -2, (Note 2) 


±15V 

xOV 


300 600 

IjU Lex) 


V/u.s 

\//llC 

V/Jib 




Full Power Bandwidth 


10V Peak, (Note 3) 
3V Peak, (Note 3) 


+15V 
±5V 


9.6 
11.7 


MHz 
MHz 


GBW 


Gain-Bandwidth 


f = 200kHz, Rl = 2k 


+15V 

±5V 

+2.5V 


18 25 
15 22 
20 


MHz 
MHz 
MHz 


tr.tf 


Rise Time, Fall Time 


A v = 1,10%-90%, 0.1V 


+15V 
+5V 


8 
9 


ns 
ns 




Overshoot 


Ay = 1,0.1V 


±15V 
±5V 


27 
27 


% 
% 




Propagation Delay 


50% V| N to 50%V OU T, 0.1V 


±15V 
±5V 


9 

11 


ns 
ns 


ts 


Settling Time 


10V Step, 0.1%, A v = -1 
10V Step, 0.01%, Ay = -1 
5V Step, 0.1%, A v = -1 
5V Step, 0.01%, Ay = -1 


±15V 
±15V 
±5V 
±5V 


115 
220 
110 
380 


ns 
ns 
ns 
ns 




Differential Gain 


f = 3.58MHz, A v = 2, R L = 1k 


+15V 

±5V 


0.1 
0.1 


% 
% 




Differential Phase 


f - 3.58MHz, Ay = 2, Rl = 1 k 


±15V 
±5V 


0.50 
0.35 


Deg 
Deg 


Ro 


Output Resistance 


Ay = 1,f = 100kHz 


±1 5V 


0.3 


£2 


Is 


Supply Current 




+15V 
±5V 


2.0 2.5 
1.9 2.4 


mA 
mA 



€l€CTRICRl CHRRRCTCRISTICS oc Ta < 70°C, Vcm = 0V unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS 


VsUPPLY 


MIN 


TYP MAX 


UNITS 


Vos 


Input Offset Voltage 




±15V 






0.8 


mV 








±5V 






0.8 


mV 








±2.5V 






1.0 


mV 




Input V s Drift 


(Note 4) 


±2.5V to ±1 5V 




5 8 


u.V/°C 


I OS 


Input Offset Current 




±2.5V to ±1 5V 




180 


nA 


Ib 


Input Bias Current 




±2.5Vto±15V 




750 


nA 


cmrr 


Common-Mode Rejection Ratio 


V CM = ±12V 


±15V 




81 




dB 






V CM = ±2.5V 


±5V 




77 




dB 






V CM = ±0.5V 


+2.5V 




67 




dB 


psrr 


Power Supply Rejection Ratio 


V S = ±2.5V to ±1 5V 






90 


dB 


Avol 


Large-Signal Voltage Gain 


V 0U t = ±12V, Rl = 1k 


+15V 




15 




V/mV 






V OU t = ±10V, R L = 500£2 


±15V 




5 




V/mV 






V ut = ±2.5V, Rl = 1k 


+5V 




15 




V/mV 






V 0UT = +2.5V, R L = 500Q 


±5V 




5 




V/mV 






V 0U T = ±2.5V, R L = 150n 


±5V 




1 




V/mV 






V 0U t = ±1V, R L = 500n 


+2.5V 




5 




V/mV 



2-291 



LT1357 



€l€CTRICRl CHRRRCT6RISTICS O C < T A < 70 C. V CM = OV unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS 


VsUPPLY 


MIN 


TYP 


MAX 


UNITS 


VoUT 


Output Swing 


Rl = 1k, V| N = +40mV 


±15V 


# 


13.2 






±V 






R|_ = 500C2, V| N = ±40mV 


+15V 


a 


12.2 






±V 






Rl = 500n, V iN = ±40mV 


+5V 




3.4 






±v 






R L = 150n, V| N = +40mV 


+5V 




2.8 






±v 






Ri_ = 500Q, Vim = ±40mV 


±2.5V 




1.2 






±v 


'OUT 


Output Current 


V OU T = ±12.2V 


±15V 




24.4 






mA 






V UT = +2.8V 


±5V 




18.7 






mA 


Isc 


Short-Circuit Current 


V UT=OV, V| N = ±3V 


+15V 




25 


mA 


SR 


Slew Rate 


A v = -2, (Note 2) 


±15V 




225 






V/U.S 








±5V 




125 






V/ns 


GBW 


Gain-Bandwidth 


f = 200kHz,R L = 2k 


+15V 




15 






MHz 








±5V 




12 






MHz 


Is 


Supply Current 




+15V 








2.9 


mA 








±5V 








2.8 


mA 


€l€CTRICRl CHRRRCTCRISTICS -40 C < T A < 85 C. V CM = OV unless otherwise noted. (Note 5) 


SYMBOL 


PARAMETER 


CONDITIONS 


VsuPPLY 


MIN 


TYP 


MAX 


UNITS 


Vos 


Input Offset Voltage 




±15V 








1.3 


mV 








±5V 








1.3 


mV 








±2.5V 








1.5 


mV 




Input V s Drift 


(Note 4) 


±2.5Vto±15V 




5 8 


nv/°c 


los 


Input Offset Current 




±2.5V to ±15V 




300 


nA 


Ib 


Input Bias Current 




±2.5V to±15V 




900 


nA 


CMRR 


Common-Mode Rejection Ratio 


V CM = +12V 


+15V 




80 






dB 






V CM = ±2.5V 


±5V 




76 






dB 






V CM = ±0.5V 


±2.5V 




66 






dB 


PSRR 


Power Supply Rejection Ratio 


V s = ±2.5Vto ±15V 






90 


dB 




Large-Signal Voltage Gain 


V 0UT = +12V, R L = 1k 


±15V 




10.0 






V/mV 






V OUT = ±10V, R L = 500£i 


±15V 




2.5 






V/mV 




V 0U T = ±2.5V, R L = 1k 


+5V 




10.0 






V/mV 






V 0UT = ±2.5V, R L = 500n 


+5V 




2.5 






V/mV 






V 0U T = ±2.5V, R L = 150£1 


±5V 




0.6 






V/mV 






V ut = ±1V, Rl = 500Q 


+2.5V 




2.5 






V/mV 


VoUT 


Output Swing 


R L = 1k, V| N = ±40mV 


+15V 




13.0 






±V 






Rl = 500O, V| N = ±40mV 


+15V 




12.0 






+V 






Rl = 50012, V| N = ±40mV 


+5V 




3.4 






±V 






R L = 150£2, V| N = ±40mV 


±5V 




2.6 






±V 






R L = 500f2, V| N = ±40mV 


±2.5V 




1.2 






±V 


'out 


Output Current 


V 0U T = ±12V 


±15V 




24.0 






mA 






V ut = ±2-6V 


±5V 




17.3 






mA 


Isc 


Short-Circuit Current 


V UT=OV, V| N = +3V 


±1 5V 




24 


mA 


SR 


Slew Rate 


Ay = -2, (Note 2) 


±15V 




180 






V/ns 








±5V 




100 






V/us 



2-292 



LT1357 



€l€CTMCm CHRRRCTCRISTICS -40 c<t a <85 c v CM =ov 



otherwise noted. (Note 5) 



SYMBOL 


PARAMETER 


CONDITIONS 


"supply 


MIN 


TYP MAX 


UNITS 


GBW 


Gain-Bandwith 


f = 200kHz, R L = 2k 


±15V 


• 


14 




MHz 








+5V 


• 


11 




MHz 


Is 


Supply Current 




±15V 


• 




3.0 


mA 








±5V 


• 




2.9 


mA 



The • denotes specifications that apply over the full operating 
temperature range. 

Note 1: A heat sink may be required to keep the junction temperature 
below absolute maximum when the output is shorted indefinitely. 
Note 2: Slew rate is measured between ±10V on the output with ±6V input 



Note 3: Full power bandwidth is calculated from the slew rate 

measurement: FPBW = SR/2ir.v>. 

Note 4: This parameter is not 100% tested. 

Note 5: The LT1357 is not tested and is not quality-assurance sampled at 

-40°C and at 85°C. These specifications are guaranteed by design. 



for ±1 5V supplies and ±1 V on the output with ±1 75V input for ±5V supplies. correlation, and/or inference from 0°C, 25°C, and/or 70°C tests. 



tvpichl P€RFORmnnc€ chrrrctcristics 



Supply Current vs Supply Voltage 
and Temperature 

















125°C 








25-C 
-55°C 



















5 10 15 20 

SUPPLY VOLTAGE (±V) 



Input Bias Current vs 
Temperature 



450 
400 

5- 350 

£ 300 

| 250 

£ 200 
m 

^ 150 
100 
50 












V S = ±15V 













































































































-50 -25 25 50 75 100 125 
TEMPERATURE (°C) 

1360.1359 604 



Input Common-Mode Range vs 
Supply Voltage 



T A = 25°C 






AV 0S < 


mV 







































































5 10 15 

SUPPLY VOLTAGE (±V) 



Input Noise Spectral Density 







v s 


= ±15V — 
= 25°C _ 
= 101 — 
= 100k — 






T fl 












A v 






R S 




























In 































100 1k 10k 

FREQUENCY (Hz) 



0.1 



100k 



Input Bias Current vs 

Input Common-Mode Voltage 



400 
300 

? 

i 200 
r 

3 100 

5 

L 
E 

-100 
-200 



V S = ±15V 
T A = 25°C 










B * IB 

2 



























































-15 -10 -5 5 10 15 
INPUT COMMON-MODE VOLTAGE (V) 



Open-Loop Gain vs 
Resistive Load 



5 

a. 




100 1k 
LOAD RESISTANCE (n) 



2-293 



TYPICAL P€RFORmnnC€ CHRRRCTCRISTICS 



Open-Loop Gain vs Temperature 



Output Voltage Swing vs 
Supply Voltage 



Output Voltage Swing vs 
Load Current 





101 




100 




99 




9S 


< 




CD 




Qt 
O 


97 


o 




jz 


96 






O 


95 




94 




93 



- v 

Vs 


= 1k 

J-11W 










= ±1 5\ 

































































































-50 -25 25 50 75 100 125 
TEMPERATURE (°C) 

1357 G07 

Output Short-Circuit Current vs 
Temperature 













's = ±£ 


V 




















































INK 










>0URC 


: \ 





































T A = 25°C 




Rl = 1k 




























R L = 50( 
















Rl = 1k 

I 



V + 


-0 5 




-1.0 




- 1 5 


CD 


-2.0 


5 




CO 


-2 5 






< 




o 


2.5 






=1 
^ 


2.0 


h- 




=1 

o 


1.5 




1.0 


V - 


i 0.5 



V 
V 


I I 
3 =±5V 




5^85°C 






N = 


OOn 


V 


















































c - 


2 


5 C 














-25 


























\ 8 


5°C 














-4 


) c s 



























































5 10 15 

SUPPLY VOLTAGE (±V) 



Settling Time vs Output Step 
(Noninverting) 



-50-40 -30 -20 -10 10 20 30 40 50 
OUTPUT CURRENT (mA) 



Settling Time vs Output Step 
(Inverting) 



-50 -25 25 50 75 100 125 
TEMPERATURE (15) 




100 150 200 
SETTLING TIME (ns| 



100 150 200 

SETTLING TIME (ns) 



Output Impedance vs Frequency 




Gain and Phase vs Frequency 



100k 1M 10M 100M 
FREQUENCY (Hz) 



100k 1M 

FREQUENCY (Hz) 



Gain-Bandwidth and Phase 
Margin vs Supply Voltage 




















PHAS 


: MARGIN 






































^-GAIN- 


BANDWIDT 








I 











5 10 15 

SUPPLY VOLTAGE (±V) 



20 



50 
48 
46 

44 3 

zn 

42 | 

4 ° I 
38 5 
36 1 
34 

32 
30 



2-294 



LT1357 



TVPicnt PCRFonmnncc cHnRnacRisncs 



Gain-Bandwidth and Phase 
Margin vs Temperature 



Frequency Response vs 
Supply Voltage (A v = 1) 




25 50 75 
TEMPERATURE fC) 



1M 10M 
FREQUENCY (Hz) 



Frequency Response vs 
Supply Voltage (A v = -1) 




1M 10M 
FREQUENCY (Hz) 



Frequency Response vs 
Capacitive Load 




100k 



1M 10M 
FREQUENCY (Hz) 



100M 



Power Supply Rejection Ratio 
vs Frequency 



-PSRR^V 


=SRR 




Vs = 
Ta = 


+15V 
25°C 



















































10k 100k 1M 
FREQUENCY (Hz) 



Common-Mode Rejection Ratio 
vs Frequency 









V S = ±15V 
T A = 25-C 





















































10k 



100k 1M 
FREQUENCY (Hz) 



Slew Rate vs Supply Voltage 



Slew Rate vs Temperature 



Slew Rate vs Input Level 



A v = -1 
R F = RG = 2k 

-SR= SR+ + 
2 










SR" 
















lA = 


>5"C 



















































































5 10 
SUPPLY VOLTAGE (±V) 



600 

500 

1 400 
'■■ 

LXJ 

5 300 
cc 

i 

gj 200 
100 












I 

V S = ±15V 


_ SR 
Av 


SR 4 

= -2 


tSR" 
2 
























^= 














V 




V 



















-50 -25 



25 50 75 
TEMPERATURE (°C) 



100 125 



700 
600 
500 
400 
300 
200 
100 




I I I 
V S = ±15V 
A v = -1 
_ Re = Re. = 2k 


























_ E 
_ T 


„_ SR+tSR" 












A = 25°C 


2 



































































































































6 8 10 12 14 16 18 
INPUT LEVEL (Vp.p) 



2-295 



LT1357 

TVPICfiL P€RFORmnnC€ CHRRRCTCRISTICS 



Total Harmonic Distortion 
vs Frequency 



0.0001 




10 100 1k 10k 100k 
FREQUENCY (Hz) 



Undistorted Output Swing vs 
Frequency (±15V) 




1M 

FREQUENCY (Hz) 



Undistorted Output Swing vs 
Frequency (±5V) 



A v = -1- 



- Vs = ±5V 
Rl = 2k 

2% MAX DISTORTION " 

I I I I I I IN 



100k 



1M 

FREQUENCY (Hz) 



2nd and 3rd Harmonic Distortion 
vs Frequency 




Differential Gain and Phase 
vs Supply Voltage 



100k 200k 400k 1M 2M 4M 
FREQUENCY (Hz) 





DIFFE 


GENUAL 


SAIN 














DIFF 


RENTIAL 


PHASE 






















Rl = 1k 
T A = 25°C 



±5 ±10 
SUPPLY VOLTAGE (V) 



Capacitive Load Handling 




10p 100p 1000p 0.01|i 0.1n 
CAPACITIVE LOAD (F) 



1(1 



Small-Signal Transient 
(Av = D 



Small-Signal Transient 
(A V = -1) 




Small-Signal Transient 
(A v = -1, C L = 1000pF) 





2-296 



LT1357 

TYPICAL P€RFORmnnC€ CHARflCT€RISTICS 

Large-Signal Transient Large-Signal Transient Large-Signal Transient 

(A v = 1) (Av = -1) (A v = 1,C L = 10,000pF) 



RPPUCRTIORS IRFORmflTIOn 

The LT1357 may be inserted directly into many high 
speed amplifier applications improving both DC and AC 
performance, provided that the nulling circuitry is 
removed. The suggested nulling circuit for the LT1357 is 
shown below. 

Offset Nulling 



v* 



LT1357 



v • 


s 


iok; 


V 



Layout and Passive Components 

The LT1 357 amplifier is easy to apply and tolerant of less 
than ideal layouts. For maximum performance (for 
example fast settling time) use a ground plane, short lead 
lengths, and RF-quality bypass capacitors (0.01 nF to 
0.1 |iF). For high drive current applications use low ESR 
bypass capacitors (1 ufto 1 Ou-Ftantalum). Sockets should 
be avoided when maximum frequency performance is 
required, although low profile sockets can provide 
reasonable performance up to 50MHz. For more details 
see Design Note 50. 





The parallel combination of the feedback resistor and gain 
setting resistor on the inverting input can combine with 
the input capacitance to form a pole which can cause 
peaking or oscillations. For feedback resistors greater 
than 5kt2, a parallel capacitor of value 

C F > R G x C| N /R F 

should be used to cancel the input pole and optimize 
dynamic performance. For unity-gain applications where 
a large feedback resistor is used, Cp should be greater 
than or equal to Cin- 

Capacitive Loading 

The LT1357 is stable with any capacitive load. This is 
accomplished by sensing the load induced output pole and 
adding compensation at the amplifier gain node. As the 
capacitive load increases, both the bandwidth and phase 
margin decrease so there will be peaking in the frequency 
domain and in the transient response as shown in the 
typical performance curves.The photo of the small-signal 
response with 1 0OOpF load shows 50% peaking. The large 
signal response with a 10,000pF load shows the output 
slew rate being limited to 5V/(is by the short-circuit 
current. Coaxial cable can be driven directly, but for best 
pulse fidelity a resistor of value equal to the characteristic 
impedance of the cable (i.e., 75Q) should be placed in 
series with the output. The other end of the cable should 
be terminated with the same value resistor to ground. 



2-297 



LT1357 



Rppucmions inFORmnnon 



Input Considerations 

Each of the LT1357 inputs is the base of an NPN and 
a PNP transistor whose base currents are of opposite 
polarity and provide first-order bias current cancellation. 
Because of variation in the matching of NPN and PNP 
beta, the polarity of the input bias current can be positive 
or negative. The offset current does not depend on beta 
matching and is well controlled. The use of balanced 
source resistance at each input is recommended for 
applications where DC accuracy must be maximized. The 
inputs can withstand differential input voltages of up to 
10V without damage and need no clamping or soui 
resistance for protection. 

Power Dissipation 

The LT1357 combines high speed and large output drive 
in a small package. Because of the wide supply voltage 
range, it is possible to exceed the maximum junction 
temperature under certain conditions. Maximum junction 
temperature (Tj) is calculated from the ambient tempera- 
ture (T A ) and power dissipation (P D ) as follows: 

LT1357CN8: Tj = T A + (P D x 130°C/W) 
LT1357CS8: Tj = T A + (P D x 190°C/W) 

Worst case power dissipation occurs at the maximum 
supply current and when the output voltage is at 1/2 of 
either supply voltage (or the maximum swing if less than 
1/2 supply voltage). Therefore Pdmax is: 

Pdmax = (V + -V-)(I SMA x) + (V + /2) 2 /R l 

Example: LT1357CS8 at 70°C, V s = +15V, R L = 120£2 
(Note: the minimum short-circuit current at 70°C is 
25mA, so the output swing is guaranteed only to 3V with 
120Q.) 

Pdmax = (30V)(2.9mA) + (15V-3V)(25mA) = 387mW 
Tjmax = 70°C + (387mW)(190°C/W) = 144°C 



Circuit Operation 

The LT1357 circuit topology is a true voltage feedback 
amplifier that has the slewing behavior of a current feed- 
back amplifier. The operation of the circuit can be under- 
stood by referring to the simplified schematic. The inputs 
are buffered by complementary NPN and PNP emitter 
followers which drive a 500Q resistor. The input voltage 
appears across the resistor generating currents which are 
mirrored into the high impedance node. Complementary 
followers form an output stage which buffers the gain 
node from the load. The bandwidth is set by the input 
j the capacitance on the high impedance node. 
The slew rate is determined by the current available to 
charge the gain node capacitance. This current is the 
differential input voltage divided by R1 , so the slew rate 
is proportional to the input. Highest slew rates are there- 
fore seen in the lowest gain configurations. For example, 
a 1 0V output step in a gain of 1 has only a 1 V input step, 
whereas the same output step in unity gain has a 1 times 
greater input step. The curve of Slew Rate vs Input Level 
illustrates this relationship. The LT1 357 is tested for slew 
rate in a gain of -2 so higher slew rates can be expected 
in gains of 1 and -1, and lower slew rates in higher gain 
configurations. 

The RC network across the output stage is bootstrapped 
when the amplifier is driving a light or moderate load and 
has no effect under normal operation. When driving a 
capacitive load (or a low value resistive load) the network 
is incompletely bootstrapped and adds to the compensa- 
tion at the high impedance node. The added capacitance 
slows down the amplifier which improves the phase 
margin by moving the unity gain frequency away from the 
pole formed by the output impedance and the capacitive 
load. The zero created by the RC combination adds phase 
to ensure that even for very large load capacitances, the 
total phase lag can never exceed 180 degrees (zero phase 
margin) and the amplifier remains stable. 



2-298 



XTUtKS 



TVPicm nppucOTions 



Instrumentation Amplifier 




VOUT 



. R4 , 1 R2 R3 ... 
Av= R3[ 1+ 2(rT + R4) + ^ I = 

TRIM R5 FOR GAIN 

TRIM R1 FOR COMMON-MODE REJECTION 
BW = 250kHz 



200kHz, 4th Order Butterworth Filter 




VOUT 



simpiiFKD scHcmnnc 




2-299 




urn 



LT1358/LT1359 



TECHNOLOGY 



FCRTUftCS 

■ 25MHz Gain-Bandwidth 

■ 6OOV/11S Slew Rate 

■ 2.5mA Maximum Supply Current per Amplifier 

■ Unity Gain Stable 

■ C-Load™ Op Amp Drives All Capacitive Loads 

■ 8nV/VHz Input Noise Voltage 

■ 600(xV Maximum Input Offset Voltage 

■ 500nA Maximum Input Bias Current 

■ 120nA Maximum Input Offset Current 

■ 20V/mV Minimum DC Gain, R L =1k 

■ 115ns Settling Time to 0.1%, 10V Step 

■ 220ns Settling Time to 0.01%, 10V Step 

■ +12.5V Minimum Output Swing into 500C2 

■ ±3V Minimum Output Swing into 150Q 

■ Specified at ±2.5V,±5V, and +15V 

RPPUCRTlOnS 

■ Wideband Amplifiers 

■ Buffers 

■ Active Filters 

■ Data Acquisition Systems 

■ Photodiode Amplifiers 



Dual and Quad 
25MHz, 600V/lis Op Amps 

DCSCMPTIOn 

The LT1 358/LT1 359 are dual and quad low power high 
speed operational amplifiers with outstanding AC and DC 
performance. The amplifiers feature much lower supply 
current and higher slew rate than devices with comparable 
bandwidth. The circuit topology is a voltage feedback 
amplifier with matched high impedance inputs and the 
slewing performance of a current feedback amplifier. The 
high slew rate and single stage design provide excellent 
settling characteristics which make the circuit an ideal 
choice for data acquisition systems. Each output drives a 
500Q load to +1 2.5V with ±1 5V supplies and a 1 50£2 load 
to +3V on ±5V supplies. The amplifiers are stable with any 
capacitive load making them useful in buffer applications. 

The LT1358/LT1 359 are members of a family of fast, high 
performance amplifiers using this unique topology and 
employing Linear Technology Corporation's advanced 
bipolar complementary processing. For a single amplifier 
version of the LT1 358/LT1 359 see the LT1 357 data sheet. 
For higher bandwidth devices with higher supply currents 
see the LT136Q through LT1365 data sheets. For lower 
supply current amplifiers see the LT1354 and LT1355/ 
LT1356 data sheets. Singles, duals, and quads of each 
amplifier are available. 

C-Load is a trademark of Linear Technology Corporation 




2-300 



LT1358/LT1359 



rbsolutc mnximum rrtirgs 

Total Supply Voltage (V + toV") 36V 

Differential Input Voltage +10V 

Input Voltage ±Vs 

Output Short-Circuit Duration (Note 1 ) Indefinite 

Operating Temperature Range -40°C to 85°C 



Specified Temperature Range -40°C to 85°C 

Maximum Junction Temperature (See Below) 

Plastic Package 150°C 

Storage Temperature Range -65°C to 150°C 

Lead Temperature (Soldering, 10 sec) 300°C 



PRCKRG€/ORD€R IDFORfTIRTIOn 



OUT A [J 
-IN A [T 
+INA [T 

v" [T 



TOP VIEW 





!T\ v+ 
T\ OUTE 
T] -IN B 
y| tIN B 



N8 PACKAGE 
8-LEAD PLASTIC DIP 
Tj M „ = 150°C.e J A = 1M'>C/W 



ORDER PART 
NUMBER 



LT1358CN8 



TOP VIEW 




S8 PACKAGE 
8-LEAO PLASTIC SOIC 
Tji«x = '50°C,e,j A = 1WC/W 



ORDER PART 
NUMBER 



LT1358CS8 



S8 PART MARKING 



1358 



TOP VIEW 




N PACKAGE 
14-LEAD PLASTIC DIP 

TjMAX = 150°C,e JS =110-C/W 



ORDER PART 
NUMBER 



LT1359CN 




S PACKAGE 
16-LEAD PLASTIC SOIC 
TjMM( = l50°C,9jA = 150-C/W 



ORDER PART 
NUMBER 



LT1359CS 



Consult factory for Industrial and Military grade parts. 



CL6CTRICRL CHRRRCT6RISTICS 



T A = 25 C Vcm = OV unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS 


VSUPPLY 


MIN 


TYP 


MAX 


UNITS 


Vos 


Input Offset Voltage 




+15V 




0.2 


0.6 


mV 








±5V 




0.2 


0.6 


mV 








±2.5V 




0.3 


0.8 


mV 


los 


Input Offset Current 




+2.5V to ±15V 




40 


120 


nA 


l B 


Input Bias Current 




+2.5V to ±1 5V 




120 


500 


nA 


e n 


input Noise Voltage 


f = 10kHz 


±2.5Vto±15V 


8 


nV/VHz 


in 


Input Noise Current 


f = 10kHz 


±2.5V to +15V 


0.8 


pA/VHi 


Rin 


Input Resistance 


V C M = ±12V 


±15V 


35 


80 




un 




Input Resistance 


Differential 


+15V 


6 


MQ 


ClN 


Input Capacitance 




±15V 


3 


PF 



2-301 



€L€CTRICRL CHflRflCT€RISTICS T A = 25°C,V CM = 0V unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS 


VSUPPLY 


MIN 


TYP 


MAX 


UNITS 




Input Voltage Range* 




±15V 

+5V 

±2.5V 


12.0 
2.5 
0.5 


13.4 
3.5 
1.1 




V 
V 
V 




Input Voltage Range" 




±15V 

+5V 

±2.5V 




-13.2 
-3.3 
-0.9 


-12.0 

-2.5 
-0.5 


V 
V 
V 


CMRR 


Common-Mode Rejection Ratio 


V CM = +12V 
V CM = ±2.5V 
V CM = ±0.5V 


±15V 

±5V 

±2.5V 


83 
78 
68 


97 
84 
75 




dB 
dB 
dB 


PSRR 


Power Supply Rejection Ratio 


V s = ±2.5Vto±15V 




92 


106 




dB 


AvOL 


Large-Signal Voltage Gain 


V 0U T = ±12V, R L = 1k 
Vout = +10V, Rl = 500Q 


+15V 
+15V 


20 
7 


65 
25 




V/mV 
V/mV 






V olJT = +2.5V, R L = 1 k 
Vout = ±2.5v! R L = 500Q 
V OU T = ±2.5V, R L = 150O 


±5V 
±5V 
±5V 


20 

7 

1.5 


45 
25 
6 




V/mV 
V/mV 
V/mV 






V ut = ±1V, R L = 500n 


±2.5V 


7 


30 




V/mV 


Vout 


Output Swing 


Rl = 1k, V| N = +40mV 
R L = 500n, V| N = ±40mV 


+ 15V 
±15V 


13.3 
12.5 


13.8 
13.0 




±V 
±V 






R L = 500n, V iN = ±40mV 


±5V 


3.5 


4.0 




±V 






R L = 150a, V, N = ±40mV 
H|_ = oUUii, V|[^ = ±4umv 


±5V 
±z.ov 


3.0 
1 .6 


3.3 




±V 

±V 


'OUT 


Output Current 


Vout = ±1 2.5V 

V 0U t = ±3V 


±15V 
±5V 


25 
20 


30 
25 




mA 
mA 


lis 


Short-Circuit Current 


V UT = OV, V IN = +3V 


±15V 


30 


42 




mA 


SR 


Slew Rate 


A v = -2, (Note 2) 


±15V 
±5V 


300 
150 


600 
220 




V/ps 
V/u-S 




Full Power Bandwidth 


10V Peak, (Note 3) 
3V Peak, (Note 3) 


±15V 

±5V 




9.6 
11.7 




MHz 
MHz 


GBW 


Gain-Bandwidth 


f = 200kHz, R L = 2k 


±15V 

±5V 
±2.5V 


18 
15 


25 
22 
20 




MHz 
MHz 
MHz 


tr.tf 


Rise Time, Fall Time 


A v =1,10%-90%, 0.1V 


±15V 
±5V 




8 
9 




ns 
ns 




Overshoot 


Av = 1,0.1V 


±15V 
±5V 




27 
27 




% 
% 




Propagation Delay 


50% V m to 50% Vout, 0.1V 


+15V 
±5V 


9 
11 


ns 
ns 


ts 


Settling Time 


10V Step, 0.1%, A v = -1 
10V Step, 0.01%, A v = -1 
5V Step, 0.1%, A v = -1 

R\l Ctan (I (110/ A 1 

JV Diep, U.U 1 /o, Ay = -1 


±15V 
±15V 
±5V 

±Dv 




115 

220 
110 
380 




ns 
ns 
ns 
ns 




UN IcfcMlldl udlll 




±1DV 

±5V 




0.1 
0.1 




% 
% 




Differential Phase 


f = 3.58MHz, Ay = 2, R L = 1 k 


±15V 
+5V 




0.50 
0.35 




Dpn 

Deg 


Ro 


Output Resistance 


A v = 1, f = 100kHz 


±15V 


0.3 


£2 




Channel Separation 


V OU T = ±10V, R L = 500fi 


±15V 


100 


113 




dB 


is 


Supply Current 


Each Amplifier 
Each Amplifier 


±15V 
±5V 




2.0 
1.9 


2.5 
2.4 


mA 
mA 



2-302 



LT1358/LT1359 



CLCCTRICRL CHRRRCTCRISTICS 0°C < T A < 70°C, Vcm = OV unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS 


"supply 


MIN 


TYP MAX 


UNITS 


Vos 


Input Offset Voltage 




±15V 
±5V 
±2.5V 




0.8 
0.8 
1.0 


mV 
mV 
mV 




Input Vos Drift 


(Note 4) 


+9 "iVtn +1 c i\/ 




5 8 


uV/ C 


'os 


Input Offset Current 




±2.5VtO±15V 




180 


nA 


Ib 


Input Bias Current 




±2.5V to ±15V 




750 


nA 


CMRR 


Common-Mode Rejection Ratio 


V CM = ±12V 
V CM = ±2.5V 
V CM = ±0.5V 


±15V 
±5V 
+2.5V 


l 
* 


81 

77 
67 


dB 
dB 
dB 


PSRR 


Power Supply Rejection Ratio 


V S = ±2.5V to ±1 5V 






90 


dB 


Avol 


Large-Signal Voltage Gain 


V 0U T = ±12V,R L = 1k 
V OUT = +10V, R L = 500n 


±15V 
±15V 




15 

5 




V/mV 
V/mV 






V ut = ±2.5V, R^ = 1k 
V 0UT = +2.5V, R L = 500£1 
\/_, IT _ +o cy r, -iRno 

VQUJ — I^.JV, n[_ — 1 JULI 

V 0UT = ±1V, R L = 500£2 


±5V 
±5V 
±5V 
±2.5V 


I 
I 


15 
5 
1 
5 




V/mV 
V/mV 
V/mV 
V/mV 


v OUT 


uuipui owiny 


R L = 500Q, V| N = ±40mV 
R L = 500Q, V| N = ±40mV 
R L = 150Q, V| N = ±40mV 
Rl = 500Q, V| N = ±40mV 


±15V 
±15V 
±5V 


— 
• 


13.2 
12.2 
3.4 




+V 

+v 
±v 






±5V 
±2.5V 




2.8 
1.2 




±v 
±v 


'OUT 


Output Current 


V OU T = ±12.2V 
V 0UT =±2.8V 


±15V 
±5V 




24.4 
18.7 


mA 
mA 


Nr 


Short-Circuit Current 


V UT=OV, V| N = ±3V 


±15V 




25 


mA 


SR 


Slew Rate 


A v = -2, (Note 2) 


±15V 
+5V 




225 
125 


V/ns 
V/u.s 


GBW 


Gain-Bandwidth 


f = 200kHz, Rl = 2k 


±15V 
±5V 




15 
12 


MHz 
MHz 




Channel Separation 


Vout = ±10V, R L = 50C£2 


±15V 




98 


dB 


Is 


Supply Current 


Each Amplifier 


+15V 






2.9 
2.8 


mA 
mA 















CLCCTRICRL CHRRRCTCRISTICS -40°C < T A < 85°C, V CM = OV unless otherwise noted. (Note 5) 



SYMBOL 


PARAMETER 


CONDITIONS 


VsUPPLY 


MIN 


TYP 


MAX 


UNITS 


Vos 


Input Offset Voltage 




±15V 








1.3 


mV 








±5V 








1.3 


mV 








+ 2.5V 








1.5 


mV 




Input V os Drift 


(Note 4) 


±2.5V to ±15V 






5 


8 


01% 


los 


Input Offset Current 




±2.5V to ±15V 




300 


nA 


Ib 


Input Bias Current 




±2.5V to ±1 5V 






nA 


CMRR 


Common-Mode Rejection Ratio 


V CM = ±12V 


+15V 




80 






dB 






V C M = ±2.5V 


±5V 




76 






dB 






V CM = ±0.5V 


±2.5V 




66 






dB 


PSRR 


Power Supply Rejection Ratio 


V s = ±2.5Vto±15V 






90 


dB 



2-303 



LT1358/LT1359 



€L€CTRICRL CHRRRCT€RISTICS -40 C < T A < 85 C, V C m = 0V unless otherwise noted. (Note 5) 



o I IVIDUL 


PAR AMFTFR 




^SUPPLY 


MIN 


TYP MAX 


UNITS 


A 

AvOL 


Large-Signal Voltage Gain 


VOUT = ±itV, Hi = IK 


±15V 


• 


inn 
1U.U 




\//m\/ 

v/mv 






w_ MT _ -i-inv r, - snno 


+15V 




2.5 




V/mV 






V 0U T = ±2.5V, R L = 1k 


±5V 




10.0 




V/mV 






V 0U T = -2.5V, R L = 500n 


±5V 


m 


2.5 




V/mV 






V 0UT = ±2.5V, R L =150Q 


±5V 




0.6 




V/mV 






Vout = ±1V, R L = 500a 


±2.5V 


• 


2.5 




V/mV 


VOUT 


Output Swing 


R L = 1k, V| N = ±40mV 


±15V 


• 


13.0 




±V 






R L = 500a, V| N = +40mV 


±15V 


• 


12.0 




+V 






Hi = 500S2, V)N = ±40mv 


±5V 


• 


3.4 




±V 






n|_ - l JUli, v||\j - X4UIIIV 


±5V 




2.6 




XV 






R L = 500fi, V| N = ±40mV 


±2.5V 




1.2 




+V 


'out 


Output Current 


V 0U T = ±12V 


±15V 




24.0 




mA 






V UT = ±2.6V 


+5V 




17.3 




mA 


Isc 


Short-Circuit Current 


VouT = 0V,V, N = ±3V 


+15V 




24 


mA 


SR 


Slew Rate 


A v = -2, (Note 2) 


+15V 




180 




V/U.S 








±5V 




100 




V/ua 


GBW 


Gain-Bandwidth 


f = 200kHz, R L = 2k 


±15V 




14 




MHz 








±5V 




11 




MHz 




Channel Separation 


V O ut = ±10V, R L = 500Q 


±1 5V 




98 


dB 


Is 


Supply Current 


Each Amplifier 


±15V 






3.0 


mA 






Each Amplifier 


+5V 






2.9 


mA 



The • denotes specifications that apply over the full operating 
temperature range. 

Note 1: A heat sink may be required to keep the junction temperature 
below absolute maximum when the output is shorted indefinitely. 
Note 2: Slew rate is measured between +10V on the output with ±6V input 
for ±1 5V supplies and ±1 V on the output with +1 .75V input for ±5V 
supplies. 





Hots 3: Full power bandwidth is calculated from the slew rate 

measurement: FPBW = (SR)/2nVp. 

Note 4: This parameter is not 100% tested. 

Note 5: The LT1358/LT1359 are not tested and are not quality-assurance 
sampled at -40°C and at 85°C. These specifications are guaranteed by 
design, correlation, and/or inference from 0°C, 25°C, and/or 70°C tests. 



TVPICfiL P€RFORmnnC€ CHRRRCT€RISTICS 



Supply Current vs Supply Voltage 
and Temperature 

















125"C 
















25°C 
-55°C 



















5 10 15 

SUPPLY VOLTAGE (±V) 



Input Common-Mode Range vs 
Supply Voltage 



T A = 25°C 






AVos< 


mV 







































































Input Bias Current vs 

Input Common-Mode Voltage 



400 
300 

tf 200 

cr 
cc 

B 100 

<5 ° 

Q. 

-100 



5 10 15 

SUPPLY VOLTAGE (±V) 



-200 



V S = ±15V 
Ta = 25-C 










2 


f 

























































-15 -10 -5 5 10 15 
INPUT COMMON-MODE VOLTAGE (V) 



2-304 



LT1358/LT1359 



TYPicni p€RFonmnnc€ cHnonaeRisTics 



Input Bias Current vs 
Temperature 



450 
400 
• 350 
: 300 
250 
200 
150 
100 
50 












1 I 

V S = ±15V 

i I Ib + + Is" I " 













































































































25 50 75 100 125 
TEMPERATURE (°C) 



Open-Loop Gain vs Temperature 



101 

100 

_ 99 

5 98 
< 

£ 97 
o 

± 96 

LU 
Q. 

° 95 
94 



- Rl 
Vo 


=±15V 

- 1 tr 










= ±12 


/ 































































































25 50 75 100 125 
TEMPERATURE (°C) 

135&1359 G07 



Output Short-Circuit Current vs 
Temperature 





65 


< 

E 


60 






cr 


55 


(X 




o 


50 


t— 


5 




u 
cc 


45 


o 




h- 

CE 


40 


o 




GO 


35 








30 


O 






25 















V 
















































V s 


INK 










>0URC 


E > 





































-25 25 50 75 100 125 
TEMPERATURE (°C) 

135611359 G10 



Input Noise Spectral Density 



Open-Loop Gain vs 
Resistive Load 




100 1k 10k 100k 

FREQUENCY (Hz) 



Output Voltage Swing vs 
Supply Voltage 



100 1k 
LOAD RESISTANCE (£1) 



Output Voltage Swing vs 
Load Current 



T A = 25- 




Rl = 1k 








00£2 






R L = 5 














R L = 50t 


a - 














Rl = 1k 





-0.5 




-1.0 


> 


-1.5 




-2.0 


S 




CO 


-2.5 


is 

< 








> 


2.5 








2.0 






o 


1.5 




1.0 


V" 


h05 



V 
V 


S = ±5V 




^«^85 


C 






N = 


OOl 


V 


















































1 


2 


5 C 














25 


























\ 3 


i C 














-4 





























































5 10 15 

SUPPLY VOLTAGE (±V) 



Settling Time vs Output Step 
(Noninverting) 



-50-40 -30 -20 -10 10 20 30 40 50 
OUTPUT CURRENT (mA) 



Settling Time vs Output Step 
(Inverting) 




100 150 200 

SETTLING TIME (ns) 



100 150 200 
SETTLING TIME (ns) 



XTTflSflB 



2-305 



LT1358/LT1359 



tvpicrl pcRFORmnncc charactcristics 



Output Impedance vs Frequency 




Frequency Response vs 
Capacitive Load 




Gain-Bandwidth and Phase 
Margin vs Supply Voltage 



100k 1M 10M 
FREQUENCY (Hz) 



1M 10M 
FREQUENCY (Hz) 



100M 







I 












PHAS 


E MARGIN 






































^— GAIN- 


BANDWIDT 








( 









50 




48 




46 








44 








42 


- 


40 


: 

a 


38 


z 




8 


36 


m 


34 




32 





5 10 15 

SUPPLY VOLTAGE (±V) 



Gain-Bandwidth and Phase 
Margin vs Temperature 



Frequency Response vs 
Supply Voltage (A v = 1) 




25 50 75 
TEMPERATURE (-C) 



1M 10M 
FREQUENCY (Hz) 



Frequency Response vs 
Supply Voltage (A v = -1) 




1M 10M 
FREQUENCY (Hz) 



Gain and Phase vs Frequency 




100k 1M 10M 
FREQUENCY (Hz) 



Power Supply Rejection Ratio 
vs Frequency 



-PSRR^V 

I 


3 SRR 




v s = 
Ta= 


+15V 
25°C 



















































Common-Mode Rejection Ratio 
vs Frequency 



10k 100k 1M 
FREQUENCY (Hz) 



10M 100M 









Ta 


= ±15V 
= 2S°C 





















































100k 1M 
FREQUENCY (Hz) 



2-306 



LT1358/LT1359 



tvpicrl p€ftFonmnnc€ charactcristics 



Slew Rate vs Supply Voltage 



Slew Rate vs Temperature 



Slew Rate vs Input Level 



- T A = 25°C 
i Av = -1 
~~ R F i R G = 2k 

-SR= SR+ + 
2 


















SR- 

























































































5 10 
SUPPLY VOLTAGE (±V) 



600 
500 
[ 400 
300 
200 
100 












I I 
V S = ±15V 


Av 
-SR 


= -2 
SR* 


tSR" 












2 






























\ 




V 



















-50 -25 25 50 75 100 125 
TEMPERATURE (°C) 



1000 
900 
800 

S- 700 
5 600 
Sj 500 
| 400 
" 300 
200 
100 




I I I 
T A = 25°C 
V S = ±15V 
_ A v = -1 
R F =R G = 2k 

- S R= SR+ + SF 













































































































































































2 



4 6 8 10 12 14 16 18 20 
INPUT LEVEL (Vp.p) 



Total Harmonic Distortion 
vs Frequency 




2nd and 3rd Harmonic Distortion 
vs Frequency 




100k 200k 400k 1M 2M 4M 
FREQUENCY (Hz) 



Undistorted Output Swing vs 
Frequency (:15V) 




V S = ±15V 
Rl = 2k 

Av = 1,1% MAX DISTORTION 
A v = -1,2% MAX DISTORTION 

I I M I I II I II 



100k 



1M 

FREQUENCY (Hz) 



Crosstalk vs Frequency 




100k 1M 10M 100M 

FREQUENCY (Hz) 



Undistorted Output Swing vs 
Frequency (±5V) 




V S = ±5V 
Rl = 2k 

2% MAX DISTORTION 
III 



1M 

FREQUENCY (Hz) 



Capacitive Load Handling 




100p 1000p 0.01m 0.1|i 1(1 
CAPACITIVE LOAD (F) 

135B/I3S9 G30 



2-307 



LT1358/LT1359 



TVPicnt P€RFORmnnc€ cHnRncT€RisTics 



Small-Signal Transient 
(A V = 1) 



Small-Signal Transient 
(A V = -1) 




Large-Signal Transient 
(A V = 1) 





Small-Signal Transient 
(A v = -1,C L = 1000pF) 




Large-Signal Transient 
(A v = 1,C L = 10,000pF) 




nppucnTions inFORmnnon 



Layout and Passive Components 

The LT1 358/LT1 359 amplifiers are easy to use and toler- 
ant of less than ideal layouts. For maximum performance 
(for example, fast 0.01% settling) use a ground plane, 
short lead lengths, and RF-quality bypass capacitors 
(0.01u.Fto0.1u.F). For high drive current applications use 
low ESR bypass capacitors (1ufto 10u.F tantalum). 

The parallel combination of the feedback resistorand gain 
setting resistor on the inverting input combine with the 
input capacitance to form a pole which can cause peaking 
or oscillations. If feedback resistors greater than 5k are 
used, a parallel capacitor of value 

C F > R G x C| N / R F 



should be used to cancel the input pole and optimize 
dynamic performance. For unity-gain applications where 
a large feedback resistor is used, C F should be greater than 

or equal to Cin. 

Capacitive Loading 

The LT1358/LT1359 are stable with any capacitive load. 
As the capacitive load increases, both the bandwidth and 
phase margin decrease so there will be peaking in the 
frequency domain and in the transient response. Coaxial 
cable can be driven directly, but for best pulse fidelity a 
resistor of value equal to the characteristic impedance of 
the cable (i.e., 75Q.) should be placed in series with the 
output. The other end of the cable should be terminated 
with the same value resistor to ground. 



2-308 



LT1358/LT1359 



nppucnTions inFORmnnon 

Input Considerations 

Each of the LT1 358/LT1 359 amplifier inputs is the base of 
an NPN and PNP transistor whose base currents are of 
opposite polarity and provide first-order bias current 
cancellation. Because of variation in the matching of NPN 
and PNP beta, the polarity of the input current can be 
positive or negative. The offset current does not depend on 
beta matching and is well controlled. The use of balanced 
source resistance at each input is recommended for 
applications where DC accuracy must be maximized. The 
inputs can withstand differential input voltages of up to 
10V without damage and need no clamping or source 
resistance for protection. 

Circuit Operation 

The LT1358/LT1359 circuit topology is a true voltage 
feedback amplifier that has the slewing behavior of a 
currentfeed back amplifier. The operation of the circuit can 
be understood by referring to the simplified schematic. 
The inputs are buffered by complementary NPN and PNP 
emitter followers which drive a 500i2 resistor. The input 
voltage appears across the resistor generating currents 
which are mirrored into the high impedance node. Comple- 
mentary followers form an output stage which buffers the 
gain node from the load. The bandwidth is set by the input 
resistor and the capacitance on the high impedance node. 
The slew rate is determined by the current available to 
charge the gain node capacitance. This current is the 
differential input voltage divided by R1 , so the slew rate is 
proportional to the input. Highest slew rates are therefore 
seen in the lowest gain configurations. For example, a 1 0V 
output step in a gain of 10 has only a 1V input step, 
whereas the same output step in unity gain has a 1 times 
greater input step. The curve of Slew Rate vs Input Level 
illustrates this relationship. The LT1358/LT1 359 are tested 
for slew rate in a gain of -2 so higher slew rates can be 
expected in gains of 1 and -1 , and lower slew rates in 
higher gain configurations. 



The RC network across the output stage is bootstrapped 
when the amplifier is driving a light or moderate load and 
has no effect under normal operation. When driving a 
capacitive load (or a low value resistive load) the network 
is incompletely bootstrapped and adds to the compensa- 
tion at the high impedance node. The added capacitance 
slows down the amplifier which improves the phase 
margin by moving the unity-gain frequency away from the 
pole formed by the output impedance and the capacitive 
load. The zero created by the RC combination adds phase 
to ensure that even for very large load capacitances, the 
total phase lag can never exceed 1 80 degrees (zero phase 
margin) and the amplifier remains stable. 

Power Dissipation 

The LT1358/LT1 359 combine high speed and large output 
drive in small packages. Because of the wide supply 
voltage range, it is possible to exceed the maximum 
junction temperature under certain conditions. Maximum 
junction temperature (Tj) is calculated from the ambient 
temperature (T A ) and power dissipation (Pq) as follows: 

LT1 358CN8: Tj = T A + (P D x 1 30°C/W) 

LT1 358CS8: Tj = T A + (P D x 1 90°C/W) 

LT1359CN: Tj = T A + (P D x 110°C/W) 

LT1 359CS: Tj = T A + (P D x 1 50°C/W) 

Worst case power dissipation occurs at the maximum 
supply current and when the output voltage is at 1/2 of 
either supply voltage (or the maximum swing if less than 
1/2 supply voltage). For each amplifier P DMAX is: 

Pdmax = (V + -V-)(I smax ) + (V + /2) 2 /R l 

Example: LT1358 in S8 at 70°C, V s = ±15V, R L = 500fi 

Pdmax = (30V)(2.9mA) + (7.5V) 2 /500i2 = 200mW 

Tjmax = 70°C + (2 x 200mW)(190°C/W) = 146°C 



UchnSlog? 



2-309 



LT1358/LT1359 



TVPICRL flPPUCflTIOnS 




, R4 . 1 R2 R3 

TRIM R5 FOR GAIN 
TRIM R1 FOR COMMON-MODE REJECTION 
BW = 250kHz 



Vout 



200kHz, 4th Order Butterworth Filter 




simPLiFicD scHcmnTic 




13S8/I3S9SS0I 



2-310 



^^^J TECHNOLOGY 



urn 

TECHNOLOGY 



LT136Q 

50MHz, 800V/lis Op Amp 



F€RTUR€S 



50MHz Gain-Bandwidth 

8OOV/11S Slew Rate 

5mA Maximum Supply Current 

9nV/VRz Input Noise Voltage 
Unity Gain Stable 

C-Load™ Op Amp Drives All Capacitive Loads 
1mV Maximum Input Offset Voltage 
1(iA Maximum Input Bias Current 
250nA Maximum Input Offset Current 
±13V Minimum Output Swing into 500n 
±3.2V Minimum Output Swing into 150O 
4.5V/mV Minimum DC Gain, R L =1k 
60ns Settling Time to 0.1%, 10V Step 
0.2% Differential Gain, A v =2, R L =150« 
0.3° Differential Phase, A v =2, R L =150Q 
Specified at +2.5V,±5V, and±15V 



applicators 

■ Wideband Amplifiers 

■ Buffers 

■ Active Filters 

■ Video and RF Amplification 

■ Cable Drivers 

■ Data Acquisition Systems 



D€SCRIPTIOn 

The LT1360 is a high speed, very high slew rate opera- 
tional amplifier with excellent DC performance. The LT1 360 
features reduced supply current, lower input offset volt- 
age, lower input bias current and higher DC gain than 
devices with comparable bandwidth. The circuit topology 
is a voltage feedback amplifier with the slewing character- 
istics of a current feedback amplifier. The amplifier is a 
single gain stage with outstanding settling characteristics 
which makes the circuit an ideal choice fordataacquisition 
systems. The output drives a 500C2 load to ±1 3V with ±1 5V 
supplies and a 150£2 load to ±3.2V on ±5V supplies. The 
amplifier is also capable of driving any capacitive load 
which makes it useful in bufferor cable driverapplications. 

The LT1360 is a member of a family of fast, high 
performance amplifiers using this unique topology and 
employing Linear Technology Corporation's advanced 
bipolar complementary processing. For dual and quad 
amplifier versions of the LT1360 see the LT1361/1362 
data sheet. For 70MHz amplifiers with 6mA of supply 
current per amplifier see the LT1363 and LT1 364/1 365 
data sheets. For lower supply current amplifiers with 
bandwidths of 12MHz and 25MHz see the LT1354 
through LT1 359 data sheets. Singles, duals, and quads of 
each amplifier are available. 

C-Load is a trademark ol Linear Technology Corporation 



TYPICAL APPLICATOR 

Two Op Amp Instrumentation Amplifier 



A v = -1 Large-Signal Response 




VfJUT 









A3 


+ (R2 + R 3 )' 


[s] 




+ M 


R5 



TRIM R5 FOR GAIN 
TRIM R1 FOR COMMON-MODE REJECTION 
BW = 500kHz 




2-311 



LT1360 



ni3soiuT€ mnximum rrtmgs 

Total Supply Voltage (V + to V") 36V 

Differential Input Voltage ±10V 

Input Voltage ±V S 

Output Short Circuit Duration (Note 1) Indefinite 

Operating Temperature Range -40°C to 85°C 



Specified Temperature Range -40°C to 85°C 

Maximum Junction Temperature (See Below) 

Plastic Package 150°C 

Storage Temperature Range -65°C to 150°C 

Lead Temperature (Soldering, 10 sec) 300°C 



PRCKRG€/ORD€R IflFORfTlflTIOn 



NULL [J 
-IN \Y 
+IN [T 

V - [T 



TOP VIEW 
— C7 — 



T] NULL 

H VOUT 
T\ NC 



N8 PACKAGE, 8-LEAD PLASTIC DIP 
TjMAX = 150°C,ejA=l30"C/W 



ORDER PART 
NUMBER 



LT1360CN8 




S8 PACKAGE, 8-LEAD PLASTIC SOIC 
TjMAX = 150°C,ej A = 190°C/W 



ORDER PART 
NUMBER 



LT1360CS8 



S8 PART MARKING 



1360 



Consult factory for Industrial and Military grade parts. 



€l€CTRICfll CHRRRCT6RISTICS T A = 25°C, V C m = 0V unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS 


VSUPPLY 


MIN TYP MAX 


UNITS 


Vos 


Input Offset Voltage 


(Note 2) 


±15V 

±5V 

±2.5V 


0.3 1.0 
0.3 1.0 
0.4 1.2 


mV 
mV 
mV 


los 


Input Offset Current 




±2.5V to±15V 


80 250 


nA 


IB 


Input Bias Current 




±2.5Vto±15V 


0.3 1.0 


HA 


e n 


Input Noise Voltage 


f = 10kHz 


±2.5V to ±1 5V 


9 


nV/VHz 


in 


Input Noise Current 


f = 10kHz 


±2.5Vto±15V 


0.9 


pA/VHz 


R|N 


Input Resistance 


V CM = ±12V 


±15V 


20 50 


Mn 




Input Resistance 


Differential 


±15V 


5 


M£2 


Cm 


Input Capacitance 




±15V 


3 


PF 




Input Voltage Range + 




±15V 

±5V 

±2.5V 


12.0 13.4 
2.5 3.4 
0.5 1.1 


V 
V 
V 


Input Voltage Range - 




±15V 

+5V 

±2.5V 


-13.2 -12.0 
-3.2 -2.5 
-0.9 -0.5 


V 
V 
V 


CMRR 


Common-Mode Rejection Ratio 


V CM = ±12V 
V CM = ±2.5V 
V CM = ±0.5V 


+15V 

±5V 

±2.5V 


86 92 
79 84 
68 74 


dB 
dB 
dB 


PSRR 


Power Supply Rejection Ratio 


V s = ±2.5V to +15V 




93 105 


dB 


AVOL 


Large-Signal Voltage Gain 


V 0UT = ±12V, R L = 1k 
V OU T = ±10V, R L = 500fi 
Vout = +2.5V, R L = 500fl 
V 0UT = ±2.5V, R L = 150£2 
V 0U t = ±1V, R L = 500Q 


±15V 

±15V 

±5V 

±5V 

12.5V 


4.5 9.0 
3.0 6.5 
3.0 6.4 
1.5 4.2 
2.5 5.2 


V/mV 
V/mV 
V/mV 
V/mV 
V/mV 


VOUT 


Output Swing 


Rl = 1k. V| N = +40mV 
R L = 500S2. V| N = i40mV 
R L = 500U, V| N = ±40mV 
R L = 150n. V| N = +40mV 
R L = 500£2, V| N = +40mV 


±15V 

+15V 

±5V 

+5V 

12.5V 


13.5 13.9 
13.0 13.6 
3.5 4.0 

3.2 3.8 

1.3 1.7 


±V 
±V 
±V 
+V 
±V 



2-312 



LT1360 



€l€CTRICfll CHRRRCTCRISTICS Ta = 25 C. Vcm = OV unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS 


VSUPPLV 


MIN TYP MAX 


UNITS 


l0UT 


Output Current 


V UT = +13V 
V 0U T = ±3.2V 


±15V 
+5V 


26 34 
21 29 


mA 
mA 


isc 


Short-Circuit Current 


V O UT=0V, V|M = ±3V 


±15V 


40 54 


mA 


SR 


Slew Rate 


A v = -2, (Note 3) 


±15V 
±5V 


600 800 
250 350 


V/us 
V/ns 




Full Power Bandwidth 


10V Peak, (Note 4) 
3V Peak, (Note 4) 


±15V 
±5V 


12.7 
18.6 


MHz 
MHz 


GBW 


Hain-RanHwirith 
udll 1 DdMU WIUU i 


f = 1MHz 


+15V 

+5V 

±2.5V 


50 

37 
32 


MHz 
MHz 
MHz 


Uf 


Rise Time, Fall Time 


Ay = 1, 10%-90%, 0.1V 


±15V 

XJ V 


3.1 


ns 
ns 




Overshoot 


A v = 1, 0.1V 


±15V 
+5V 


35 
27 


% 
% 




Propagation Delay 


50% V, N to 50%V OUT , 0.1V 


±15V 
±5V 


5.2 
6.4 


ns 
ns 


t S 


Settling Time 


10V Step, 0.1%, A v = -1 
1 0V Step, 0.01 %, A v = -1 

DV Olcp, U. I /o, H\J = — I 


J.15V 
±15V 

±OV 


60 
90 

uD 


ns 
ns 
ns 




Differential Gain 


f = 3.58MHz, A v = 2, R L = 150Q 
f = 3.58MHz, Ay = 2, R|_ = 1k 


±15V 
±5V 
+15V 
+5V 


0.20 
0.20 
0.04 
0.02 


% 
% 
% 
% 




Differential Phase 


f = 3.58MHz, A v = 2, R L = 150£2 
f = 3.58MHz, A v = 2, R L = 1k 


+15V 
±5V 
+15V 
±5V 


0.40 
0.30 
0.07 
0.26 


Deg 
Deg 
Deg 
Deg 


Ro 


Output Resistance 


A v = 1,f = 1MHz 


±15V 


1.4 


£2 


Is 


Supply Current 




±15V 
±5V 


4.0 5.0 
3.8 4.8 


mA 
mA 


€l€CTRICRl CHRRRCTCRISTICS 0°C < T A < 70°C, V CM = OV unless otherwise noted. 


SYMBOL 


PARAMETER 


CONDITIONS 


^SUPPLY 


MIN TYP MAX 


UNITS 


Vos 


Input Offset Voltage 


(Note 2) 


±15V 

±5V 

+2.5V 




1.5 
1.5 
1.7 


mV 
mV 
mV 




Input Vos Drift 


(Note 5) 


+2.5V to ±15V 




9 12 


u«°C 


los 


Input Offset Current 




±2.5Vto±15V 




350 


nA 


Ib 


Input Bias Current 




±2.5V tO+15V 




1.5 


HA 


CMRR 


Common-Mode Rejection Ratio 


V CM = ±12V 
Vcm = ±2-5V 
V CM = ±0.5V 


+15V 

+5V 

±2.5V 




84 

77 
66 


dB 
dB 
dB 


PSRR 


Power Supply Rejection Ratio 


V S = +2.5V to±15V 






91 


dB 




Large-Signal Voltage Gain 


V 0U T = ±12V, R L = 1k 
V OUT = ±10V, R L = 500£1 
Vout = ±2.5V, R L = 500S2 
V 0U T = i2-5V, R L = 150i2 
V 0U T = ±1V, R| =500Q 


+15V 

+15V 

±5V 

±5V 

±2.5V 




3.6 
2.4 
2.4 
1.0 
2.0 


V/mV 
V/mV 
V/mV 
V/mV 
V/mV 



-^^J - technSuo!^ 



2-313 



LT1360 



€l€CTRICRl CHRRRCT€RIST1CS o c i fl < 70 C, Vcm = OV unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS 


VsUPPLY 


MIN TYP MAX 


UNITS 


VOUT 


Output Swing 


R L = 1k, V| N = ±40mV 
R L = 500£2, V IN = ±40mV 
R L = 500Q, V| N = ±40mV 
R L = 150Q, V M = ±40mV 
R L = 500fl, V| N = +40mV 


±15V 

±15V 

±5V 

±5V 

±2.5V 




13.4 
1 2.8 
3.4 
3.1 
1.2 


+V 

±v 
+v 
±v 
+v 


'OUT 


Output Current 


V OUT =±12.8V 
V 0U T = ±3.1V 


+15V 

±5V 




25 
20 


mA 
mA 


Isc 


Stiort-Circuit Current 


V UT=0V, V| N = +3V 


+1SV, 




32 


mA 


SR 


Slew Rate 


A v = -2, (Note 3) 


±15V 
+5V 




475 
185 


V/fts 

V/U.S 


Is 


Supply Current 




±15V 
±5V 




5.8 
5.6 


mA 
mA 


€L€CTRICRL CHRRRCT6RISTICS -40°C < T fl < 85 C. V CM = OV unless otherwise noted. (Note 6) 


SYMBOL 


PARAMETER 


CONDITIONS 


VsUPPLY 


MIN TYP MAX 


UNITS 


Vos 


Input Oftset Voltage 


(Note 2) 


+15V 

±5V 

+2.5V 




2.0 
2.0 
2.2 


mV 
mV 
mV 




Input Vos Drit t 


(Note 5) 


±2.5V to ±1 5V 




9 12 


nwc 


i.ps 


Input Offset Current 




+2.5VIO+15V 




400 


nA 


le 


Input Bias Current 




±2.5Vto±15V 




1.8 


HA 


CMRR 


Common-Mode Rejection Ratio 


V CM = ±12V 
V CM = ±2.5V 
V CM = ±o.5V 


±15V 

±5V 

+2.5V 




84 

77 
66 


dB 
dB 
dB 


PSRR 


Power Supply Rejection Ratio 


V S = ±2.5V to ±15V 






90 


dB 


AvOL 


Large-Signal Voltage Gain 


V 0U T = ±12V, Rl = 1k 
V O ut = ±10V, R L = 500£J 
V 0U T = +2.5V, R L = 500£2 
V 0UT = ±2.5V, R L = 150Q 
V uT = +1V, R L = 500Q 


±15V 

±15V 

±5V 

±5V 

±2.5V 




2.5 
1.5 
1.5 
0.6 
1.3 


V/mV 
V/mV 
V/mV 
V/mV 
V/mV 


VOUT 


Output Swing 


R L =1kfl, V| N = ±40mV 
Rl = 500S2, V| N = ±40mV 
Rl = 500f2, V| N = ±40mV 
R L = 150£2,V| N = ±40mV 
R L = 500£2, V| N = riOmV 


±15V 

±15V 

±5V 

+5V 

±2.5V 




13.4 
12.0 
3.4 
3.0 
1.2 


±V 

±V 
±V 

±v 
±v 


l0UT 


Output Current 


V 0UT = 112.0V 
V OU T = ±3.0V 


+15V 
±5V 




24 
20 


mA 
mA 


Isc 


Stiort-Circuit Current 


V OU T = OV, V| N = ±3V 


±15V 




30 


mA 


SR 


Slew Rate 


A v = -2, (Note 3) 


+15V 

±5V 




450 
175 


V/jjS 
V/ps 


Is 


Supply Current 




±15V 
+5V 




6.0 
5.8 


mA 
mA 



The • denotes specifications that apply over the full operating 
temperature range. 

Note 1: A heat sink may be required to keep the junction temperature 
below absolute maximum when the output is shorted indefinitely. 
Note 2: Input offset voltage is pulse tested and is exclusive of warm-up drift. 
Note 3: Slew rate is measured between +1 0V on the output with +6V input 
for ±1 5V supplies and ±2V on the output with ±1 .75V input for +5V supplies. 



Note 4: Full power bandwidth is calculated from the slew rate 

measurement: FPBW = SR/2tiV p . 

Note 5: This parameter is not 100% tested. 

Note 6: The LT1360 is not tested and is not quality-assurance sampled at 

-40°C and at 85°C. These specifications are guaranteed by design, 

correlation, and/or inference from 0°C, 25°C, and/or 70°C tests. 



2-314 



ik^f TECHM 



LT1360 



TVPicfiL p€Rfonmnnc€ cHnRnacmsncs 



Supply Current vs Supply Voltage 
and Temperature 



5 10 15 

SUPPLY VOLTAGE (+V) 



Input Common-Mode Range vs 
Supply Voltage 





V* 




-0 5 




-1.0 








-1.5 


az 


-2.0 


Q 




O 




S 




z 


2.0 


o 




s 


1.5 


O 




O 


1.0 




05 




V" 



T fl = 25"C 






AV 0S < 


mV 







































































5 10 15 

SUPPLY VOLTAGE (±V) 



Input Bias Current vs 

Input Common-Mode Voltage 



V S = ±15V 
T A = 25°C 










2 


| 

























































-15 -10 -5 5 10 15 
INPUT COMMON-MODE VOLTAGE (V) 



Input Bias Current vs 
Temperature 









V S = ±15V 










lB= l 2 











































































25 50 75 100 125 
TEMPERATURE (»C) 



Input Noise Spectral Density 



Open-Loop Gain vs 
Resistive Load 




100 1k 10k 
FREQUENCY (Hz) 



100 1k 
LOAD RESISTANCE (S2) 



Open-Loop Gain vs Temperature 



Rl = 1 k 
V = ±12 
V s = ±15\ 












/ 

1 













































































































25 50 75 100 125 
TEMPERATURE (°C) 



Output Voltage Swing vs 
Supply \ 



Ta = 25° 


C 


R L = 1k — i 












R L = 5 


oonX 
















OOSJ^ — 






R L = 5 








! L =1k 



5 10 15 

SUPPLY VOLTAGE (±V) 



Output Voltage Swing vs 
Load Current 




-30 -20 -10 10 20 30 40 50 
OUTPUT CURRENT (mA) 



2-315 



LT1360 



TVPICfll P€RFORmnnC€ CHRRRCT€RISTKS 



Output Short-Circuit Current vs 
Temperature 















V 






































OURC 










; 


INIO 





































Output Impedance vs 
Frequency 



25 50 75 100 125 
TEMPERATURE pC) 



Gain and Phase vs Frequency 




1M 

FREQUENCY (Hz) 



10M 100M 



100k 1M 10M 
FREQUENCY (Hz) 



Settling Time vs Output Step 
(Noninverting) 



Settling Time vs Output Step 
(Inverting) 




20 40 60 80 
SETTLING TIME (ns) 



40 60 SO 
SETTLING TIME (ns) 



Gain-Bandwidth and Phase 
Margin vs Supply Voltage 



80 
70 

i: 
2 

j= 60 







l 












^PHAS 


E MARGIN 








































BANDWIDT 






T^GAIN- 


l) 











5 10 15 

SUPPLY VOLTAGE (±V) 



s 



50 

48 

16 

44 

42 

40 § 

38 J 
o 

36 33 

34 

32 



Gain-Bandwidth and Phase 
Margin vs Temperature 




25 50 75 
TEMPERATURE PC) 



Frequency Response vs 
Supply Voltage (A v = 1) 



Frequency Response vs 
Supply Voltage (A v = -1) 



5'? 






5 


45 






4 


40 






3 


35 










> 








cn 






30 




m 


1 


25 


3* 
J) 
CD 







20 


Z 


< 

CD 


-1 




O 






IS 


o 




-2 


10 






-3 


5 






-4 









-5 




100M 



FREQUENCY (Hz) 



FREQUENCY (Hz) 



2-316 



LT1360 



TVPICDL PCRFORITinnCC CHRRRCT6RISTICS 



Frequency Response vs 
Capacitive Load 




10M 

FREQUENCY (Hz) 



Power Supply Rejection Ratio 
vs Frequency 





+PSRR 




I 

V S = ±15V 




-PRRP VS 


'A = 





















































1k 10k 100k 1M 10M 100M 
FREQUENCY (Hz) 

1380 GZO 



Common-Mode Rejection Ratio 
vs Frequency 









Ta 


= ±15V 
= 25°C 





















































1k 10k 100k 1M 10M 100M 
FREQUENCY (Hz) 

13E0G21 



Slew Rate vs Temperature 



Slew Rate vs Input Level 



2000 
1800 
1600 
-,1400 
51200 
§1000 
S 800 
" 600 
400 
200 




Ta = 25°C 
A v = -1 

_ Rr = Rr. - Ml 



















- SFU 


SR*tSR" 








2 



















































































1000 




900 




800 


> 


700 


< 


600 


CC 




s 


500 


CO 






400 




300 




200 









1 


1 

v = -2 

n SR* + SR' 

9 








i 




















v s 


= ±15 


























— \ 




V — 































5 10 
SUPPLY VOLTAGE (±V) 



-50 -25 25 50 75 100 125 
TEMPERATURE (°C) 



2000 
1800 
1600 
— 1400 
g. 1200 
1000 

cc 

S 800 
« 600 
400 
200 





I I I 

T A = 25°C 

V S = ±15V 
_ A v = -1 

Rp = Rq = 1k 
- SR= SR* + SF 

_ 


r 









































































































































































4 6 8 10 12 14 16 18 20 
INPUT LEVEL (Vp.p) 



Total Harmonic Distortion 
vs Frequency 



0.0001 




100 1k 10k 

FREQUENCY (Hz) 



Undistorted Output Swing vs 
Frequency (+15V) 



V S = +15V 
Rl = 1k 

A v = 1,1% MAX DISTORTION 
A v =-1,2% MAX DISTORTION 

I I I I l l 



1M 

FREQUENCY (Hz) 




Undistorted Output Swing vs 
Frequency (±5V) 



Av = 



A v =1 



V s = +5V 
R L = 1k 

2% MAX DISTORTION 



1M 

FREQUENCY (Hz) 



j^^rf TECHNOLOGY 



2-317 



LT1360 

TYPicm PCRFORmnncc charactcristics 



2nd and 3rd Harmonic Distortion Differential Gain and Phase 

vs Frequency vs Supply Voltage Capacitive Load Handling 





Large-Signal Transient Large-Signal Transient Large-Signal Transient 

(Ay = 1) (A v = -1) (A v = 1,C L = 10,O0OpF) 




2-318 



LT1360 



RppucflTions inpofimfiTion 

The LT1 360 may be inserted directly into AD81 7, AD847, 
EL2020, EL2044, and LM6361 applications improving 
both DC and AC performance, provided that the nulling 
circuitry is removed. The suggested nulling circuit forthe 
LT1360 is shown below. 

Offset Nulling 




1MOAIO! 

Layout and Passive Components 

The LT1 360 amplifier is easy to apply and tolerant of less 
than ideal layouts. For maximum performance (for ex- 
ample fast settling time) use a ground plane, short lead 
lengths, and RF-quality bypass capacitors (0.01 nF to 
0.1 u.F). For high drive current applications use low ESR 
bypass capacitors (1uT to 1 0;xF tantalum). Sockets 
should be avoided when maximum frequency perfor- 
mance is required, although low profile sockets can 
provide reasonable performance up to 50MHz. For 
more details see Design Note 50. 

The parallel combination of the feedback resistor and gain 
setting resistor on the inverting input can combine with 
the input capacitance to form a pole which can cause 
peaking or oscillations. For feedback resistors greater 
than 5kn, a parallel capacitor of value 

C F > R G x C|n/R f 

should be used to cancel the input pole and optimize 
dynamic performance. For unity-gain applications where 
a large feedback resistor is used, Cf should be greater 
than or equal to Cin- 



Capacitive Loading 

The LT1360 is stable with any capacitive load. This is 
accomplished by sensing the load induced output pole 
and adding compensation at the amplifier gain node. As 
the capacitive load increases, both the bandwidth and 
phase margin decrease so there will be peaking in the 
frequency domain and in the transient response as shown 
in the typical performance curves.The photo of the small- 
signal response with 500pF load shows 60% peaking. The 
large-signal response with a 10,000pF load shows the 
output slew rate being limited to 5V/U.S by the short-circuit 
current. Coaxial cable can be driven directly, but for best 
pulse fidelity a resistor of value equal to the characteristic 
impedance of the cable (i.e., 75Q) should be placed in 
series with the output. The other end of the cable should 
be terminated with the same value resistor to ground. 

Cable Driver Frequency Response 




1 10 

FREQUENCY (MH2) 



Input Considerations 

Each of the LT1 360 inputs is the base of an NPN and a 
PNP transistor whose base currents are of opposite polar- 
ity and provide first-order bias current cancellation. Be- 
cause of variation in the matching of NPN and PNP beta, 
the polarity of the input bias current can be positive or 
negative. The offset current does not depend on beta 
matching and is well controlled. The use of balanced 
source resistance at each input is recommended for 
applications where DC accuracy must be maximized. The 
inputs can withstand differential input voltages of up to 
10V without damage and need no clamping or source 
resistance for protection. 



2-319 



LT1360 



nppucnnons inFonmnnon 

Power Dissipation 

The LT1360 combines high speed and large output drive 
in a small package. Because of the wide supply voltage 
range, it is possible to exceed the maximum junction 
temperature under certain conditions. Maximum junction 
temperature (Tj) is calculated from the ambient tempera- 
ture (T A ) and power dissipation (P D ) as follows: 

LT1360CN8: Tj = T A + (P D x 130°C/W) 
LT1360CS8: Tj = T A + (P D x 190°C/W) 

Worst case power dissipation occurs at the maximum 
supply current and when the output voltage is at 1/2 of 
either supply voltage (or the maximum swing if less than 
1/2 supply voltage). Therefore P DM ax is: 

Pdmax = (V + -V-)(I S max) + (VV2)2/R l 

Example: LT1 360CS8 at 70°C, V s = +1 5V, R L = 250Q 

Pdmax = (30V)(5.8mA) + (7.5V) 2 /250fl = 399mW 

Tjmax = 70°C + (399mW)(190°C/W) = 146°C 

Circuit Operation 

The LT1360 circuit topology is a true voltage feedback 
amplifier that has the slewing behavior of a current feed- 
back amplifier. The operation of the circuit can be under- 
stood by referring to the simplified schematic. The inputs 
are buffered by complementary NPN and PNP emitter 
followers which drive a 500n resistor. The input voltage 
appears across the resistor generating currents which are 
mirrored into the high impedance node. Complementary 
followers form an output stage which buffers the gain 
node from the load. The bandwidth is set by the input 
resistor and the capacitance on the high impedance node. 
The slew rate is determined by the current available to 
charge the gain node capacitance. This current is the 
differential input voltage divided by R1 , so the slew rate is 
proportional to the input. Highest slew rates are therefore 



seen in the lowest gain configurations. For example, a 1 0V 
output step in a gain of 10 has only a 1V input step, 
whereas the same output step in unity gain has a 1 times 
greater input step. The curve of Slew Rate vs Input Level 
illustrates this relationship. The LT1 360 is tested for slew 
rate in a gain of -2 so higher slew rates can be expected 
in gains of 1 and -1 , and lower slew rates in higher gain 
configurations. 

The RC network across the output stage is bootstrapped 
when the amplifier is driving a light or moderate load and 
has no effect under normal operation. When driving a 
capacitive load (or a low value resistive load) the network 
is incompletely bootstrapped and adds to the compensa- 
tion at the high impedance node. The added capacitance 
slows down the amplifier which improves the phase 
margin by moving the unity gain frequency away from the 
pole formed by the output impedance and the capacitive 
load. The zero created by the RC combination adds phase 
to ensure that even for very large load capacitances, the 
total phase lag can never exceed 1 80 degrees (zero phase 
margin) and the amplifier remains stable. 

Comparison to Current Feedback Amplifiers 

The LT1360 enjoys the high slew rates of Current Feed- 
back Amplifiers (CFAs) while maintaining the characteris- 
tics of a true voltage feedback amplifier. The primary 
differences are that the LT1360 has two high impedance 
inputs and its closed loop bandwidth decreases as the gain 
increases. CFAs have a low impedance inverting input and 
maintain relatively constant bandwidth with increasing 
gain. The LT1360 can be used in all traditional op amp 
configurations including integrators and applications such 
as photodiode amplifiers and l-to-V converters where 
there may be significant capacitance on the inverting 
input. The frequency compensation is internal and not 
dependent on the value of the feedback resistor. For CFAs, 
the feedback resistance is fixed for a given bandwidth and 
capacitance on the inverting input can cause peaking or 
oscillations. The slew rate of the LT1360 in noninverting 
gain configurations is also superior in most cases. 



2-320 



TYPICAL flPPUCATIOnS 




Photodiode Preamp with AC Coupling Loop 




VOUT 



1MHz, 4th Order Butterworth Filter 




VOUT 



simpiiFicD scHcmnnc 




Qout 



XTUH91 



2-321 




LlflCAE. 



TECHNOLOGY 



F€fiTUR€S 

■ 50MHz Gain-Bandwidth 

■ 800V/|iS Slew Rate 

■ 5mA Maximum Supply Current per Amplifier 

■ Unity-Gain Stable 

■ C-Load™ Op Amp Drives All Capacitive Loads 

■ 9nV/VRz Input Noise Voltage 

■ 1mV Maximum Input Offset Voltage 

■ 1|iA Maximum Input Bias Current 

■ 250nA Maximum Input Offset Current 

■ ±13V Minimum Output Swing into 500n 

■ ±3.2V Minimum Output Swing into 150n 

■ 4.5V/mV Minimum DC Gain, R L =1k 

■ 60ns Settling Time to 0.1%, 10V Step 

■ 0.2% Differential Gain, A v =2, R L =150Q 

■ 0.3° Differential Phase, A v =2, R L =150i2 

■ Specified at ±2.5V, ±5V, and ±1 5V 



nppucOTions 

■ Wideband Amplifiers 

■ Buffers 

■ Active Filters 

■ Video and RF Amplification 

■ Cable Drivers 

■ Data Acquisition Systems 



LT1361/LT1362 



Dual and Quad 
50MHz, 800V/(is Op Amps 

DCSCRIPTIOn 

The LT1361/LT1362 are dual and quad low power high 
speed operational amplifiers with outstanding AC and DC 
performance. The amplifiers feature much lower supply 
current and higher slew rate than devices with comparable 
bandwidth. The circuit topology is a voltage feedback 
amplifier with matched high impedance inputs and the 
slewing performance of a current feedback amplifier. The 
high slew rate and single stage design provide excellent 
settling characteristics which make the circuit an ideal 
choice for data acquisition systems. Each output drives a 
500Q load to +1 3V with ±1 5V supplies and a 1 50i2 load to 
+3.2V on ±5V supplies. The amplifiers are stable with any 
capacitive load making them useful in buffer or cable 
driving applications. 

The LT1 361/LT1 362 are members of a family of fast, high 
performance amplifiers using this unique topology and 
employing Linear Technology Corporation's advanced 
bipolar complementary processing. For a single amplifier 
version of the LT1 361 /LT1 362 see the LT1 360 data sheet. 
For higher bandwidth devices with higher supply currents 
see the LT1363 through LT1365 data sheets. For lower 
supply current amplifiers see the LT1354 to LT1359 data 
sheets. Singles, duals, and quads of each amplifier are 
available. 

C-Load is a trademark of Linear Technology Corporation 



TYPICAL APPUCATIOn 

Cable Driver Frequency Response 



S _4 




A v = -1 Large-Signal Response 



1 10 

FREQUENCY (MHz) 




2-322 



LT1361/LT1362 



nftsoiuTc mnximum rrtirgs 

Total Supply Voltage (V + toV) 36V 

Differential Input Voltage ±10V 

Input Voltage ±Vs 

Output Short-Circuit Duration (Note 1) Indefinite 

Operating Temperature Range -40°C to 85°C 



Specified Temperature Range -40°C to 85°C 

Maximum Junction Temperature (See Below) 

Plastic Package 150°C 

Storage Temperature Range -65°C to 150°C 

Lead Temperature (Soldering, 10 sec) 300°C 



PRCKRG€/ORD€R inFORmflTIOfl 



OUT A LT 
-IN A [T 
+INA [T 

[T 



TOP VIEW 
— *3> — 




T] v» 

T\ OUTB 
6] -IN B 
J] +INB 



N8 PACKAGE 
8-LEAD PLASTIC DIP 
Tjmm = 150°C.8ja = 130°C/W 



ORDER PART 
NUMBER 



LT1361CN8 




S8 PACKAGE 
8-LEAD PLASTIC SOIC 
TjMAX = 150"C,ej» = 190°C/W 



ORDER PART 
NUMBER 



LT1361CS8 



S8 PART MARKING 



1361 



TOP VIEW 




N PACKAGE 
14-LEAD PLASTIC DIP 



T JMS x=150'-C.e JS = 110°C/W 



ORDER PART 
NUMBER 



LT1362CN 



OUT A 
-IN A 
tINA 
V* 
+IN 8 
-IN B 
OUT B 
NC 



LX 
LI 
LI 

n 
n 

%1 



!16] OUTD 
16] -IN D 
14] +IND 
13] V" 
12] +INC 
TJJ -IN C 
10] OUTC 
1] NC 



ORDER PART 
NUMBER 



LT1362CS 



S PACKAGE 
16-LEAD PLASTIC SOIC 
TjMAX = 150°C,9j, = 150-C/W 



Consult factory for Industrial and Military grade parts 



€l€CTRICni CHRRRCT€RISTICS Ta = 25 C. V C m = OV unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS 


VsUPPLY 


MIN TYP 


MAX 


UNITS 


Vos 


Input Offset Voltage 


(Note 2) 


±15V 


0.3 


1.0 


mV 








±5V 


0.3 


1.0 


mV 








±2.5V 


0.4 


1.2 


mV 


los 


Input Offset Current 




±2.5V to +15V 


80 


250 


nA 


k 


Input Bias Current 




±2.5V to ±15V 


0.3 


1.0 


uA 


e„ 


Input Noise Voltage 


f = 10kHz 


±2.5V to ±1 5V 


9 


nV/Vfiz 


in 


Input Noise Current 


f = 10kHz 


±2.5V to +15V 


0.9 


pANHz" 


Rin 


Input Resistance 


V CM = ±12V 


±15V 


20 50 


M£2 




Input Resistance 


Differential 


±15V 


5 


Mil 


C|N 


Input Capacitance 




±15V 


3 


PF 



2-323 



LT1361/LT1362 



€l€CTRICfll CHflRACT€RISTICS T A = 25 C, V CM = OV unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS 


"supply 


MIN TYP MAX 


UNITS 




Input Voltage Range * 




±15V 

±5V 

±2.5V 


12.0 13.4 
2.5 3.4 
0.5 1.1 


V 
V 
V 


Innut Vnltanp Rannp ~ 




+15V 

±5V 

±2.5V 


-13.2 -12.0 
-3.2 -2.5 
-0.9 -0.5 


V 
V 
V 


CMRR 


Common-Mode Rejection Ratio 


V CM = ±12V 
V C M = ±2.5V 
\/... _ +n cw 


±15V 
±5V 
+2 5V 


86 92 
79 84 


dB 
dB 


PSRR 


Power Supply Rejection Ratio 


V s = ±2.5Vto±15V 




93 105 


dB 


AVOL 


Large-Signal Voltage Gain 


V 0U t = ±12V, R L = 1k 

vquj — i 1 u v , r\|_ — ouuii 

Vout = ±2 5V, R L = 500ft 
V OU T = ±2.5V, R L = 150ft 
V 0UT = ±1V, R L = 500n 


±1 5V 

±15V 

±5V 

±5V 

+2.5V 


4.5 9.0 
3.0 6.5 
3,0 6.4 
1.5 4.2 
2.5 5.2 


V/mV 
V/mV 
V/mV 
V/mV 
V/mV 


Vqut 




Output Swing 


R L = 1k, V| N = ±40mV 
R L = 500ft, V| N = i40mV 
R L = 500ft, V, N = ±40mV 
R L = 150ft. V| N = +40mV 
R L = 500Q, V| N = +40mV 


±15V 

±15V 

±5V 

±5V 

+2.5V 


13.5 13.9 
13.0 13.6 
3.5 4.0 

3.2 3.8 

1.3 1.7 


±V 
±V 
±V 
±V 
±V 


l0UT 


Output Current 


V 0U T=±13V 
V OU T = ±3.2V 


±15V 
+5V 


26 34 
21 29 


mA 
mA 


Isc 


Short-Circuit Current 


V UT = OV, V IN = ±3V 


+15V 


40 54 


mA 


SR 


Slew Rate 


A v = -2, (Note 3) 


±15V 
±5V 


600 800 
250 350 


V/us 
V/us 




Full Power Bandwidth 


10V Peak, (Note 4) 
3V Peak, (Note 4) 


±15V 
±5V 


12.7 
18.6 


MHz 
MHz 


GBW 




Gain-Bandwidth 


f = 200kHz 


±15V 

±5V 

±2,5V 


35 50 
25 37 
32 


MHz 
MHz 
MHz 


t„t, 


Rise Time, Fall Time 


A v = 1, 10%-90%, 0.1V 


±15V 
±5V 


3.1 
4.3 


ns 
ns 




Overshoot 


Ay = 1.0.1V 


±15V 
±5V 


35 
27 


% 
% 




Propagation Delay 


50% V m to 50%V OUT , 0.1V 


±15V 

4.KM 


5.2 

R A 


ns 
ns 


t 

l s 


ociuuiy 1 11 hp 


mv^rpn 111% A.. 1 

lUV oicU U. I /o, Hy = I 

10V Step, 0.01%. A v = -1 
5V Step, 0.1%, A v = -1 


X OV 

±15V 
+5V 


fin 
90 
65 


ns 
ns 
ns 




Differential Gain 


f = 3.58MHz, A v = 2, R L = 150ft 
f = 3.58MHz, A v = 2, R L = 1k 


±15V 
±5V 
±15V 
±5V 


0.20 
0.20 
0.04 
0.02 


% 
% 
% 
% 




Differential Phase 


f = 3.58MHz, A v = 2, R L = 15042 
f = 3.58MHz, A v = 2, R L = 1k 


±15V 
±5V 
±15V 
±5V 


0.40 
0.30 
0.07 
0.26 


Deg 
Deg 
Deg 
Deg 


Ro 


Output Resistance 


A v = 1,f = tMHz 


+15V 


1.4 


£2 




Channel Separation 


V OU T = ±10V, R L = 500ft 


+15V 


100 113 


dB 


Is 


Supply Current 


Each Amplifier 
Each Amplifier 


±15V 
±5V 


4.0 5.0 
3.8 4.8 


mA 
mA 



2-324 



xtijqbs 



LT1361/LT1362 



€l€CTRICRl CHRRRCTCRISTICS o°c<t a < 70 C, V CM = OV unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS 


"supply 


MIN TYP 


MAX 


UNITS 


Vos 


Input Offset Voltage 


(Note 2) 


+15V 

±5V 

±2.5V 




1.5 
1.5 
1.7 


mV 
mV 
mV 




Input Vos Drift 


(Note 5) 


±2.5Vto±15V 




9 


12 


uV/°C 


los 


Input Offset Current 




+2.5V to ±15V 


• 


350 


nA 


Ib 


Input Bias Current 




+2.5V to ±1 5V 




1.5 


uA 


CMRR 


Common-Mode Rejection Ratio 


V CM = ±12V 
V CM = ±2.5V 
V C m = ±0.5V 


±15V 

+5V 

+2.5V 


• 


84 
77 
66 


dB 
dB 
dB 


PSRR 


Power Supply Rejection Ratio 


V s = ±2.5Vto±15V 




• 


91 


dB 


AvOL 


Large-Signal Voltage Gain 


Vout = ±1 2V, Rl = 1 k 
Vout = ±10V, R L = 500n 


±15V 
±15V 


• 


3.6 
2.4 




V/mV 
V/mV 






Vout = ±2.5V, R L = 500S2 
V OUT = ±2.5V, R L = 150£2 
V ut = ±1V, R L = 500n 


±5V 
±5V 
±2.5V 


• 


2.4 
1.0 
2.0 




V/mV 
V/mV 
V/mV 


VoUT 


Output Swing 


Rl = 1k, V| N = ±40mV 
Rl = 500Q, V| N = +40mV 
Rl = 500Q, Vin = ±40mV 
R L = 150Q, V| N = ±40mV 
Rl = 500Q, V| N = +40mV 


±15V 

±15V 

±5V 

±5V 

±2.5V 


# 

I 


13.4 
12.8 
3.4 
3.1 
1.2 


±V 
+V 
±V 
±V 

±v 


'out 


Output Current 


Vout =±1 2.8V 

v OUT - 1 v 


±15V 
+5V 




25 
20 


mA 
mA 


Isc 


Short-Circuit Current 


V OU T=0V, V| N = ±3V 


±15V 




32 


mA 


SR 


Slew Rate 


A v = -2, (Note 3) 


±15V 
±5V 




475 
185 


V/ns 
V/ns 


GBW 


Gain-Bandwidth 


f = 200kHz 


±15V 
±5V 




31 
22 


MH: 
MHz 




Channel Separation 


V OU T = ±10V, R L = 500fl 


±15V 




98 


dB 


Is 


Supply Current 


Each Amplifier 
Each Amplifier 


±15V 
±5V 




5.8 

5.6 


mA 
mA 
















€L€CTRICfll CHRRRCTCRISTICS -40°C < T A < 85 C. V CM = OV unless otherwise noted. (Note 6) 


SYMBOL 


PARAMETER 


CONDITIONS 


"supply 


MIN TYP 


MAX 


UNITS 


Vos 


Input Offset Voltage 


(Note 2) 


±15V 

±5V 

±2.5V 




2.0 
2.0 
2.2 


mV 
mV 
mV 




Input V s Drift 


(Note 5) 


±2.5Vto+15V 




9 


12 


MV/°C 


los 


Input Offset Current 




±2.5V to ±15V 




400 


nA 


Ib 


Input Bias Current 




+2.5V to ±15V 




1.8 


MA 


CMRR 


Common-Mode Rejection Ratio 


V CM = ±12V 
V CM = ±2.5V 
V CM = ±0.5V 


±15V 
±5V 
±2.5V 




84 

77 
66 


dB 
dB 
dB 


PSRR 


Power Supply Rejection Ratio 


V s = ±2.5Vto±15V 






90 


dB 



2-325 



LT1361/LT1362 



€l€CTRICRl CHRRRCT€RISTICS -40 C < T A < 85 C. V CM = OV unless otherwise noted. (Note 6) 



SYMBOL 


PARAMETER 


CONDITIONS 


"supply 


MIN 


TYP MAX 


UNITS 


Avol 


1 arnp-^innal Vnltanp Rain 


Vout = ±1 2V, Rl = 1k 


+15V 




2.5 




V/mV 






V OU t = ±10v! R L = 500£2 


±15V 




1.5 




V/mV 






V 0U T = ±2.5V, R L = 500n 


±5V 




1.5 




V/mV 






V ut = ±2.5V, R L = 150n 


+5V 


• 


0.6 




V/mV 






V ut = ±1V, R L = 500n 


+2.5V 


• 


1.3 




V/mV 


VoUT 


Output Swing 


R L = 1k, V| N = +40mV 


+15V 


• 


13.4 




±v 




Rl = 500Q, V| N = ±40mV 


±15V 


• 


12.0 




±v 






Hl = OUUL2, V |fy| = +4UIT1V 


±5V 


• 


3.4 










Rl = 150Q, Vim = ±40mV 






3.0 




+v 






R L = 500Q, V| N = ±40mV 


±2.5V 




1.2 




±v 


'OUT 


Output Current 


Vout = ±1 2.0V 


±15V 




24 




mA 






V OUT = ±3.0V 


±5V 




20 




mA 


lsc 


Short-Circuit Current 


Vout=0V, V,N = ±3V 


+15V 




30 


mA 


SR 


Slew Rate 


A v = -2, (Note 3) 


±15V 




450 




¥/(ls 






+5V 




175 




V/ns 


GBW 


Gain-Bandwidth 


f = 200kHz 


±15V 




30 




MHz 








±5V 




20 




MHz 




Channel Separation 


%jT = +10V, R L = 500f! 


+15V 




98 


dB 


Is 


Supply Current 


Each Amplifier 


±15V 






6.0 


mA 






Each Amplifier 


+5V 






5.8 


mA 



The • denotes specifications that apply over the full operating 
temperature range. 

Note 1: A heat sink may be required to keep the junction temperature 
below absolute maximum when the output is shorted indefinitely. 
Note 2: Input offset voltage is pulse tested and is exclusive of warm-up drift. 
Note 3: Slew rate is measured between ±1 0V on the output with +6V input 
for +15V supplies and ±1 V on the output with ±1 .75V input for +5V supplies. 



Note 4: Full power bandwidth is calculated from the slew rate 

measurement: FPBW = SR/2jiV p . 

Note 5: This parameter is not 100% tested. 

Note 6: The U1361/LT1362 are not tested and are not quality-assurance 
sampled at-40°C and at 85°C. These specifications are guaranteed by 
design, correlation, and/or inference from 0°C, 25°C, and/or 70°C tests. 



TVPICRL P€RFORmflnC€ CHARACTERISTICS 



Supply Current vs Supply Voltage 
and Temperature 

















"125°C 








25°C 








-55"C 

















5 10 15 

SUPPLY VOLTAGE (±V) 



Input Common-Mode Range vs 
Supply Voltage 



T fl = 25°C 






AV 0S < 


mV 







































































5 10 15 

SUPPLY VOLTAGE (±V) 



Input Bias Current vs 

Input Common-Mode Voltage 



V S = ±15V 
T A = 25°C 










ls= 


'B * ' 
2 


| 

























































-15 -10 -5 5 10 15 
INPUT COMMON-MODE VOLTAGE (V) 



2-326 



LT1361/LT1362 



TVPicni P€RFORmnnc€ CHRRnaeRisTics 



Input Bias Current vs 
Temperature 



7 
6 
0.5 
0.4 
03 
02 
0.1 










I 1 

V S = ±15V 










vv 


2 











































































25 50 75 
TEMPERATURE (°C) 



100 125 



Open-Loop Gain vs Temperature 



-V6 
Rl 


= ±15V 










= ±12V 
= 1k 













































































































-50 -25 25 50 75 100 125 

E(-C) 



Output Short-Circuit Current vs 
Temperature 











1 


/s = ±: 


V 






































OURC 












INlO 





































Input Noise Spectral Density 



Open-Loop Gain vs 
Resistive Load 




100 1k 10k 

FREQUENCY (Hz) 



Output Voltage Swing vs 
Supply Voltage 



T A = 25"C 



R L = 5000 s 



5 10 15 20 

SUPPLY VOLTAGE (±V) 



Settling Time vs Output Step 
(Noninverting) 



-50 -25 25 50 75 100 125 
TEMPERATURE (°C) 




00 1k 
LOAD RESISTANCE (S2) 



Output Voltage Swing vs 
Load Current 





v* 




-0.5 


> 


-1.0 


o 


-1.5 






« 


-2.0 


IS 




-=c 








o 
> 


2 






O- 


1.5 


ZD 




Ci 


1.0 




0.5 




V" 



V S = ±5V 












V 


N = 


OBI 


V 






55- C 
























■re 


E 














-40 


C 
























-25 






40' 










































5 C 





















































-50-40 -30 -20 -10 10 20 3 
OUTPUT CURRENT (mA) 



Settling Time vs Output Step 
(Inverting) 



A V 
. R F = Ik 
C F = 3pF 



I5\ 



20 40 60 80 
SETTLING TIME (ns) 



20 40 60 80 
SETTLING TIME (ns) 



2-327 



LT1361/LT1362 



TVPicflL PCRFORmnncc chrrrctcristics 



Output Impedance vs Frequency 



Gain and Phase vs Frequency 



Crosstalk vs Frequency 




100k 1M 10M 
FREQUENCY (Hz) 




100k 1M 10M 
FREQUENCY (Hz) 



M 10M 
FREQUENCY (Hz) 



Gain-Bandwidth and Phase 
Margin vs Temperature 



Frequency Response vs 
Supply Voltage (A v = 1) 



Frequency Response vs 
Capacitive Load 




Gain-Bandwidth and Phase 
Margin vs Supply Voltage 



Power Supply Rejection Ratio 
vs Frequency 



Common-Mode Rejection Ratio 
vs Frequency 







1 












^PHASE MARGIN 








































BANDWIDT 






j^GAIN- 


H 











5 10 15 20 

SUPPLY VOLTAGE (±V) 



46 

44 3 
42 | 

38 "" 

o 

36 5 

32 
30 





+PSRR 




V S = ±15V 




-PSRR ^\ 


IA = 



























































Vs 
Ta 


= ±15V 
= 25°C 





















































1k 10k 100k 1M 10M 100M 
FREQUENCY (Hz) 

nMHHN 



10k 100k 1M 10M 100M 
FREQUENCY (Hz) 



2-328 



LT1361/LT1362 



TVPICHL P€RFORmnnC€ CHRRI1CT€RISTICS 



Slew Rate vs Supply Voltage 



Slew Rate vs Temperature 



Slew Rate vs Input Level 



2000 
1800 
1600 
—1400 
§1200 
£1000 
g 800 



-100 

200 





Ta = 


>5°C 








Ay = 
- H F = 
_ SR = 


-1 

^G= 1k 
SR*t 


















2 



















































































5 10 
SUPPLY VOLTAGE (±V) 



Total Harmonic Distortion 
vs Frequency 



<J 0.001 



100 1k 10k 

FREQUENCY (Hz) 



15 




1000 




900 




800 


> 


700 




600 


cc 




3 


500 


CO 






400 




300 




200 
_ 











1 1 

V = -2 

R= SR%SR-- 
2 




























Vs 


= ±15 


























— \ 


s = ±. 


V — 































50 -25 25 50 75 100 125 
TEMPERATURE (°C) 

Undislorted Output Swing vs 
Frequency (±15V) 




V S = ±15V 
Rl = 1k 

A v = 1.1% MAX DISTORTION 
A V = -1.2%MAX DISTORTION 
l ill l_ 



100k 



1M 

FREQUENCY (Hz) 





2000 




1800 




1600 




1400 


> 


1 200 


ATE 


1000 


cc 




3 


800 






CO 


600 




400 




200 








I 

- T A = 25°C 
V S = ±15V 

- A v = -1 

Rp = Rg = 1k 
SR= SR%SF 
























































2 



















































































































2 



4 6 8 10 12 14 16 18 20 
INPUT LEVEL (Vp.p) 



Undistorted Output Swing vs 
Frequency (±5V) 



Av = -1 



A v = 1 



V s = ±5V 
Rl = 1k 

2% MAX DISTORTION" 

I I I I Hill 



1M 

FREQUENCY (Hz) 



2nd and 3rd Harmonic Distortion 
vs Frequency 




100k 200k 400k 1M 2M 4M 
FREQUENCY (Hz) 



Differential Gain and Phase 
vs Supply Voltage 













DIFFE 


RENTIAL 


GAIN 




















'DIFFERE 


NTIAL PH 


ASE 








A V 
Rl 
Ta 

1 


= 2 

= 150!i 

-25°C 



0.503 



Capacitive Load Handling 



±5 ±10 
SUPPLY VOLTAGE (V) 




10p 100p 1000p 0.01 n 0.1^ 1h 
CAPACITIVE LOAD (F) 

MM) 



2-329 



LT1361/LT1362 



TYPICAL P€RFORmnnC€ CHARACTERISTICS 

Small-Signal Transient Small-Signal Transient Small-Signal Transient 

(A v = 1) (A v = -1) (A v = -1,C L = 500pF) 




Rppucnnons inFORmRTion 

Layout and Passive Components 

The LT1 361/LT1362 amplifiers are easy to use and toler- 
ant of less than ideal layouts. For maximum performance 
(for example, fast 0.01% settling) use a ground plane, 
short lead lengths, and RF-quality bypass capacitors 
(0.01(xFto0.1u.F). For high drive current applications use 
low ESR bypass capacitors (1 jaF to 10u.F tantalum). The 
parallel combination of the feedback resistor and gain 
setting resistor on the inverting input combine with the 
input capacitance to form a pole which can cause peaking 
or oscillations. If feedback resistors greater than 5kfJ are 
used, a parallel capacitor of value 

C F > R G x C| N /R F 

should be used to cancel the input pole and optimize 
dynamic performance. For unity-gain applications where 



a large feedback resistor is used, Cp should be greater 
than or equal to C| N . 

Input Considerations 

Each of the LT1 361/LT1 362 amplifier inputs is the base of 
an NPN and PNP transistor whose base currents are of 
opposite polarity and provide first-order bias current 
cancellation. Because of variation in the matching of NPN 
and PNP beta, the polarity of the input current can be 
positive or negative. The offset current does not depend on 
beta matching and is well controlled. The use of balanced 
source resistance at each input is recommended for 
applications where DC accuracy must be maximized. The 
inputs can withstand differential input voltages of up to 
10V without damage and need no clamping or source 
resistance for protection. 



2-330 



UchnSloB 



LT1361/LT1362 



APPiicATions inFORmnnon 

Capacitive Loading 

The LT1361/LT1362 are stable with any capacitive load. 
This is accomplished by sensing the load induced output 
pole and adding compensation at the amplifier gain node. 
As the capacitive load increases, both the bandwidth and 
phase margin decrease so there will be peaking in the 
frequency domain and in the transient response as shown 
in the typical performance curves. The photo of the small 
signal response with 500pF load shows 60% peaking. The 
large signal response shows the output slew rate being 
limited to 5V/us by the short-circuit current. Coaxial cable 
can be driven directly, but for best pulse fidelity a resistor 
of value equal to the characteristic impedance of the cable 
(i.e., 75n) should be placed in series with the output. The 
other end of the cable should be terminated with the same 
value resistor to ground. 

Circuit Operation 

The LT1361/LT1362 circuit topology is a true voltage 
feedback amplifier that has the slewing behavior of a 
currentfeedbackamplifier. The operation of the circuit can 
be understood by referring to the simplified schematic. 
The inputs are buffered by complementary NPN and PNP 
emitter followers which drive a 500Q resistor. The input 
voltage appears across the resistor generating currents 
which are mirrored intothe high impedance node. Comple- 
mentary followers form an output stage which buffers the 
gain node from the load. The bandwidth is set by the input 
resistor and the capacitance on the high impedance node. 
The slew rate is determined by the current available to 
charge the gain node capacitance. This current is the 
differential input voltage divided by R1 , so the slew rate is 
proportional to the input. Highest slew rates are therefore 
seen in the lowest gain configurations. For example, a 1 0V 
output step in a gain of 10 has only a 1V input step, 
whereas the same output step in unity gain has a 1 times 
greater input step. The curve of Slew Rate vs Input Level 
illustrates this relationship. The LT1361/LT1 362 are tested 
for slew rate in a gain of -2 so higher slew rates can be 
expected in gains of 1 and -1, and lower slew rates in 
higher gain configurations. 



The RC network across the output stage is bootstrapped 
when the amplifier is driving a light or moderate load and 
has no effect under normal operation. When driving a 
capacitive load (or a low value resistive load) the network 
is incompletely bootstrapped and adds to the compensa- 
tion at the high impedance node. The added capacitance 
slows down the amplifier which improves the phase 
margin by moving the unity gain frequency away from the 
pole formed by the output impedance and the capacitive 
load. The zero created by the RC combination adds phase 
to ensure that even for very large load capacitances, the 
total phase lag can never exceed 180 degrees (zero phase 
margin) and the amplifier remains stable. 

Power Dissipation 

The LT1 361/LT1 362 combine high speed and large output 
drive in small packages. Because of the wide supply 
voltage range, it is possible to exceed the maximum 
junction temperature under certain conditions. Maximum 
junction temperature (Tj) is calculated from the ambient 
temperature (T A ) and power dissipation (P D ) as follows: 

LT1361CN8: Tj =T A + (P D x 130°C/W) 
LT1 361 CS8: Tj = T A + (P D x 1 90°C/W) 
LT1362CN: Tj =T A + (P D x 110°C/W) 
LT1362CS: Tj = T A + (P D x 150°C/W) 

Worst case power dissipation occurs at the maximum 
supply current and when the output voltage is at 1/2 of 
either supply voltage (or the maximum swing if less than 
1/2 supply voltage). For each amplifier P DMAX is: 

Pdmax = (V + -V-)(I smax ) + (V + /2) 2 /R l 

Example: LT1362 in S16 at 70°C, V s = ±5V, R L = 100C2 

Pdmax = (10V)(5.6mA) + (2.5V) 2 /100£2 = 119mW 

Tjmax = 70°C + (4x11 9mW)(1 50°C/W) = 1 41 °C 



2-331 



LT1361/LT1362 



typical nppucnnons 

Two Op Amp Instrumentation Amplifier 



R5 R4 




TRIM R5 FOR GAIN 

TRIM R1 FOR COMMON-MODE REJECTION 
BW = 500kHz 



1MHz, 4th Order Butterworth Filter 




simpiiFicD scHcmnnc 




2-332 



urn 

TECHNOLOGY 



LT1363 



F€ATUR€S 

■ 70MHz Gain-Bandwidth 

■ lOOOV/us Slew Rate 

■ 7.5mA Maximum Supply Current 

■ 9nV/VHz Input Noise Voltage 

■ Unity Gain Stable 

■ C-Load™ Op Amp Drives All Capacitive Loads 

■ 1.5mV Maximum Input Offset Voltage 

■ 2u.A Maximum Input Bias Current 

■ 350nA Maximum Input Offset Current 

■ 50mA Minimum Output Current 

■ ±7.5V Minimum Output Swing into 150fl 

■ 4.5V/mV Minimum DC Gain, R L =1k 

■ 50ns Settling Time to 0.1%, 10V Step 

■ 0.06% Differential Gain, A v =2, R L =150n 

■ 0.04° Differential Phase, A v =2, R L =150£2 

■ Specified at ±2.5V, ±5V, and ±15V 

nppucnTions 

■ Wideband Amplifiers 

■ Buffers 

■ Active Filters 

■ Video and RF Amplification 

■ Cable Drivers 

■ Data Acquisition Systems 



D€SCMPTIOfl 

The LT1363 is a high speed, very high slew rate opera- 
tional amplifier with excellent DC performance. The LT1 363 
features reduced supply current, lower input offset volt- 
age, lower input bias current and higher DC gain than 
devices with comparable bandwidth. The circuit topology 
is a voltage feedback amplifier with the slewing character- 
istics of a current feedback amplifier. The amplifier is a 
single gain stage with outstanding settling characteristics 
which makes the circuit an ideal choice for dataacquisition 
systems. The output drives a 150i2 load to ±7.5V with 
±1 5V supplies and to ±3.4V on ±5V supplies. The amplifier 
is also capable of driving any capacitive load which makes 
it useful in buffer or cable driver applications. 

The LT1363 is a member of a family of fast, high perfor- 
mance amplifiers using this unique topology and 
employing Linear Technology Corporation's advanced 
bipolar complementary processing. For dual and quad 
amplifier versions of the LT1363 see the LT1 364/1 365 
data sheet. For 50MHz amplifiers with 4mA of supply 
current per amplifier see the LT1360 and LT1361/1362 
data sheets. For lower supply current amplifiers with 
bandwidths of 12MHzand25MHzsee the LT1354 through 
LT1359 data sheets. Singles, duals, and quads of each 
amplifier are available. 

C-Load is a trademark o! Linear Technology Corporalion 



— 



Av = -1 Large-Signal Response 



TYPicni nppucnTion 

Cable Driver Frequency Response 




10 

FREQUENCY (MHz) 




2-333 



LT1363 



rbsoiutc maximum rrtihgs 

Total Supply Voltage (V + to V") 36V 

Differential Input Voltage ±10V 

Input Voltage +Vs 

Output Short-Circuit Duration (Note 1) Indefinite 

Operating Temperature Range -40°C to 85°C 



Specified Temperature Range -40°C to 85°C 

Maximum Junction Temperature (See Below) 

Plastic Package 150°C 

Storage Temperature Range -65°C to 150°C 

Lead Temperature (Soldering, 10 sec) 300°C 



prckrgc/ordcr inFORmflTion 



NULL fT 
-IN f_2 
+IN fj[ 

V - [T 



TOP VIEW 

— o — 



jj NULL 

TJ v* 

I] Vout 

yj nc 



N8 PACKAGE, 8-LEAO PLASTIC DIP 
TjMAX=150-C,e JA =130°C/W 



ORDER PART 
NUMBER 



LT1363CN8 




S8 PACKAGE, 8-LEAD PLASTIC SOIC 
TjMAX = 150°C,ejA = 190°C/W 



ORDER PART 
NUMBER 



LT1363CS8 



S8 PART MARKING 



1363 



Consult factory for Industrial and Military grade parts. 



€L€CTRICRL CHRRRCT6RISTICS Ta = 25 C, Vcm = 0V unless otherwise noted. 



SYMBOL 



PARAMETER 



CONDITIONS 



VsUPPLY 



MIN TYP MAX 



UNITS 



Vos 



Input Offset Voltage 



(Note 2) 



±15V 

±5V 

±2.5V 



0.5 
0.5 
0.7 



1.5 
1.5 
1.8 



mV 
mV 
mV 



Input Offset Current 



±2.5Vto±15V 



120 



350 



Input Bias Current 



+2.5Vto±15V 



Input Noise Voltage 



f = 10kHz 



±2.5V to ±15V 



nA 



uA 



nV/VHz 



Input Noise Current 



f = 10kHz 



+2.5V to ±15V 



pA/VFE 



Rjn_ 

ClN 



Input Resistance 



V CM = ±12V 



±15V 



12 



50 



MQ 



Input Resistance 



Differential 



±15V 



Mn 



Input Capacitance 



±15V 



PF 



Input Voltage Range* 



±15V 

±5V 

±2.5V 



12.0 
2.5 
0.5 



13.4 
3.4 
1.1 



Input Voltage Range" 



±15V 

±5V 

±2.5V 



-13.2 
-3.2 
-0.9 



-12.0 
-2.5 
-0.5 



CMRR 



Common-Mode Rejection Ratio 



Vcm = ±12V 
V C M = ±2.5V 
V CM = ±0.5V 



±15V 

±5V 

+2.5V 



90 
81 
71 



(IB 
CIB 
dB 



PSRR 



Power Supply Rejection Ratio 



V S = ±2.5V to +15V 



90 



100 



dB 



AVOL 



Large-Signal Voltage Gain 



V 0U T = ±12V, R L = 1k 
V OU T = ±10V, R L = 500Q 
V 0U T = ±7-5V, R L = 150Q 
Vour = ±2.5V, R L = 500n 
V 0U T = ±2.5V, R L = 150n 
Vout = ±1V,R l = 500Q 



±15V 

±15V 

+15V 

±5V 

±5V 

±2.5V 



4.5 
3.0 
2.0 
3.0 
2.0 
2.5 



9.0 
6.5 
3.8 
6.4 
5.6 
5.2 



V/mV 
V/mV 
V/mV 
V/mV 
V/mV 
V/mV 



Vout 



Output Swing 



R L = 1k, V| N = ±40mV 
R L = 500Q, V| N = ±40mV 
R L = 500£2, V| N = ±40mV 
R L = 150n, V| N = ±40mV 
Rl = 500£2, V| N = ±40mV 



±15V 

+15V 

±5V 

±5V 

±2.5V 



13.5 
13.0 
3.5 
3.4 
1.3 



14.0 
13.7 
4.1 
3.8 
1.7 



±V 
±V 
±V 
±V 

±v 



2-334 



xruoas 



€l€CTRICRl CH fl R RCT€RISTICS T A = 25 C, V CM = OV unless otherwise noted 



SYMBOL 


PARAMETER 


CONDITIONS 


VsUPPLY 


MIN TYP MAX 


UNITS 


'out 


Output Current 


v OUT- ±/.DV 

V 0U T = ±3.4V 


+15V 
±5V 


50 60 
23 29 


mA 
mA 


isc 


Short-Circuit Current 


VOUT= UV, V|u = ±ov 




70 105 




SR 


Slew Rate 


A U = -2, (Note 3) 


±15V 

ZOV 


750 1000 


\//nC 




Full Power Bandwidth 


10V Peak, (Note 4) 
3V Peak, (Note 4) 


±1 5V 
±5V 


15.9 
23.9 


MHz 
MHz 


GBW 


Gain-Bandwidth 


f = 1MHz 


±15V 
±5V 
±2.5V 


70 
50 
40 


MHz 
MHz 
MHz 


m 


Rise Time, Fall Time 


A V = 1,10%-90%,0.1V 


±15V 
±5V 


2.6 
3.6 


ns 
ns 




Overshoot 


A v = 1, 0.1V 


±15V 
±5V 


36 
23 


% 
% 




Prnnanatinn Oplav 


50% V|n to 50% Vout, 0.1V 


±15V 
±5V 


4.6 
5.6 


ns 
ns 


% 


Settling Time 


10V Step. 0.1%. A v = -1 
10V Step, 0.01%, A v = -1 
5V Step, 0.1%. A v = -1 


+15V 
±15V 
±5V 


50 
80 
55 


ns 
ns 
ns 




Differential Gain 


f = 3.58MHz, A v = 2, R L = 150n 
f = 3.58MHz, Ay = 2, R L = 1k 


±15V 
+5V 
+15V 
±5V 


0.03 
0.06 
0.01 
0.01 


% 
% 
% 
% 




Differential Phase 


f = 3.58MHz, A v = 2, R L = 150Q 
f = 3.58MHz, Ay = 2, R L = 1k 


±15V 
±5V 
±15V 
±5V 


0.10 
0.04 
0.05 
0.25 


Deg 
Deg 
Deg 
Deg 


Ro 


Output Resistance 


A v = 1,f = 1MHz 


±15V 


0.7 


n 


Is 


Supply Current 




±15V 
±5V 


6.3 7.5 
6.0 7.2 


mA 
mA 


€L€CTRICRL CHRRRCTCRISTICS 0°C <T fl < 70°C, V CM = OV unless otherwise noted. 


SYMBOL 


PARAMETER 


CONDITIONS 


V SUPPLV 


MIN TYP MAX 


UNITS 


Vos 


Input Offset Voltage 


(Note 2) 


±15V 

±5V 

±2.5V 




2.0 
2.0 
2.2 


mV 
mV 
mV 




Input Vos Drift 


(Note 5) 


±2.5V to ±15V 




10 13 


uWC 


los 


Input Offset Current 




+2.5V to ±15V 




500 


nA 


Ib 


Input Bias Current 




±2.5V to ±15V 




3 


uA 


CMRR 


Common-Mode Rejection Ratio 


V CM = ±12V 
V C M = ±2.5V 
V C M = ±0.5V 


+15V 

±5V 

+2.5V 




82 
74 
64 


dB 
dB 
dB 


PSRR 


Power Supply Rejection Ratio 


V s = ±2.5Vto±15V 






88 


dB 


Avol 


Large-Signal Voltage Gain 


V 0UT = ±12V, R(_ = 1 k 
Vout = +10V, R L = 500£2 
V UT = ±2.5V, R L = 500£2 
V OU T = ±2.5V, R L = 150£2 
V 0U T = ±1V, R L = 500n 


±15V 

±15V 

+5V 

±5V 

±2.5V 




3.6 
2.4 
2.4 
1.5 
2.0 


V/mV 
V/mV 
V/mV 
V/mV 
V/mV 



2-335 



LT1363 



€l€CTRICfll CHRRRCT€RISTICS C < Ta < 70 C, V C m = 0V unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS 


VsuPPLY 


MIN TYP MAX 


UNITS 


Vout 


Output Swing 


R L = 1k, V|N = ±40mV 


±15V 




13.4 


±V 






R L = 500Q, V| N = ±40mV 


±15V 




12.8 


±v 






R L = 500n, Vim = ±40mV 


±5V 




3.4 


±v 






R L = 150n, V| N = ±40mV 


±5V 




3.3 


+v 






R L = 500n, V| N = ±40mV 


+2.5V 




1.2 


±v 


'out 


Output Current 


Vout = +1 2.8V 


±15V 




25 


mA 






V UT = ±3.3V 


±5V 




22 


mA 


■sc 


Short-Circuit Current 


Vout=0V, V IN = ±3V 


±15V 




55 


mA 


SR 


Slew Rate 


A v = -2, (Note 3) 


±15V 




600 


V/ns 








±5V 




225 


V/|iS 


Is 


Supply Current 




±15V 




8.7 


mA 








±5V 




8.4 


mA 


€l€CTRICRL CHARACTERISTICS -40°C < T A < 85 C. V CM = OV unless otherwise noted. (Note 6) 


SYMBOL 


PARAMETER 


CONDITIONS 


"supply 


MIN TYP MAX 


UNITS 


Vos 


Input Offset Voltage 


(Note 2) 


±15V 




2.5 


mV 








±5V 




2.5 


mV 








±2.5V 




2.7 


mV 




Input Vos Drift 


(Note 5) 


±2.5V to ±15V 




10 13 


p.V/°C 


los 


Input Offset Current 




±2.5Vto±15V 




600 


nA 


Ib 


Input Bias Current 




±2.5V to±15V 




3.6 


u.A 


CMRR 


Common-Mode Rejection Ratio 


V CM = ±12V 


±15V 




82 


dB 






V CM = ±2.5V 


±5V 




74 


dB 






V CM = ±0.5V 


±2.5V 




64 


dB 


PSRR 


Power Supply Rejection Ratio 


V s = ±2.5Vto±15V 






87 


dB 


Avol 


Large-Signal Voltage Gain 


Vout = ±12V. R L = 1k 


±15V 




2.5 


V/mV 






V OU t = ±10V, R L = 500Q 


±15V 




1.5 


V/mV 






Vout = ±2.5V, R L = soon 


±5V 




1.5 


V/mV 






V 0U t = ±2.5V, R L = 150Q 


±5V 




1.0 


V/mV 






V ou t = ±1V, R L = 500fi 


±2.5V 




1.3 


V/mV 


Vout 


Output Swing 


R L = 1kQ, V| N = +40mV 


+15V 




13.4 


±V 






R L = 500n, Vim = ±40mV 


±15V 




12.7 


±V 






R L = 500£2, V| N = ±40mV 


±5V 




3.4 


±V 






R L = 150£2, V| N = ±40mV 


±5V 




3.2 


±V 






R L = 50012. V| N = ±40mV 


±2.5V 




1.2 


±V 


Iout 


Output Current 


V ut = ±127V 


±15V 




25 


mA 






Vout = ±3.2V 


±5V 




21 


mA 


Isc 


Short-Circuit Current 


Vout = 0V, V|m = ±3V 


+15V 




50 


mA 


SR 


Slew Rate 


A v = -2, (Note 3) 


±15V 




550 


V/U.S 








+5V 




180 


V/us 


Is 


Supply Current 




±15V 




9.0 


mA 








±5V 




8.7 


mA 



The • denotes specifications that apply over the full operating 
temperature range. 

Note 1 : A heat sink may be required to keep the junction temperature 
below absolute maximum when the output is shorted indefinitely. 
Note 2: Input offset voltage is pulse tested and is exclusive of warm-up drift. 
Note 3: Slew rate is measured between ±10V on the output with ±£V input 
for ±1 5V supplies and ±2V on the output with ±1 .75V input for +5V supplies. 



Note 4: Full power bandwidth is calculated from the slew rate 

measurement: FPBW = SR/2nV P . 

Note 5: This parameter is not 100% tested. 

Note 6: The LT1363 is not tested and is not quality-assurance sampled at 

-40°C and at 85°C. These specifications are guaranteed by design, 

correlation, and/or inference from 0°C, 25"C. and/or 70°C tests 



2-336 



LT1363 



TYPicm P€RFonmnnc€ characteristics 



Supply Current vs Supply Voltage 
and Temperature 

















125'C 








25"C 








-55'C 



















5 10 15 

SUPPLY VOLTAGE (±V) 



Input Common-Mode Range vs 
Supply Voltage 



v* 

-0.5 
-1.0 
-1.5 
-2.0 

2.0 
1.5 
1.0 
05 

v- 





T A = 25°C 






iV 0S < 1 


mV 















































































5 10 15 

SUPPLY VOLTAGE (±V) 



Input Bias Current vs 
Input Common-Mode 



1.0 



1 0.8 



0.2 



v s = 
Ta = 

_ Ib = 


±15V 
25°C 

Ib* * Ib" I 








2 



































-10 -5 5 10 15 
INPUT COMMON-MODE VOLTAGE (V) 



Input Bias Current vs 
Temperature 









V S = ±15V 
. I In* * In" I _ 






•B = | - 


2 I 









































































-50 -25 25 50 75 100 125 
TEMPERATURE (°C) 

1363 GM 



Open-Loop Gain vs Temperature 



1 

R L = 1k 
_ V = ±12 
V s = ±15 


/ 










/ 































































































Input Noise Spectral Density 



Open-Loop Gain vs 
Resistive Load 




100 1k 10k 

FREQUENCY (Hz) 



Output Voltage Swing vs 
Supply Voltage 



100 1k 
LOAD RESISTANCE (U) 



Output Voltage Swing vs 
Load Current 



-50 -25 



25 50 75 100 125 
TEMPERATURE (°C) 





V* 




-0.5 




-1.0 




-1.5 


s 


-2.0 








< 




> 


2 






ZD 

a- 


1.5 






o 


1.0 




5 




V~ 



I 

t icon 






"A - 




R 


km 












R L = 500£i \ 






















R L = 500Q S 






F 


L = 1k 











5 10 15 

SUPPLY VOLTAGE (±V) 





V* 




-0.5 




-1.0 




-1.5 






tn 


-2.0 


CD 




<C 




t— 




o 
> 


2.0 






=1 


1.5 






o 


1 




05 




V" 



i l l 
V S = ±5V 














V| 


( = 1 


JLIIll 


j 








8 


i"C 












25°C 




















-40 


■c 






.2: 


"C 


























































■* 




. -40°C 
















85 

































-50-40 -30 -20 -10 10 20 30 40 50 
OUTPUT CURRENT (mA) 



rrxmm 



2-337 



LT1363 



TVPicni p€flFORmnnce chrrrctcristics 



Output Short-Circuit Current vs 
Temperature 



140 

< 

£ 130 
i — 

i 

£ 120 
o 

| 110 
o 

V 100 

EC 
O 

I 90 













's=±: 


V 




































S- SO 


JRCE 










SIN 


< \ 



































Output Impedance vs 
Frequency 



Gain and Phase vs Frequency 



-50 -25 25 50 75 100 125 
TEMPERATURE (°C) 




10k 100k 1M 10M 100M 
FREQUENCY (Hz) 



100k 1M 10M 
FREQUENCY (Hz) 



Settling Time vs Output Step 
(Noninverting) 



Settling Time vs Output Step 
(Inverting) 




Gain-Bandwidth and Phase 
Margin vs Supply Voltage 



20 40 60 80 100 
SETTLING TIME (ns) 



20 40 60 80 100 
SETTLING TIME (ns) 



1 30 
120 
110 
100 
90 
80 
70 
60 
50 
40 
30 



















\ PBA 










SE MARGIH 






























GAIN- 


BANDWIDT 








H 











50 
48 




46 




44 


-a 


n 




3> 


42 


m 




40 


> 




33 


Z 




3 


36 




34 




32 





5 10 15 

SUPPLY VOLTAGE (±V) 



Gain-Bandwidth and Phase 
Margin vs Temperature 




-50 -25 25 50 75 
TEMPERATURE (°C) 



Frequency Response vs 
Supply Voltage (A v = 1) 



Frequency Response vs 
Supply Voltage (A v = -1) 




1M 10M 
FREQUENCY (Hz) 



1M 10M 
FREQUENCY (Hz) 



2-338 



LT1363 



TVPicni pcRFORmnncc 



Frequency Response vs 
Capacitive Load 




Power Supply Rejection Ratio 
vs Frequency 



i= 60 



5 40 



1 1 

+PSRR 




V S = ±15V 
Ta=25°C 






-PSRR 























































100 1k 



10k 100k 1M 
FREQUENCY (Hz) 



Common-Mode Rejection Ratio 
vs Frequency 









Vs 

Ta 


= ±15V 
= 25°C 





















































10k 



100k 1M 10M 
FREQUENCY (Hz) 



Slew Rate vs Supply Voltage 



Slew Rate vs Temperature 



Slew Rate vs Input Level 



2400 
2200 
2000 
1800 
[1600 
M400 
\ 1200 

: 1000 

\ 800 
600 
400 
200 





I 

_ T A = 25°C 

A v = -1 
" R F = R G = 1k 


























SFT 










i. 































































































5 10 
SUPPLY VOLTAGE (±V) 



1400 
1200 
[1000 
: 800 
| 600 
400 
200 









I I 

A v = -2 

SR* + SR" 








SR= — 


2 










Vs 


= ±15 


1 - 


























__Vs_ 


= ±5V 



















-50 -25 25 50 75 100 
TEMPERATURE (°C) 



2000 
1800 
1600 
^1400 
S1200 
ij 1000 
S 800 
"> 600 
400 
200 




I I I 
T A = 25°C 
V S = ±15V 
_ A v =-1 
Rp = Rg = 1 k 

~SR= SRttSF 

_ t 











































































































































































4 6 8 10 12 14 16 18 20 
INPUT LEVEL (Vp.p) 



Total Harmonic Distortion 
vs Frequency 




100 1k 10k 

FREQUENCY (Hz) 



Undistorted Output Swing vs 
Frequency (±15V) 



A v =1 



V S = ±15V 
R L = 1* 

A v = 1.1% MAX DISTORTION 
Av--1. 2% MAX DISTORTION 

I M I L_l 




100k 1M 

FREQUENCY (Hz) 



Undistorted Output Swing vs 
Frequency (±5V) 



I I I 

V s = ±5V 
R L = 1k 

2% MAX DISTORTION 

I II 




1M 

FREQUENCY (Hz) 



2-339 



LT1363 

TVPicni p€RFonmnnc€ charactcristics 

2nd and 3rd Harmonic Distortion Differential Gain and Phase 




FREQUENCY (Hz) SUPPLY VOLTAGE (V) CAPACITIVE LOAD (F) 



I363G2I !3&3G29 



Small-Signal Transient Small-Signal Transient Small-Signal Transient 

(A v = 1 ) (A v = -1 ) (A v = -1, G L = 200pF) 




Large-Signal Transient Large-Signal Transient Large-Signal Transient 

(A v = 1) (A v = -1) (A v = 1,C L = 10,rj00pF) 




2-340 



— 



LT1363 



nppucnTions mFORmnnon 

The LT1 363 may be inserted directly into AD81 7, AD847, 
EL2020, EL2044, and LM6361 applications improving 
both DC and AC performance, provided that the nulling 
circuitry is removed. The suggested nulling circuit forthe 
LT1363 is shown below. 

Offset Nulling 

v* 



! i 1 363 





8 


v • 

ion 


V 



Layout and Passive Components 

The LT1 363 amplifier is easy to apply and tolerant of less 
than ideal layouts. For maximum performance (for ex- 
ample fast settling time) use a ground plane, short lead 
lengths, and RF-quality bypass capacitors (0.01 uf to 
0.1u.F). For high drive current applications use low ESR 
bypass capacitors (1uJ to 10|xF tantalum). Sockets 
should be avoided when maximum frequency perfor- 
mance is required, although low profile sockets can 
provide reasonable performance up to 50MHz. For 
more details see Design Note 50. 

The parallel combination of the feedback resistor and gain 
setting resistor on the inverting input can combine with 
the input capacitance to form a pole which can cause 
peaking or oscillations. For feedback resistors greater 
than 5kf2, a parallel capacitor of value 

C F > Rg x Cim/R f 

should be used to cancel the input pole and optimize 
dynamic performance. For unity-gain applications where 
a large feedback resistor is used, C F should be greater 
than or equal to C| N . 



Capacitive Loading 

The LT1363 is stable with any capacitive load. This is 
accomplished by sensing the load induced output poleand 
adding compensation at the amplifier gain node. As the 
capacitive load increases, both the bandwidth and phase 
margin decrease so there will be peaking in the frequency 
domain and in the transient response as shown in the 
typical performance curves.The photo of the small-signal 
response with 200pF load shows 62% peaking. The large- 
signal response with a 10,000pF load shows the output 
slew rate being limited to 10V/u.s by the short-circuit 
current. Coaxial cable can be driven directly, but for best 
pulse fidelity a resistor of value equal to the characteristic 
impedance of the cable (i.e., 75Q) should be placed in 
series with the output. The other end of the cable should 
be terminated with the same value resistor to ground. The 
response of a cable driver in a gain of 2 driving a 75£2 cable 
is shown on the front page of the data sheet. 

Input Considerations 

Each of the LT1 363 inputs is the base of an NPN and a PNP 
transistor whose base currents are of opposite polarity 
and provide first-order bias current cancellation. Because 
of variation in the matching of NPN and PNP beta, the 
polarity of the input bias current can be positive or nega- 
tive. The offset current does not depend on beta matching 
and is well controlled. The use of balanced source resis- 
tance at each input is recommended for applications 
where DC accuracy must be maximized. The inputs can 
withstand differential input voltages of up to 1 0V without 
damage and need no clamping or source resistance for 
protection. 

Single Supply Operation 

The LT1 363 is specified at ±1 5V, +5V, and ±2.5V supplies, 
but it is also well suited to single supply operation down 
to a single 5V supply. The symmetrical input common- 
mode range and output swing make the device well suited 
for applications with a single supply if the the input and 
output swing ranges are centered (i.e., a DC bias of 2.5V 
on the input and the output). For 5V video applications 
with an assymetrical swing, an offset of 2V on the input 
works best. 



rrmm 



2-341 



LT1363 

nppucOTions inFORmnnon 

Power Dissipation 

The LT1363 combines high speed and large output drive 
in a small package. Because of the wide supply voltage 
range, it is possible to exceed the maximum junction 
temperature under certain conditions. Maximum junction 
temperature (Tj) is calculated from the ambient tempera- 
ture (T A ) and power dissipation (P D ) as follows: 

LT1363CN8: Tj = T A + (P D x 130°C/W) 
LT1363CS8: Tj = T A + (P D x 190°C/W) 

Worst case power dissipation occurs at the maximum 
supply current and when the output voltage is at 1/2 of 
either supply voltage (or the maximum swing if less than 
1/2 supply voltage). Therefore Pdmax is: 

Pdmax = (V + -V-)(Ismax) + (V+/2) 2 /R l 

Example: LT1363CS8 at 70°C, V s = ±15V, R L = 390Q 

Pdmax = (30V)(8.7mA) + (7.5V) 2 /390Q = 405mW 

Tjmax = 70°C + (405mW)(190°C/W) = 147°C 

Circuit Operation 

The LT1363 circuit topology is a true voltage feedback 
amplifier that has the slewing behavior of a current feed- 
back amplifier. The operation of the circuit can be under- 
stood by referring to the simplified schematic. The inputs 
are buffered by complementary NPN and PNP emitter 
followers which drive a 500£1 resistor. The input voltage 
appears across the resistor generating currents which are 
mirrored into the high impedance node. Complementary 
followers form an output stage which buffers the gain 
node from the load. The bandwidth is set by the input 
resistor and the capacitance on the high impedance node. 
The slew rate is determined by the current available to 
charge the gain node capacitance. This current is the 
differential input voltage divided by R1 , so the slew rate is 
proportional to the input. Highest slew rates are therefore 



seen in the lowest gain configurations. For example, a 1 0V 
output step in a gain of 10 has only a 1V input step, 
whereas the same output step in unity gain has a 1 times 
greater input step. The curve of Slew Rate vs Input Level 
illustrates this relationship. The LT1 363 is tested for slew 
rate in a gain of -2 so higher slew rates can be expected 
in gains of 1 and -1, and lower slew rates in higher gain 
configurations. 

The RC network across the output stage is bootstrapped 
when the amplifier is driving a light or moderate load and 
has no effect under normal operation. When driving a 
capacitive load (or a low value resistive load) the network 
is incompletely bootstrapped and adds to the compensa- 
tion at the high impedance node. The added capacitance 
slows down the amplifier which improves the phase 
margin by moving the unity gain frequency away from the 
pole formed by the output impedance and the capacitive 
load. The zero created by the RC combination adds phase 
to ensure that even for very large load capacitances, the 
total phase lag can never exceed 1 80 degrees (zero phase 
margin) and the amplifier remains stable. 

Comparison to Current Feedback Amplifiers 

The LT1363 enjoys the high slew rates of Current Feed- 
back Amplifiers (CFAs) while maintaining the characteris- 
tics of a true voltage feedback amplifier. The primary 
differences are that the LT1363 has two high impedance 
inputs and its closed loop bandwidth decreases as the gain 
increases. CFAs have a low impedance inverting input and 
maintain relatively constant bandwidth with increasing 
gain. The LT1363 can be used in all traditional op amp 
configurations including integrators and applications such 
as photodiode amplifiers and l-to-V converters where 
there may be significant capacitance on the inverting 
input. The frequency compensation is internal and not 
dependent on the value of the feedback resistor. For CFAs, 
the feedback resistance is fixed for a given bandwidth and 
capacitance on the inverting input can cause peaking or 
oscillations. The slew rate of the LT1363 in noninverting 
gain configurations is also superior in most cases. 



2-342 



LT1363 



TYPicm nppucnnons 

Two Op Amp Instrumentation Amplifier 




TRIM R5 FOR GAIN 

TRIM Rt FOR COMMON-MODE REJECTION 
BW = 700kHz 



2MHz, 4th Order Butterworth Filter 




1363 SSOI 



XTUHSSI 



2-343 



LT1364/LT1365 



TECHNOLOGY 



Dual and Quad 
70MHz, IOOOV/lisOp Amps 



F€fiTUR€S 

■ 70MHz Gain-Bandwidth 

■ 1000V/usSlew Rate 

■ 7.5mA Maximum Supply Current per Amplifier 

■ Unity Gain Stable 

■ C-Load™ Op Amp Drives All Capacitive Loads 

■ 9nV/VRz Input Noise Voltage 

■ 1 .5mV Maximum Input Offset Voltage 

■ 2uA Maximum Input Bias Current 

■ 350nA Maximum Input Offset Current 

■ 50mA Minimum Output Current 

■ +7.5V Minimum Output Swing into 150Q 

■ 4.5V/mV Minimum DC Gain, R L =1k 

■ 50ns Settling Time to 0.1%, 10V Step 

■ 0.06% Differential Gain, A v =2, R L =150fi 

■ 0.04° Differential Phase, A v =2, R L =150Q 

■ Specified at +2.5V, +5V, and ±1 5V 



nppLicnnons 

■ Wideband Amplifiers 

■ Buffers 

■ Active Filters 

■ Video and RF Amplification 

■ Cable Drivers 

■ Data Acquisition Systems 



DCSCRIPTIOn 

The LT1 364/LT1 365 are dual and quad high speed opera- 
tional amplifiers with outstanding AC and DC perfor- 
nance. The amplifiers feature much lower supply current 
nd higher slew rate than devices with comparable band- 
width. The circuit topology is a voltage feedback amplifier 
with matched high impedance inputs and the slewing 
performance of a current feedback amplifier. The high 
slew rate and single stage design provide excellent settling 
characteristics which make the circuit an ideal choice for 
data acquisition systems. Each output drives a 1 50Q load 
to +7.5V with +15V supplies and to ±3.4V on ±5V sup- 
plies. The amplifiers are stable with any capacitive load 
making them useful in buffer or cable driving applications. 

The LT1 364/LT1 365 are members of a family of fast, high 
performance amplifiers using this unique topology and 
employing Linear Technology Corporation's advanced 
bipolar complementary processing. For a single amplifier 
version of the LT1 364/LT1 365 see the LT1 363 data sheet. 
For 50MHz devices with 4mA supply currents see the 
LT1360 through LT1362 data sheets. For lower supply 
current amplifiers see the LT1 354 to LT1 359 data sheets. 
Singles, duals, and quads of each amplifier are available. 



C-Load is a trademark of Linear Technology Corporation 



— 



tvpicrl nppucfflion 

Cable Driver Frequency Response 




Av = -1 Large-Signal 



10 

FREQUENCY (MHz) 




2-344 



LT 1 364/ LT 1365 



absolute mnxirnum rrtmgs 

Total Supply Voltage (V + to V") 36V 

Differential Input Voltage ±10V 

Input Voltage +Vs 

Output Short-Circuit Duration (Note 1) Indefinite 

Operating Temperature Range -40°C to 85°C 



Specified Temperature Range -40°C to 85°C 

Maximum Junction Temperature (See Below) 

Plastic Package 150°C 

Storage Temperature Range -65°C to 150°C 

Lead Temperature (Soldering, 1 sec) 300°C 



PRCKRG€/ORD€R IflFORmRTIOn 



OUT A [T 

-IN A [T 

+INA [T 

\r LT 




T] v* 

T\ OUTB 
T| -IN B 
J} +IN B 



N8 PACKAGE 
8-LEAD PLASTIC DIP 
TjMAx = 150°C,e JA = 130°C/W 



ORDER PART 
NUMBER 



LT1364CN8 




S8 PACKAGE 
8-LEAD PLASTIC SOIC 
TjMAX = 150°C.ejA=190-C/W 



ORDER PART 
NUMBER 



LT1364CS8 



S8 PART MARKING 



1364 




N PACKAGE 
14-LEAD PLASTIC DIP 

TjMAX = 150'C,e JA = 110-C/W 



ORDER PART 
NUMBER 



LT1365CN 



Tfj] OUTD 
15] -IN D 
14] +IND 




S PACKAGE 
16-LEAD PLASTIC SOIC 
T JM A X = 150-C,ej A =150=C/W 



ORDER PART 
NUMBER 



LT1365CS 



Consult factory for Industrial and Military grade parts. 



€l€CTRICni CHRRfKT€RISTICS T A = 25 C. V C M = OV unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS 


VsuppLy 


MIN 


TYP 


MAX 


UNITS 


Vos 


Input Offset Voltage 


(Note 2) 


±15V 




0.5 


1.5 


mV 








±5V 




0.5 


1.5 


mV 








±2.5V 




0.7 


1.8 


mV 


I OS 


Input Offset Current 




±2.5Vto+15V 




120 


350 


nA 


Ib 


Input Bias Current 




±2.5V to ±15V 




0.6 


2.0 


MA 


e n 


Input Noise Voltage 


f = 10kHz 


±2.5V to ±15V 


9 


nV/VHz 


in 


Input Noise Current 


f = 10kHz 


+2.5V to ±15V 


1 


pA/Vfiz 


RlN 


Input Resistance 


V CM = ±12V 


±15V 


12 


50 




M£2 




Input Resistance 


Differential 


±15V 


5 


MCI 


ClN 


Input Capacitance 




±15V 


3 


PF 



2-345 



LT1364/LT1365 



€l€CTRICni CHflRnCT€RISTICS T, = 25°C, V CM = OV unless otherwise noted 



SYMBOL 


□ ADA UCTCD 

rAKAMt 1 fcn 


rnunmnuc 
UUNUI 1 lUNo 


"supply 


Mill 

mm 


TVP 

i ir 


MAY 

III HA 


UHI 1 o 




Input Voltage Range * 




+15V 


12.0 


13.4 




V 








±5V 


2.5 


3.4 




V 








±2.5V 


0.5 


1.1 




V 




Input Voltage Range - 




+15V 




-13.2 


-12.0 


V 






±5V 




-3.2 


-2.5 


V 








±2.5V 




-0.9 


-0.5 


V 


CMRR 


Common-Mode Rejection Ratio 


Vru = +12V 
"CM 


+15V 


84 


90 




dB 






Vru - +2 5V 
V CM lt - JV 


±5V 


76 


81 




dB 






V CM = +0.5V 


±2.5V 


66 


71 




dB 


PSRR 


Power Supply Rejection Ratio 


Vs = ±2.5V to ±1 5V 




90 


100 




dB 


A 

AyOL 


Large-Signal Voltage Gain 


W~ 4-1 OW D 11/ 
v 0UT = ±12V, H|_ = IK 


-1-1 M/ 

±l OV 


A K 


q n 
y.u 




\//m\/ 

v/mv 






V OU T = ±10V, R L = 500£2 


±15V 


3.0 


6.5 




V/mV 






V OUT = ±7.5V, R L =150fi 


±15V 


2.0 


3.8 




V/mV 






V 0UT = ±2.5V, R L = 500Q 


+5V 


3.0 


6.4 




V/mV 






Vout = ±2 5V, R L = 1 50£2 


±5V 


2,0 


5.6 




V/mV 






Vout = ±1V, R L = 500fi 


±2,5V 


2.5 


5.2 




V/mV 


VOUT 


Output Swing 


Rl = 1k, V| N = +40mV 


±15V 


13.5 


14.0 




±V 






R L = 500Q, V| N = ±40mV 


±15V 


13.0 


13.7 




±V 






Rl = 500£2, V| N = ±40mV 


±5V 


3.5 


4.1 




±v 






D icnn W i .trim w 

Kl = 10US2, v | fj = ±4urnv 


±ov 


T A 

0.4 


J.o 




±v 






Ri - 5000 Vim - +40mV 

111 — OUUiii V |^ — _L*tUIIIV 


±2.5V 


1.3 


1.7 




±V 


l0UT 


Output Current 


Vout = ±7.5V 


±15V 


50 


60 




mA 






\/_ |lT _ +0 A\I 

v OUT - i-J.TV 


±5V 


23 


29 




mA 


Isc 


Short-Circuit Current 


Vout = ov , V| N = ±3V 


±15V 


70 


105 




mA 


SR 


Slew Rate 


Ay -~c, (Note 3) 


+15V 


750 


1000 




V/u.s 








±5V 


300 


450 




V/|as 




Full Power Bandwidth 


10V Peak, (Note 4) 


±15V 




15.9 




MHz 






3V Peak, (Note 4) 


±5V 




23.9 




MHz 


GBW 


Gain-Bandwidth 


f = 200kHz 


±15V 


50 


70 




MHz 








±5V 


35 


50 




MHz 








±2.5V 




40 




MHz 


tr.tr 


Rise Time, Fall Time 


A v = 1. 10%-90%. 0.1V 


±15V 




2.6 




ns 








+5V 




3.6 




ns 




Overshoot 


A v = 1, 0.1V 


±15V 




36 




% 








±5V 




23 




% 




Propagation Delay 


50% V| N to 50% Vout. 0.1V 


±15V 




4.6 




ns 








+5V 




5.6 




ns 


ts 


Settling Time 


10V Step, 0.1%, A v = -1 


±15V 




50 




ns 






10V Step, 0.01%, Ay = -1 


±15V 




80 




ns 






5V Step, 0.1%, A v = -1 


±5V 




55 




ns 




Differential Gain 


f = 3.58MHz, Ay = 2, R L = 150Q 


±15V 




0.03 




% 








+5V 




0.06 




% 






f = 3.58MHz, A v = 2, R L = 1 k 


±15V 




0.01 




% 








±5V 




0.01 




% 




Differential Phase 


f = 3.58MHz. A v = 2, R L = 150n 


±15V 




0.10 




Deg 








±5V 




0.04 




Deg 






f = 3.58MHz, Ay = 2, R L = 1k 


±15V 




0.05 




Deg 








±5V 




0.25 




Deg 


Ro 


Output Resistance 


Ay=1,f=1MHz 


±15V 


0.7 


Q 




Channel Separation 


V OUT = ±10V, R L = 500Q 


±15V 


100 


113 




dB 


Is 


Supply Current 


Each Amplifier 


+15V 




6.3 


7.5 


mA 






Each Amplifier 


±5V 




6.0 


7.2 


mA 



2-346 



irmm 



LT1364/LT1365 



€l€CTRICRL CHRRRCT€RISTICS O C < T A < 70 C, V CH = OV unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS 


VsUPPLY 


MIN TYP MAX 


UNITS 


Vos 


Input Offset Voltage 


(Note 2) 


±15V 

±5V 

±2.5V 




2.0 

2.0 

2.2 


mV 
mV 
mV 




Input Vos Drift 


(Note 5) 


±2.5Vto+15V 






10 


13 


u.V/°C 


los 


Input Offset Current 




±2.5V to ±15V 


* 


500 


nA 


Ib 


Input Bias Current 




±2.5V to ±15V 




3 


uA 


CMRR 


Common-Mode Rejection Ratio 


Vcm = ±12V 
V CM = ±2.5V 
V CM = ±0.5V 


i I JV 

±5V 
±2.5V 


* 


82 
74 
64 


rJB 
dB 
dB 


PSRR 


Power Supply Rejection Ratio 


V s = ±2.5Vto±15V 




# 


88 


dB 


AvOL 


Large-Signal Voltage Gain 


V 0U T = ±12V, R L = 1k 
V OUT = ±10V, R L = 500£2 
V ut = +2.5V, R L = 50012 
V 0UT = ±2.5V, R l = 150£2 
V 0U T = ±1V, R L = 500£2 


±15V 

±15V 

±5V 

±5V 

±2.5V 


; 
• 


3.6 
2.4 
2.4 
1.5 
2.0 


V/mV 
V/mV 
V/mV 
V/mV 
V/mV 


VoUT 


Output Swing 


Rl = 1k, V| N = +40mV 
R, - ^nno \/r.i - +d(\m\i 

n|_ — DUUi-i "IN — ^tUHIV 

R L = 500n, V, N = ±40mV 
R L = 150n, V| N = ±40mV 
R L = 500O, V| N = ±40mV 


±15V 

±15V 

±5V 

±5V 

±2.5V 


• 


13.4 
12.8 
3.4 
3.3 
1.2 


±V 
+V 

±v 
±v 
±v 


'OUT 


Output Current 


V OU T = ±12.8V 
V OUT = ±3.3V 


+15V 
±5V 




25 
22 


mA 
mA 


'sc 


Short-Circuit Current 


V UT=OV, V| N = ±3V 


±15V 




55 


mA 


SR 


Slew Rate 


A v = -2, (Note 3) 


±15V 
±5V 




600 
225 


V/p.s 
V/ns 


GBW 


Gain-Bandwidth 


f = 200kHz 


±15V 
±5V 




44 
31 


MHz 
MHz 




Channel Separation 


V 0U t = ±10V, R L = 500fi 


±1 5V 




98 


dB 


Is 


Supply Current 


Each Amplifier 
Each Amplifier 


±15V 
±5V 




8.7 
8.4 


mA 
mA 


€l€CTRICm CHARACTERISTICS -40 c r fl 85 


V C m = 0V unless otherwise 


noted 


(Note 6) 


SYMBOL 


PARAMETER 


CONDITIONS 


Vsupply 


MIN 


TYP MAX 


UNITS 


Vos 


Input Offset Voltage 


(Note 2) 


±15V 

+5V 

±2.5V 




2.5 
2.5 
2.7 


mV 
mV 
mV 




Input Vos Drift 


(Note 5) 


±2.5V to ±1 5V 






10 


13 


p.V/°C 


los 


Input Offset Current 




±2.5Vto±15V 




600 


nA 


Ib 


Input Bias Current 




±2.5V to ±15V 




3.6 


MA 


CMRR 


Common-Mode Rejection Ratio 


Vcm = ±12V 
V CM = ±2.5V 
V CM = +0.5V 


±15V 

+5V 

±2.5V 




82 
74 
64 


dB 
dB 
dB 


PSRR 


Power Supply Rejection Ratio 


V S = ±2.5V to ±1 5V 






87 


dB 



X7TJQHS 



2-347 



€l€CTRICRl CHRRRCT6RISTICS -40 C < T A < 85 C, V CM = OV unless otherwise noted. (Note 6) 



SYMBOL 


PARAMETER 


CONDITIONS 


^SUPPLY 


MIN 


TYP MAX 


UNITS 


"VOL 


1 arnp-Sinnal Vnltanp Rain 


Vout = ±1 2V, R L = 1 k 


+15V 


• 


2.5 




V/mV 






Vout = ±1 OV, Rl = 500Q 


±15V 


• 


1.5 




V/mV 






Vout = ±2.5V, Rl = 500fi 


±5V 


* 


1.5 




V/mV 






V 0U t = ±2.5V, R L = 150£2 


±5V 




1.0 




V/mV 






V 0U T = ±1V, R L = 500n 


±2.5V 


# 


1.3 




V/mV 


Vqut 


Output Swing 


Rl = 1k, V IN = ±40mV 


±1 5V 




13.4 




±V 






Rl = 500Q, V| N = ±40mV 


±15V 




12.7 




±v 






R L = 500fi, V| N = ±40mV 


±5V 


• 


3.4 




±v 






R L = 150Q, V| N = ±40mV 


±5V 


• 


3.2 




±v 






Rl = 500Q, V|n = ±40mv 


±2.5V 


• 


1.2 




±v 


!0UT 


Output Current 


V 0UT = ±12-7V 


+15V 


• 


25 




mA 






V UT = ±3.2V 


±5V 


• 


21 




mA 


'sc 


Short-Circuit Current 


Vout = OV, V| N = ±3V 


±15V 


• 


50 


mA 


SR 


Slew Rate 


A v = -2, (Note 3) 


±15V 




550 




V/ns 








±5V 




180 




V/jis 


GBW 


Gain-Bandwidth 


f = 200kHz 


±15V 




43 




MHz 








±5V 




30 




MHz 




Channel Separation 


V O ut = ±10V, R L = 500n 


±15V 




98 


dB 


Is 


Supply Current 


Each Amplifier 


±15V 






9.0 


mA 






Each Amplifier 


±5V 






8.7 


mA 



The • denotes specifications that apply over the full operating 
temperature range. 

Note 1: A heat sink may be required to keep the junction temperature 
below absolute maximum when the output is shorted indefinitely. 
Note 2: Input offset voltage is pulse tested and is exclusive of warm-up drift. 
Note 3: Slew rate is measured between +10V on the output with ±6V input 
for ±1 5V supplies and ±1 V on the output with ±1 .75V input for ±5V supplies. 



Note 4: Full power bandwidth is calculated from the slew rate 

measurement: FPBW = SR/2jiV p . 

Note 5: This parameter is not 100% tested. 

Note 6: The LT1 364/LT1 365 are not tested and are not quality-assurance 
sampled at -40°C and at 85°C. These specifications are guaranteed by 
design, correlation, and/or inference from 0°C, 25°C, and/or 70°C tests. 



TVPICRL P€RFORmflnC€ CHRRRCTCRISTICS 



Supply Current vs Supply Voltage 
and Temperature 



S 6 

















_125°C 
25<C 








-55°C 



















5 10 15 20 

SUPPLY VOLTAGE (±V) 



Input Common-Mode Range vs 
Supply Voltage 



V* 
-0.5 
~-1.0 
S-1.5 
1 -2.0 

3 

i 2.0 
I 1-5 
s 1.0 
0.5 
V 



T A = 25"C 






AV 0S < 


mV 















































































5 10 15 

SUPPLY VOLTAGE (±V) 



Input Bias Current vs 

Input Common-Mode Voltage 



V S = ±15V 
T A = 25°C 



-15 -10 -5 5 10 15 
INPUT COMMON-MODE VOLTAGE (V) 



2-348 



LT1364/LT1365 



TYPicni p€RFORmnnc€ charactcri 



Input Bias Current vs 
Temperature 





1.4 




1.2 


<- 






1.0 






DC 
a: 


0.8 






< 


0.6 






Q_ 


0.4 








0.2 














V S = ±15V 

. I Ib + + Ib" I 










'"""I 


2 


I 









































































50 75 

CO 



Open-Loop Gain vs Temperature 



v s 
Rl 


= ±15V 
= *12V 










»1k 































































































-50 -25 25 50 75 100 125 
TEMPERATURE (°C) 



Output Short-Circuit Current vs 
Temperature 



140 
. 130 
120 
110 
100 
90 
80 
70 













1 




's = ±S 


r 

V 




































\S0 


JRCE 










SIN 


< \ 





































Input Noise Spectral Density 



Open-Loop Gain vs 
Resistive Load 




100 1k 10k 

FREQUENCY (Hz) 



Output Voltage Swing vs 
Supply Voltage 



Output Voltage Swing vs 
Load Current 





V* 




-0.5 




-i o 


z 


-1.5 




-2.0 


co 


CD 




<t 




o 

> 


2.0 






Q_ 


1.5 


— 




O 


1.0 




0.5 




V" 







— I 

-T 4 = 25°C- 



. R L = lk_ 



- Rl = 1k - 





V* 




0.5 




-1.0 




-1.5 


s 




CO 


-2 












2.0 








1.5 






o 


1.0 




0.5 




V" 



t i i 
V s = ±5V 














"V, 


= 1 


lOrn 










8! 














25 C 






















A(\°r. 








°C 




































* 








L 
















SB 






10 : C 
















85' 

































5 10 15 

SUPPLY VOLTAGE (±V) 



0-40 -30 -20 -10 10 20 30 40 50 
OUTPUT CURRENT (mA) 



Settling Time vs Output Step 
(Noninverting) 



Settling Time vs Output ! 
(Inverting) 



25 50 75 100 125 
TEMPERATURE (°C) 




20 40 

SETTLING TIME (ns) 



40 60 
SETTLING TIME (ns) 



irmm 



2-349 



LT1364/LT1365 



tvpichl p€RFORmnnc€ cHnnncTCRisTics 



Output Impedance vs Frequency 



Gain and Phase vs Frequency 



Crosstalk vs Frequency 




Gain-Bandwidth and Phase 
Margin vs Temperature 




25 50 75 
TEMPERATURE (°C) 



Frequency Response vs 
Supply Voltage (A v = 1) 



T A = 25=C 
A v = 1 

B - Mi 
































































±1 


5V f 










































































































± 


V 
































































II 






III 


T 



1M 10M 
FREQUENCY (Hz) 



Frequency Response vs 
Capacitive Load 




Gain-Bandwidth and Phase 
Margin vs Supply Voltage 





130 




120 




110 


(MHz 


100 


:c 


90 


o 




S 


80 


Q 




IAN 


70 




60 








50 




40 




30 







I 






















SE MARGir\ 






























GAIN- 


3ANDWI0T 








H 











5 10 15 

SUPPLY VOLTAGE (±V) 



46 

44 | 

V) 

42 £ 

4° 1 

38 5 
o 

36 S 
34 
32 
30 



Power Supply Rejection Ratio 
vs Frequency 



1 

+PSRR 




V S = ±15V 
T. _ ocor 




-PSRR 




'A - 



















































Common-Mode Rejection Ratio 
vs Frequency 



120 
100 



10k 100k 1M 
FREQUENCY (Hz) 









Ta 


= ±15V 
= 25°C 





















































100k 1M 
FREQUENCY (Hz 



2-350 



UchnSloB 



LT1364/LT1365 



typical PCRFonmnnce CHflnncTemsTics 



Slew Rate vs Supply Voltage 



Slew Rate vs Temperature 



Slew Rate vs Input Level 



2400 
2200 
2000 
1800 
■§1600 

a 1400 

S 1200 
g 1000 
3 800 
600 
400 
200 




_ T A = 25°C 

A v = -1 
" R F =R G = 1k 


























3R~ 










I 































































































5 10 
SUPPLY VOLTAGE (±V) 



1400 
1200 
[1000 
: 800 
\ 600 
400 
200 









I I I 
A v = -2 

„„ SR + + SR~ 








an - — 


2 












= ±15 


/ 




























= ±5V 



















25 50 75 
TEMPERATURE (°C) 



100 125 



2000 
1800 
1600 
5-1400 
3.1200 
S 1000 

s 

S 800 
" 600 
400 
200 




I I 
T A = 25"C 
V S = ±15V 
- A v = -1 
R f = R G = 1k 

"sR= SR+tSn 











































































































































































6 8 10 12 14 16 18 20 
INPUT LEVEL (V P . P ) 



Total Harmonic Distortion 
vs Frequency 




100 1k 10k 

FREQUENCY (Hz) 



Undistorted Output Swing vs 
Frequency (±15V) 



A v = 1 



V S = ±15V 
R L =1k 

Ay = 1, 1% MAX DISTORTION 
Ay = -1 , 2% MAX DISTORTION 

I I II I I — L 




100k 



1M 

FREQUENCY (Hz) 



Undistorted Output Swing vs 
Frequency (±5V) 



i 

V S =±5V 
R L = 1k 

2% MAX DISTORTION 
I I I I 1 1 1 1 




1M 

FREQUENCY (Hz) 



2nd and 3rd Harmonic Distortion 
vs Frequency 




100k 200k 400k 1M 2M 4M 
FREQUENCY (Hz) 



Differential Gain and Phase 
vs Supply Voltage 

















DIFF 


RENTIAL 


GAIN 
























DIFFER 


ENTIAL P 


HASE 







= 2 

= 15051 
= 25°C 








A V 
Rl 
Ta 



±5 ±10 
SUPPLY VOLTAGE (V) 



Capacitive Load Handling 




10p 100p 1000p 0.01m 0.1m 1m 
CAPACITIVE LOAD (F) 



2-351 



LT1364/LT1365 

TVPICfiL P€RFORmnnC€ CHfiRRCT€RISTICS 



Small-Signal Transient Small-Signal Transient Small-Signal Transient 

(A v = 1) (A V = -1) (A v = -1,C L = 2D0pF) 




RPPLicRTions inFORmflTion 

Layout and Passive Components 

The LT1 364/LT1 365 amplifiers are easy to use and toler- 
ant of less than ideal layouts. For maximum performance 
(for example, fast 0.01% settling) use a ground plane, 
short lead lengths, and RF-quality bypass capacitors 
(0.01 pF to 0.1 |iF). For high drive current applications use 
low ESR bypass capacitors (1u,Fto 10|iF tantalum). 

The parallel combination of the feedback resistorand gain 
setting resistor on the inverting input combine with the 
input capacitance to form a pole which can cause peaking 
or oscillations. If feedback resistors greater than 5k£i are 
used, a parallel capacitor of value 

C F > R G x C| N /R F 

should be used to cancel the input pole and optimize 
dynamic performance. For unity-gain applications where 



a large feedback resistor is used, C F should be greater 
than or equal to C| N . 

Input Considerations 

Each of the LT1 364/LT1 365 amplifier inputs is the base of 
an NPN and PIMP transistor whose base currents are of 
opposite polarity and provide first-order bias current 
cancellation. Because of variation in the matching of NPN 
and PNP beta, the polarity of the input current can be 
positive or negative. The offset current does not depend on 
beta matching and is well controlled. The use of balanced 
source resistance at each input is recommended for 
applications where DC accuracy must be maximized. The 
inputs can withstand differential input voltages of up to 
10V without damage and need no clamping or source 
resistance for protection. 



2-352 



LT1364/LT1365 



nppucnTions inFORmnnon 

Capacitive Loading 

The LT1 364/LT1 365 are stable with any capacitive load. 
This is accomplished by sensing the load induced output 
pole and adding compensation at the amplifier gain node. 
As the capacitive load increases, both the bandwidth and 
phase margin decrease so there will be peaking in the 
frequency domain and in the transient response as shown 
in the typical performance curves. The photo of the small 
signal response with 200pF load shows 62% peaking. The 
large signal response shows the output slew rate being 
limited to 10V/|iS by the short-circuit current. Coaxial 
cable can be driven directly, but for best pulse fidelity a 
resistor of value equal to the characteristic impedance of 
the cable (i.e., 75Q.) should be placed in series with the 
output. The other end of the cable should be terminated 
with the same value resistor to ground. 

Circuit Operation 

The LT1 364/LT1 365 circuit topology is a true voltage 
feedback amplifier that has the slewing behavior of a 
current feedbackamplifier. The operation of the circuit can 
be understood by referring to the simplified schematic. 
The inputs are buffered by complementary NPN and PNP 
emitter followers which drive a 500Q resistor. The input 
voltage appears across the resistor generating currents 
which are mirrored into the high impedance node. Comple- 
mentary followers form an output stage which buffers the 
gain node from the load. The bandwidth is set by the input 
resistor and the capacitance on the high impedance node. 
The slew rate is determined by the current available to 
charge the gain node capacitance. This current is the 
differential input voltage divided by R1 , so the slew rate is 
proportional to the input. Highest slew rates are therefore 
seen in the lowest gain configurations. For example, a 1 0V 
output step in a gain of 10 has only a 1V input step, 
whereas the same output step in unity gain has a 1 times 
greater input step. The curve of Slew Rate vs Input Level 
illustrates this relationship. The LT1 364/LT1 365 are tested 
for slew rate in a gain of -2 so higher slew rates can be 
expected in gains of 1 and -1 , and lower slew rates in 
higher gain configurations. 



The RC network across the output stage is bootstrapped 
when the amplifier is driving a light or moderate load and 
has no effect under normal operation. When driving a 
capacitive load (or a low value resistive load) the network 
is incompletely bootstrapped and adds to the compensa- 
tion at the high impedance node. The added capacitance 
slows down the amplifier which improves the phase 
margin by moving the unity gain frequency away from the 
pole formed by the output impedance and the capacitive 
load. The zero created by the RC combination adds phase 
to ensure that even for very large load capacitances, the 
total phase lag can never exceed 1 80 degrees (zero phase 
margin) and the amplifier remains stable. 

Power Dissipation 

The LT1 364/LT1 365 combine high speed and large output 
drive in small packages. Because of the wide supply 
voltage range, it is possible to exceed the maximum 
junction temperature under certain conditions. Maximum 
junction temperature (Tj) is calculated from the ambient 
temperature (Ta) and power dissipation (Pq) as follows: 

LT1364CN8: Tj = T A + (P D x 130°C/W) 
LT1364CS8: Tj = T A + (P D x 190°C/W) 
LT1365CN: Tj = T A + (P D x 110°C/W) 
LT1 365CS: Tj = T A + (P D x 1 50°C/W) 

Worst case power dissipation occurs at the maximum 
supply current and when the output voltage is at 1/2 of 
either supply voltage (or the maximum swing if less than 
1/2 supply voltage). For each amplifier Pdmax is: 

Pdmax = (V + -V-)(I S max) + (V + /2) 2 /R l 

Example: LT1365 in S16 at 70°C, V s = +5V, R L = 150D 

Pdmax = (10V)(8.4mA) + (2.5V) 2 /150Q = 126mW 

Tjmax = 70°C + (4 x 126mW)(150°C/W) = 145°C 



2~353 



LT1364/LT1365 




2-354 



XTUM> 



Lin^AB INDEX 

TECHNOLOGY INULA 

SECTION 2— AMPLIFIERS 

ZERO DRIFT OPERATIONAL AMPLIFIERS 

LTC1151, Dual +15V Zero-Drift Operational Amplifier 2-356 

LTC1152, Rail-to-Rail Input Rail-to-Rail Output Zero-Drift Op Amp 13-7 

L TC1250, Very Low Noise Zero-Drift Bridge Amplifier 2-364 



2-355 



TECHNOLOGY 



LTC1151 

Dual ± 15V Zero-Drift 
Operational Amplifier 



F€ATUR€S 

■ Maximum Offset Voltage Drift: 0.05u.V/°C 

■ High Voltage Operation: ±18V 

■ No External Components Required 

■ Maximum Offset Voltage: 5p.V 

■ Low Noise: 1 .5p.V P . P (0.1 Hz to 1 0Hz) 

■ Minimum Voltage Gain: 125dB 

■ Minimum CMRR: 106dB 

■ Minimum PSRR: 110dB 

■ Low Supply Current: 0.9mA/Amplifier 

■ Single Supply Operation: 4.75V to 36V 

■ Input Common-Mode Range Includes Ground 

■ Typical Overload Recovery Time: 20ms 

application 

■ Strain Gauge Amplifiers 

■ Instrumentation Amplifiers 

■ Electronic Scales 

■ Medical Instrumentation 

■ Thermocouple Amplifiers 

■ High Resolution Data Acquisition 



DCSCMPTIOn 

The LTC1151 is a high voltage, high performance dual 
zero-drift operational amplifier. Thetwosample-and-hold 
capacitors per amplifier required externally by other chop- 
per amplifiers are integrated on-chip. The LTC1151 also 
incorporates proprietary high voltage CMOS structures 
which allow operation at up to 36V total supply voltage. 

The LTC1151 has a typical offset voltage of 0.5u.V, 
drift of 0.01nV/°C, 0.1 Hz to 10Hz input noise voltage of 
1 .5|j.Vp.p, and a typical voltage gain of 1 40dB. It has a slew 
rate of 3V/u.s and a gain-bandwidth product of 2.5MHz 
with a supply current of 0.9mA per amplifier. Overload 
recovery times from positive and negative saturation are 
3ms and 20ms, respectively. 

The LTC1151 is available in a standard 8-lead plastic DIP 
package as well as a 1 6-lead wide body SO. The LTC1 1 51 
is pin compatible with industry-standard dual op amps 
and runs from standard ±1 5V supplies, allowing it to plug 
in to most standard bipolar op amp sockets while offering 
significant improvement in DC performance. 



TYPICAL APPLICATION 



±15V Dual Thermocouple Amplifier Noise Spectrum 




2-356 



LTCU51 



rbsoiutc mnxirnum RRTinGs 

(Note 1) 

Total Supply Voltage (V + to V") 36V 

Input Voltage (Note 2) (V + + 0.3V) to (V" - 0.3V) 

Output Short Circuit Duration Indefinite 

Burn-In Voltage 36V 



Operating Temperature Range 

LTC1151C 0°Cto 70°C 

Storage Temperature Range -65°C to 150°C 

Lead Temperature (Soldering, 10 sec) 300°C 



PRCKRG€/ORD€fi IflFORmflTIOn 



OUT A \T 
-IN A |T 
+INA [T 



TOP VIEW 

— C — 



U v* 

T\ OUTB 
T| -IN B 
7£j +IN B 



N8 PACKAGE 
8-LEAD PLASTIC DIP 



Tjmax = 110°C,9ja = 130°C/W 



ORDER PART 
NUMBER 



LTC1151CN8 




S PACKAGE 
16-LEAD PLASTIC SOL 

TjMAX = 110 = C,ej A = 200°C/W 



ORDER PART 
NUMBER 



LTC1151CS 



Consult factory for Industrial and Military grade parts. 



€l€CTRICfll CHRRRCTCRISTICS 

V s = ±15V, T A = Operating Temperature Range, unless otherwise specified. 



PARAMETER 


CONDITIONS 


MIN 


LTC1151C 
TYP 


MAX 


UNITS 


Input Offset Voltage 


T A = 25°C (Note 3) 






±0.5 


±5 


NV 


Average Input Offset Drift 


(Note 3) 


• 




±0.01 


±0.05 


U.WC 


Long Term Offset Voltage Drift 






50 


nVA/fno 


Input Offset Current 


T A = 25°C 


• 


±20 ±200 
±0.5 


pA 
nA 


Input Bias Current 


T A = 25°C 


• 




±15 


±100 
±0.5 


pA 
nA 


Input Noise Voltage 


R S = 100Q, 0.1Hz to 10Hz 
R s = 100n, 0.1 Hz to 1 Hz 




1.5 

0.5 


uVp.p 
uVp-p 


Input Noise Current 


f = 10Hz (Note 4) 




2.2 


fA/Vflz 


Input Voltage Range 


Positive 
Negative 


• 
• 


12 
-15 


13.2 
-15.3 




V 
V 


Common-Mode Rejection Ratio 


V CM = V-to12V 


• 


106 


130 




dB 


Power Supply Rejection Ratio 


V s = 12.375V to ±16V 


• 


110 


130 




dB 


Large-Signal Voltage Gain 


R L = 10k,V OUT = ±10V 


• 


125 


140 




dB 



XTUflSi 



2-357 



LTC1151 



€L€CTRICnL CHARflCT€RISTICS 



V s = 15V. T A = Operating Temperature Range, unless otherwise specified. 



PARAMETER 


CONDITIONS 


MIN 


LTC1151C 
TYP 


MAX 


UNITS 


Maximum Output Voltage Swing 


R L = 10k, T A = 25°C 
R L = 10k 
R L = 100k 


• 


±13.5 ±14.50 
+10.5/-13.5 

±14.95 


V 
V 
V 


Slew Rate 


R L = 10k, C L = 50pF 




2.5 


V/ns 


Gain-Bandwidth Product 








MHz 


Supply Current per Amplifier 


No Load, Ta = 25°C 
No Load 


• 




0.9 


1.5 
2.0 


mA 
mA 


Internal Sampling Frequency 






1000 


Hz 


Vs = 5V, Ta = Operating Temperature Range, unless otherwise specified. 


Input Offset Voltage 


T A = 25°C (Note 3) 






±0.05 


±5 




Average Input Offset Drift 


(Note 3) 


• 




±0.01 


±0.05 


nv/°c 


Long Term Offset Voltage Drift 






50 


nV/Vfno 


Input Offset Current 


T A = 25°C 






±10 


100 


PA 


Input Bias Current 


T A = 25°C 






±5 


50 


PA 


Input Noise Voltage 


R s = 100n, 0.1Hz to 10Hz 
R s = 100£2,0.1Hzto1Hz 




2.0 
0.7 


M-Vp-P 
U-Vp.p 


Input Noise Current 


f = 10Hz(Note 4) 




1.3 


fA/VHz 


Input Voltage Range 


Positive 
Negative 




2.7 



3.2 
-0.3 




V 
V 


Common-Mode Rejection Ratio 


V CM = 0Vto2.7V 




110 


dB 


Power Supply Rejection Ratio 


V s = +2.375V to ±16V 


• 


110 


130 




dB 


Large-Signal Voltage Gain 


R L = 10k, V OUT = 0.3Vto 4.5V 


• 


115 


140 




dB 


Maximum Output Voltage Swing 


R L = 10kto GND 
R L = 100k to GND 




4.85 
4.97 


V 
V 


Slew Rate 


R L = 10k, C L = 50pF 




1.5 


VAjs 


Gain Bandwidth Product 






1.5 


MHz 


Supply Current per Amplifier 


No Load, T A = 25°C 


• 




0.5 


1.0 
1.5 


mA 
mA 


Internal Sampling Frequency 







750 


Hz 



The • denotes the specifications which apply over the full operating 
temperature range. 

Note 1: Absolute Maximum Ratings are those values beyond which life of 
the device may be impaired. 

Note 2: Connecting any terminal to voltages greater than V + or less than 
V" may cause destructive latch-up. It is recommended that no sources 
operating from external supplies be applied prior to power-up of the 
LTC1151. 



Note 3: These parameters are guaranteed by design. Thermocouple 
effects preclude measurement of these voltage levels in high speed 
automatic test systems. Vns is measured to a limit determined by test 
equipment capability. 

Note 4: Current Noise is calculated from the formula: 

l N = V(2q-^) 
where q = 1.6 x10 -19 Coulomb. 



2-358 



LTC1151 



TVPICRl P€RFORfnnnC€ CHRRRCTCRISTICS 



Supply Current vs Supply Voltage 



1 

T S = 25°C 





























































































































































4 8 12 16 20 24 28 32 36 
TOTAL SUPPLY VOLTAGE (V) 



Supply Current vs Temperature 













I 

-V S = ±15V- 

_l 



































































































































































































10 20 30 40 50 60 70 
TEMPERATURE ( - C) 



Common-Mode Input Voltage 
Range vs Supply Voltage 



15 
10 

j 5 

| ° 
| -5 

> 

-10 
-15 



t a =: 


5°C 







































































±2.5 ±5.0 ±7.5 ±10.0 ±12.5 ±15.0 
SUPPLY VOLTAGE (V) 



Output Short-Circuit Current vs 
Supply Voltage 



6 

I 4 

I 2 

i o 

I 

i ~ 3 

> 

> 

i -9 

1-12 
i 

-15 



I I 

T A = 25"C 


































VouT = V" 
ISOURCE 






























OUT = 

hk 














- v 


V* 







































Undistorted Output Swing vs 
Frequency 



4 8 12 16 20 24 28 32 36 
TOTAL SUPPLY VOLTAGE. V* TO V" (V) 




CMRR vs Frequency 



1k 10k 100k 
FREQUENCY (Hz) 



160 
140 
120 

, 100 



V 


s 


= ± 


5V 



















































































































































































































10 100 1k 10k 100k 
FREQUENCY (Hz) 




2-359 



LTC1151 



TVPicnt pcRFORmnncc chrrrctcristics 



Input Bias Current Magnitude vs 
Temperature 



Input Bias Current Magnitude vs 
Supply Voltage 



Input Bias Current vs 

Input Common-Mode Voltage 




-50 -25 25 50 75 100 125 
TEMPERATURE ("Q 



0.1Hz to 10Hz Noise 



Small-Signal Transient Response 




I I 

T A = 25°C 

v™ = ov 























( 







































































60 
45 

f 30 
I 15 

CC 

3 o 

t/y 
< 

m -15 
I -30 
-45 











Vs = 


15V 

25"C- 










Ta = 








































At 



































±2 ±4 ±6 ±8 ±10 t12 ±14 ±16 
SUPPLY VOLTAGE (V) 

1151 sti 



-15 -10 -5 5 10 15 
INPUT COMMON-MODE VOLTAGE (V) 

im«n 




Large-Signal Transient Response 



Negative Overload Recovery 




V S = ±15V,A V = 1 
C L = lOOpF. R L = 10k 



V s = ±15V. A v = 1 
C L = 100pF, R L = 10k 



2ms/DIV 




2ms/DIV 
V S = ±15V.A V = -100 
NOTE: POSITIVE OVERLOAD RECOVERY IS 
TYPICALLY 3ms. 



2-360 



LTC1151 




nppLicnnons inFORmnnon 

ACHIEVING PICOAMPERE/MICROVOLT PERFORMANCE 
Picoamperes 

In order to realize the picoampere level of accuracy of the 
LTC1 1 51 proper care must be exercised. Leakage currents 
in circuitry external to the amplifier can significantly de- 
grade performance. High quality insulation should be used 
(e.g., Teflon); cleaning of all insulating surfaces to remove 
fluxes and other residues will probably be necessary, 
particularly for high temperature performance. Surface 
coating may be necessary to provide a moisture barrier in 
high humidity environments. 

Board leakage can be minimized by encircling the input 
connections with a guard ring operated at a potential close 
to that of the inputs: in inverting configurations the guard 
ring should be tied to ground; in noninverting connections 
to the inverting input. Guarding both sides of the printed 
circuit board is required. Bulk leakage reduction depends 
on the guard ring width. 

Microvolts 

Thermocouple effects must be considered if the LTC1 1 51 's 
ultra low drift is to be fully utilized. Any connection of 
dissimilar metals forms a thermoelectric junction produc- 
ing an electric potential which varies with temperature 
(Seebeck effect). As temperature sensors, thermocouples 
exploitthis phenomenon to produce useful information. In 
low drift amplifier circuits the effect is a primary source of 
error. 



Connectors, switches, relay contacts, sockets, resistors, 
solder, and even copper wire are all candidates forthermal 
EMF generation. Junctions of copper wire from different 
manufacturers can generate thermal EMFs of 200nV/°C; 
fourtimesthe maximum driftspecification of the LTC1 1 51 . 

Minimizing thermal EMF-induced errors is possible if 
judicious attention is given to circuit board layout and 
component selection. It is good practice to minimize the 
number of junctions in the amplifier's input signal path. 
Avoid connectors, sockets, switches, and relays where 
possible. In instances where this is not possible, attempt 
to balance the number and type of junctions so that 
differential cancellation occurs. Doing this may involve 
deliberately introducing junctions to offset unavoidable 
junctions. 

Figure 1 is an example of the introduction of an unneces- 
sary resistor to promote differential thermal balance. 
Maintaining compensating junctions in close physical 
proximity will keep them at the same temperature and 
reduce thermal EMF errors. 

When connectors, switches, relays and/or sockets are 
necessary they should be selected for low thermal EMF 
activity. The same techniques of thermally balancing and 
coupling the matching junctions are effective in reducing 
the thermal EMF errors of these components. 



XTffiAg 



2-361 



LTC1151 



application inFORmnnon 



NOMINALLY UNNECESSARY 
RESISTOR USED TO 
THERMALLY BALANCE 
OTHER INPUT RESISTOR 



RESISTOR LEAD, SOLDER, 
COPPER TRACE JUNCTION 



LEAD WIR 
COPPER TRACE JUNCTION 




OUTPUT 



Figure 1. Extra Resistors Cancel Thermal EMF 

Resistors are another source of thermal EMF errors. Table 
1 shows the thermal EMF generated for different resistors. 
The temperature gradient across the resistor is important, 
not the ambient temperature. There are two junctions 
formed at each end of the resistorand if these junctionsare 
at the same temperature, their thermal EMFs will cancel 
each other. The thermal EMF numbers are approximate 
and vary with resistor value. High values give higher 
thermal EMF. 

Table 1. Resistor Thermal EMF 



RESISTOR TYPE 


THERMAL EMF/ C GRADIENT 


Tin Oxide 


>1mV/°C 


Carbon Composition 


~450|iV/°C 


Metal Film 


-20nV/°C 


Wire Wound 




Evenohm, Manganin 


~2uV/°C 



PACKAGE-INDUCED OFFSET VOLTAGE 

Package-induced thermal EMF effects are another impor- 
tant source of errors. They arise at the junctions formed 
when wire or printed circuit traces contact a package lead. 
Like all the previously mentioned thermal EMF effects, 
they are outside the LTC1 151 's offset nulling loop and 
cannot be cancelled. The input offset voltage specification 
of the LTC1151 is actually set by the package-induced 
warm-up drift rather than by the circuit itself. The thermal 
time constant rangesfrom 0.5 to 3 minutes, depending on 
package type. 

ALIASING 

Like all sampled data systems, the LTC1151 exhibits 
aliasing behavior at input frequencies near the sampling 
frequency. The LTC1151 includes a high frequency cor- 
rection loop which minimizes this effect. As a result, 
aliasing is not a problem for many applications. 

For a complete discussion of the correction circuitry and 
aliasing behavior, please refer to the LTC1051/LTC1053 
data sheet. 

LOW SUPPLY OPERATION 

The minimum supply for proper operation of the LTC1 1 51 
is typically 4.0V (±2.0V). In single supply applications, 
PSRR is guaranteed down to 4.7V (±2.35V) to ensure 
proper operation at minimumTTLsupply voltage of 4. 75V. 



TYPICAL APPLICATION 



High Voltage Instrumentation Amplifier 




2-362 



TVPicni nppucOTions 

Bridge Amplifier with Active Common-Mode Suppression 



15V 15V 




2-363 



LintiAR. 

TECHNOLOGY 



F€HTUR€S 

■ Very Low Noise: 0.75u.V P . P Typ, 0.1 Hz to 1 0Hz 

■ DC to 1 Hz Noise Lower Than OP-07 

■ Full Output Swing into 1k Load 

■ Offset Voltage: 10|aV Max 

■ Offset Voltage Drift: 50nV/°C Max 

■ Common-Mode Rejection Ratio: 110dB Min 

■ Power Supply Rejection Ratio: 115dB Min 

■ No External Components Required 

■ Pin-Compatible with Standard 8-Pin Op Amps 

flPPUCRTIOnS 

■ Electronic Scales 

■ Strain Gauge Amplifiers 

■ Thermocouple Amplifiers 

■ High Resolution Data Acquisition 

■ Low Noise Transducers 

■ Instrumentation Amplifiers 



LTC1250 

Very Low Noise 
Zero-Drift Bridge Amplifier 

DescMPTion 

The LTC1250 is a high performance, very low noise zero- 
drift operational amplifier. The LTC1250's combination of 
low front-end noise and DC precision makes it ideal for use 
with low impedance bridge transducers. The LTC1250 
features typical input noise of 0.75u.Vp.p from 0.1 Hz to 
1 0Hz, and 0.2nV P . P from 0.1 Hz to 1 Hz. The LTC1 250 has 
DC to 1 Hz noise of 0.35|iV P - P , surpassing that of low noise 
bipolar parts including the OP-07, OP-77, and LT1012. 
The LTC1250 uses the industry-standard single op amp 
pinout, and requires no external components or nulling 
signals, allowing it to be a plug-in replacement for bipolar 
op amps. 

The LTC1250 incorporates an improved output stage 
capable of driving 4.3V into a 1k load with a single 5V 
supply; it will swing +4.9V into 5k with ±5V supplies. The 
input common mode range includes ground with single 
power supply voltages above 1 2V. Supply current is 3mA 
with a ±5V supply, and overload recovery times from 
positive and negative saturation are 0.5ms and 1.5ms, 
respectively. The internal nulling clock is set at 5kHz for 
optimum low frequency noise and offset drift; no external 
connections are necessary. 

The LTC1250 is available in standard 8-pin ceramic and 
plastic DIPs, as well as an 8-pin SOIC package. 



TYPICAL flPPUCOTIOn 



Differential Bridge Amplifier Input Referred Noise 0.1Hz to 10Hz 




2-364 



LTC1250 



rbsolutc maximum rrtirgs prckrgc/ordcr inFORmnnon 

Total Supply Voltage (V + to V") 18V 

Input Voltage (V + + 0.3V) to (V" - 0.3V) 

Output Short Circuit Duration Indefinite 

Operating Temperature Range 

LTC1250M -55°Cto125°C 

LTC1250C 0°CTO70°C 

Storage Temperature Range -65°C to 150°C 

Lead Temperature (Soldering, 10 sec.) 300°C 



€l€CTRICni CHRRIKT€RISTICS Vin = ±5V, Ta = Operating Temperature Range, unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS 


LTC1250M 
MIN TYP MAX 


LTC1250C 
MIN TYP MAX 


UNITS 


Vos 


Input Offset Voltage 


T A = 25°C (Note 1 ) 




±5 ±10 


±5 ±10 


H.V 


AV 0S 


Average Input Offset Drift 


(Note 1) 


• 


±0.01 ±0.05 


±0.01 ±0.05 


uV/°C 




Long Term Offset Drift 






50 


50 


nV/VMo 


e n 


Input Noise Voltage (Note 2) 


T A = 25°C, 0.1Hz to 10Hz 
T A = 25°C, 0.1 Hz to 1 Hz 




0.75 1.0 
0.2 


0.75 1.0 
0.2 


uVp.p 
M-Vp-P 


in 


Input Noise Current 


f = 10Hz 




4.0 


4.0 


fAAHz 


le 


Input Bias Current 


T A = 25°C (Note 3) 


• 


±50 ±150 
±950 


±50 ±200 
±450 


PA 
PA 


I OS 


Input Offset Current 


T A = 25°C (Note 3) 


• 


±100 ±300 
+500 


±100 ±400 
±500 


PA 
PA 


CMRR 


Common-Mode Rejection Ratio 


V CM = -4Vto3V 


• 


110 130 


110 130 


dB 


PSRR 


Power Supply Rejection Ratio 


V s = ±2.375Vto±8V 


• 


115 130 


115 130 


dB 


AvOL 


Large-Signal Voltage Gain 


R L = 10k,V O uT = ±4V 


• 


125 170 


125 170 


dB 




Maximum Output Voltage Swing 


R L = 1k 
R L = 100k 


• 


±4.0 4.3/-4J 
±4.92 


±4.0 4.3/-4J 
±4.95 


V 
V 


SR 


Slew Rate 


R L = 10k, C L = 50pF 




10 


10 


V/us 


GBW 


Gain-Bandwidth Product 






1.5 


1.5 


MHz 


Is 


Supply Current 


No Load, T A = 25°C 


• 


3.0 4.0 
7.0 


3.0 4.0 
5.0 


mA 
mA 


fs 


Internal Sampling Frequency 


T A =25°C 




4.75 


4.75 


kHz 


Vin = 5V, T A = Operating Temperature Range, unless otherwise noted. 


SYMBOL 


PARAMETER 


CONDITIONS 


LTC1250M 
MIN TYP MAX 


LTC1250C 
MIN TYP MAX 


UNITS 


Vos 


Input Offset Voltage 


T A = 25°C (Note 1) 




±2 ±5 


±2 ±5 


U.V 


AV 0S 


Average Input Offset Drift 


(Note 1) 


• 


±0.01 ±0.05 


±0.01 ±0.05 


mW°c 


e n 


Input Noise Voltage (Note 2) 


T A = 25°C, 0.1Hzto10Hz 
T A = 25°C, 0.1 Hz to 1 Hz 




1.0 
0.3 


1.0 
0.3 


M-Vp-p 
M-Vp-p 


Ib 


Input Bias Current 


T A = 25°C(Note3) 




±20 ±100 


±20 ±100 


PA 


los 


Input Offset Current 


T A = 25°C (Note 3) 




±40 ±200 


±40 ±200 


pA 





TOP VIEW 




ORDER PART 




_ w 


T| NC 


NUMBER 


-IN [7 
♦IN U 

V" [T 




T\r 

If] OUT 
U NC 


LTC1250MJ8 
LTC1250CJ8 
LTC1250CN8 


J8 PACKAGE N8 PACKAGE 
8-LEAD CERAMIC DIP 8-LEAD PLASTIC DIP 


LTC1250CS8 


8 


S8 PACKAGE 
LEAD PUSTIC SOIC 


S8 PART MARKING 


TjMAX 
TjMAX 


= 150-C,ej A =100°CW(J8) 
= 110°C. 8ja=130°CW(N8) 
= 110»C,6 JA = 200°CW (S8) 


1250 



Consult factory for Industrial grade parts. 



2-365 



LTC1250 



€l€CTRICRl CHRRRCTCRISTICS V, N = 5V. T A = Operating Temperature Range, unless otherwise 



SYMBOL 


PARAMETER 


CONDITIONS 


LTC1250M 
MIN TYP MAX 


LTC1250C 
MIN TYP MAX 


UNITS 




Maximum Output Voltage Swing 


R L = 1k 
R L = 100k 




4.0 4.3 
4.95 


4.0 4.3 
4.95 


V 
V 


Is 


Supply Current 


T A = 25»C 




1.8 2.5 


1.8 2.5 


mA 


fs 


Sampling Frequency 


T A = 25°C 




3 


3 


kHz 



The • denotes specifications which apply over the full operating 
temperature range. 

Note 1: These parametes are guaranteed by design. Thermocouple effects 
preclude measurement of these voltage levels during automated testing. 
Note 2: 0.1 Hz to 10Hz noise is specified DC coupled in a 10s window; 
0.1 Hz to 1 Hz noise is specified in a 1 00s window with an RC high-pass 



filter at 0. 1 Hz. The LTC1 250 is sample tested for noise; for 1 00% tested 
parts contact LTC Marketing Dept. 

Note 3: At T < 0°C these parameters are guaranteed by design and not 



TVPICRL PCRFORfRRRCC CHRRACT6RISTICS 



Input Noise vs Supply Voltage 



1.6 
1.4 

" 1.2 

ti- 
lt 

% « 

I 0.8 
=> 0.6 
: 

0.2 




T A = 25"C 



4 6 8 10 12 14 16 
TOTAL SUPPLY VOLTAGE. V* TO V" (V) 

LTC! 250 GD I 

Input Noise vs Temperature 





±5V 






























Hz TO 


10Hz 
























0. 


IHzTC 


1Hz 























-50 -25 25 50 75 100 125 
TEMPERATURE (°C) 

LTC12MGO* 



Supply Current vs Supply Voltage 



4.0 

3.5 

5 3.0 
E. 

I 25 
DC 

5 2.0 

o 

>■ 

5. 1.5 
a. 

« 1.0 
0.5 




ta=; 


5°C 































































































4 6 8 10 12 14 16 

TOTAL SUPPLY VOLTAGE, V* TO V" (V) 

LTE12MG02 

Supply Current vs Temperature 



2.0 















±5V 



























































-50 -25 25 50 75 100 125 
TEMPERATURE (*C) 

I3BMMI 



Sampling Frequency vs Supply 
Voltage 



Ta=: 


5°C 






















t 

























4 6 8 10 12 14 16 
TOTAL SUPPLY VOLTAGE, V* TO V" (V) 

LTC1250G03 



Sampling Frequency vs 
Temperature 















±5V 





































































































25 50 75 100 150 
TEMPERATURE CO 

LTC12SOG06 



2-366 



LTC1250 



typical p€RFORmnncc cHnnnacmsTics 



Voltage Noise vs Frequency 




10 100 1k 

FREQUENCY (Hz) 



Gain/Phase vs Frequency 



Bias Current (Magnitude) vs 
Temperature 




10k 100k 

FREQUENCY (Hz) 















=V S = 1 5V: 



















































































































































































50 -25 



25 50 75 100 125 
TEMPERATURE CO 



Overload Recovery 




500ps/DIV 
A v = 1 00, R L = 1 00k, C L = 50pF, V s = ±5V 



Transient Response 




1 fJS/DJV 

A v =1,R L = 100k, C L = 50pF, V S = ±5V 



Common-Mode Input Range 
vs Supply Voltage 





25°C 































































































4 5 6 7 
SUPPLY VOLTAGE (±V) 



Output Swing vs Load 
Resistance, Dual Supplies 

















1 

Ri TO GND 




Vs 


= .-.8 


/ 
















<r- 








































Vs 


- 1 5\ 


















































• b 


















<" 




-1 
























- fj 


EGATIVE 


SWI 


G 










- POSITIVE SWING 



1 2 3 4 5 6 7 8 9 10 
LOAD RESISTANCE (k£2) 

LTCiaOGOS 



Common-Mode Rejection Ratio 
vs Frequency 





140 




120 




100 


CO 


80 


cc 




cc 


60 


o 






40 




20 




























HUM ( Mill 
V s = ±5V 
VrM - 1Vhms 



















































































































































































1 10 100 1k 10k 100k 
FREQUENCY (Hz) 

LTC1ZHG12 

Output Voltage Swing vs Load 
Resistance, Single Supply 





18 

16 




14 


> 


12 


CD 




f 


10 


CO 




f— 


8 






PL 




O 


6 




4 




2 










I 

V S = 16 


' 
























































Vs 


= 10 


/ 
























































vs 


= 5V 














































V" 


GN 


1 
















R L TO GND 
l I 



1 2 3 4 5 6 7 1 
LOAD RESISTANCE (kfi) 



2-367 



LTC1250 



TVPICflL P€RFORmnnC€ CHR 



Output Swing vs Output Current, 
±5V Supply 




0.1 1 

OUTPUT CURRENT (mA) 



Output Swing vs Output Current, 
Single 5V Supply 



0.1 1 
OUTPUT CURRENT (mA) 



Short-Circuit Current 
vs Temperature 




-50 -25 



\ 


B-*1 


5V 


















VoUT 


= V~ 




































































VoUT 





















25 50 75 100 125 
TEMPERATURE (°C) 

LIC12S0 G1B 



T€ST CIRCUITS 

Offset Test Circuit 

100pF 




OUTPUT 



100pF 



DC to 10Hz Noise Test Circuit 
(for DC to 1 Hz Multiply All Capacitor Values by 10) 




OUTPUT 



RPPUCRTIOnS MFORmRTIOn 

Input Noise 

The LTC1 250, like all CMOS amplifiers, exhibits two types 
of low frequency noise: thermal noise and 1/f noise. The 
LTC1250 uses several design modifications to minimize 
these noise sources. Thermal noise is minimized by rais- 
ing the gM of the front-end transistors by running them at 
high bias levels and using large transistor geometries. 1/f 
noise is combated by optimizing the zero-drift nulling loop 
to run at twice the 1/f corner frequency, allowing it to 
reduce the inherently high CMOS 1/f noise to near thermal 
levels at low frequencies. The resultant noise spectrum is 
quite low at frequencies below the internal 5kHz clock 




Figure 1 . Voltage Noise vs Frequency 



2-368 



jjnjm 



LTC1250 



APPUCOTIOnS inFORfTlflTIOn 

frequency, approaching the best bipolar op amps at 1 0Hz 
and surpassing them below 1Hz (Figure 1). All this is 
accomplished in an industry-standard pinout; the LTC1 250 
requires no external capacitors, no nulling or clock sig- 
nals, and conforms to industry-standard 8-pin DIP and 8- 
pin SOIC packages. 

Input Capacitance and Compensation 

The large input transistors create a parasitic 55pF capaci- 
tance from each input to V + . This input capacitance will 
react with the external feedback resistors to form a pole 
which can affect amplifier stability. In low gain, high 
impedance configurations, the pole can land below the 
unity-gain frequency of the feedback network and degrade 
phase margin, causing ringing, oscillation, and other un- 
pleasantness. This is true of any op amp, however, the 
55pF capacitance at the LTC1 250's inputs can affect stabil- 
ity with a feedback network impedance as low as 1 .9k. This 
effect can be eliminated by adding a capacitor across the 
feedback resistor, adding a zero which cancels the input 
pole (Figure 2). The value of this capacitor should be: 



where Av = closed-loop gain. Note that Cp is not dependent 
on the value of Rp. Circuits with higher gain (Ay > 50) or 
low loop impedance should not require Cp for stability. 




Figure 2. Cf Cancels Phase Shift Due to Parasitic Cp 

Larger values of Cp, commonly used in band-limited DC 
circuits, may actually increase low frequency noise. The 
nulling circuitry in the LTC1 250 closes a loop that includes 
the external feedback network during part of its cycle. This 
loop must settle to its final value within 1 50|iS or it will not 



fully cancel the 1/f noise spectrum and the low frequency 
noise of the part will rise. If the loop is underdamped (large 
R F , no C F ) it will ring for more than 150jis and the noise 
and offset will suffer. 

The solution is to add Cp as above but beware! Too large 
a value of Cp will overdamp the loop, again preventing it 
from reaching a final value by the 150us deadline. This 
condition doesn't affect the LTC1250's offset or output 
stability, but 1/f noise begins to rise. As a rule of thumb, 
the RpCp feedback pole should be > 7kHz (1/150us, the 
frequency at which the loop settles) for best 1/f perfor- 
mance; values between 1 0OpF and 500pF work well with 
feedback resistors below 100k. This ensures adequate 
gain at 7kHz for the LTC1 250 to properly null. High value 
feedback resistors (above 1 M) may require experimenta- 
tion to find the correct value because parasitics, both in 
the LTC1250 and on the PC board, play an increasing 
role. Low value resistors (below 5k) may not require a 
capacitor at all. 

Input Bias Current 

The inputs of the LTC1250, like all zero-drift op amps, 
draw only small switching spikes of AC bias current; DC 
leakage current is negligible except at very high tempera- 
tures. The large front-end transistors cause switching 
spikes 3 to 4 times greater than standard zero-drift op 
amps: the ±50pA bias current spec is still many times 
better than most bipolar parts. The spikes don't match 
from one input pin to the other, and are sometimes (but 
not always) of opposite polarity. As a result, matching the 
impedances at the inputs (Figure 3) will not cancel the bias 
current, and may cause additional errors. Don't do it. 



■vw 




Figure 3. Extra Resistor Will Not Cancel Bias Current Errors 



2-369 



LTC1250 



nppucOTions inFORmnnon 

Output Drive 

The LTC1250 includes an enhanced output stage which 
provides nearly symmetrical output source/sink currents. 
This output is capable of swinging a minimum of ±4V into 
a 1 k load with ±5V supplies, and can sink orsource>20mA 
into low impedance loads. Lightly loaded (R[_ >100k), the 
LTC1250 will swing to within millivolts of either rail. In 
single supply applications, it will typically swing 4.3V into 
a 1k load witha5V supply. 

Minimizing External Errors 

The input noise, offset voltage, and bias current specs for 
the LTC1 250 are all well below the levels of circuit board 
parasitics. Thermocouples between the copper pins of the 
LTC1 250 and the tin/lead solder used to connect them can 
overwhelm the offset voltage of the LTC1 250, especially if 
a soldering iron has been around recently. Note also that 
when the LTC1 250's output is heavily loaded, the chip may 
dissipate substantial power, raising the temperature of the 
package and aggravating thermocouples at the inputs. 
Although the LTC1250 will maintain its specified accuracy 
under these conditions, care must be taken in the layout to 
prevent or compensate circuit errors. Be especially careful 
of air currents when measuring low frequency noise; 
nearby moving objects (like people) can create very large 
noise peaks with an unshielded circuit board. For more 
detailed explanations and advice on how to avoid these 
errors, see the LTC1051/LTC1053 data sheet. 

Sampling Behavior 

The LTC1 250's zero-drift nulling loop samples the input at 
« 5kHz, allowing it to process signals below 2kHz with no 
aliasing. Signals above this frequency may show aliasing 
behavior, although wideband internal circuitry generally 
keeps errors to a minimum. The output of the LTC1 250 will 
have small spikes at the clock frequency and its harmonics; 
these will vary in amplitude with different feedback configu- 
rations. Low frequency or band-limited systems should not 
be affected, but systems with higher bandwidth 
(oversampling A/Ds, for example) may need to filter out 
these clock artifacts. Output spikes can be minimized with a 
large feedback capacitor, but this will adversely affect noise 
performance (see Input Capacitance and Compensation on 



the previous page). Applications which require spike-free 
output in addition to minimum noise will need a low-pass 
filter after the LTC1250; a simple RC will usually do the job 
(Figure 4). The LTC1 051/LTC1 053 data sheet includes more 
information about zero-drift amplifier sampling behavior. 




Figure 4. RC Output Pole Limits Bandwidth to 330Hz 
Single Supply Operation 

The LTC1 250 will operate with single supply voltages as low 
as 4.5V, and the output swings to within millivolts of either 
supply when lightly loaded. The input stage will common 
mode to within 250mV of ground with a single 5V supply, 
and will common mode to ground with single supplies 
above 11V. Most bridge transducers bias their inputs above 
ground when powered from single supplies, allowing them 
to interface directly to the LTC1 250 in single supply applica- 
tions. Single-ended, ground-referenced signals will need to 
be level shifted slightly to interface to the LTC1 250's inputs. 

Fault Conditions 

The LTC1250 is designed to withstand most external fault 
conditions without latch-up or damage. However, unusu- 
ally severe fault conditions can destroy the part. All pins are 
protected against faults of +25mA or 5V beyond either 
supply, whichever comes first. If the external circuitry can 
exceed these limits, series resistors or voltage clamp diodes 
should be included to prevent damage. 

The LTC1 250 includes internal protection against ESD dam- 
age. All data sheet parameters are maintained to 1 kV ESD on 
any pin; beyond 1 kV, the input bias and offset currents will 
increase, but the remaining specs are unaffected and the 
part remains functional to 5kV at the input pins and 8kV at 
the output pin. Extreme ESD conditions should be guarded 
against by using standard anti-static precautions. 



2-370 



X7WBB 



LTC1250 



TVPKHL nppucmions 



Reference Buffer 



Differential Thermocouple Ampliifer 




±10ppm ERROR AT ±15mA 
ItiVp.p OUTPUT NOISE 
2.5p.V/°C DRIFT (DUE TO LM399) 




R7 

500£i 

FULL-SCALE TRIM 

R8 
5k 
17. 



' FOR BEST ACCURACY, THERMOCOUPLE 
RESISTANCE SHOULD BE LESS THAN 100Q 



27UQEK 



2-371 



Lin^AB INDEX 

TECHNOLOGY MNUtA 



SECTION 2— AMPLIFIERS 

MULTIPLEXERS 

LT1203/LT1205, 150MHz Video Multiplexers 2-374 

LT1204, 4- Input Video Multiplexer with 75MHz Current Feedback Amplifier 2-389 



XTffiAg 



2-373 




urn 



LT1203/LT1205 



TECHNOLOGY 1 50MHz Video Multiplexers 



F€fUUR€S 

■ -3dB Bandwidth: 150MHz 

■ 0.1dB Gain Flatness: 30MHz 

■ Channel-to-Channel Switching Time: 25ns 

■ Turn-On/Turn-Off Time: 25ns 

■ High Slew Rate: 300V/ns 

■ Disabled Output Impedance: 10M£2 

■ 50mV Switching Transient 

■ Channel Separation at 10MHz:>90dB 

■ Differential Gain: 0.02% 

■ Differential Phase: 0.02° 

■ Wide Supply Range: ±5V to +15V 

■ Output Short-Circuit Protected 

■ Push-Pull Output 

nppucRTions 

■ Broadcast Quality Video Multiplexing 

■ Picture-in-Picture Switching 

■ HDTV 

■ Computer Graphics 

■ Title Generation 

■ Video Crosspoint Matrices 

■ Video Routers 



D€SCRIPTIOfl 



The LT1203 is a wideband 2-input video multiplexer 
designed for pixel switching and broadcast quality rout- 
ing. The LT1205 is a dual version that is configured as a 
4-input, 2-output multiplexer. 

These multiplexers act as SPDT video switches with 10ns 
transition times at toggle rates up to 30MHz. The -3dB 
bandwidth is 1 50MHz and 0.1 dB gain flatness is 30MHz. 
Many parts can be tied together at their outputs by using 
the enable feature which reduces the power dissipation 
and raises the output impedance to 1 0MQ. Output capaci- 
tance when disabled is only 3pF and the LT1 203 peaks less 
than 3dB into a 50pF load. Channel crosstalk and disable 
isolation are greater than 90dB up to 1 0MHz. An on-chip 
buffer interfaces to fast TTL or CMOS logic. Switching 
transients are only 50mV with a 25ns duration. The 
LT1 203 and LT1 205 outputs are protected against shorts 
to ground. 

The LT1203/LT1205 are manufactured using Linear 
Technology's proprietary complementary bipolar process. 
The LT1203 is available in both the 8-lead PDIP and SO 
package while the LT1205 is available in the 16-lead 
narrow body SO package. 



tvpicrl rppiicrtior 



High Speed RGB MUX 

CHANNEL SELECT 




V 0UT GREEN 



VqutBLUE 



Large-Signal Response 




2-374 



LT1203/LT1205 



rbsoiut€ mnximum rrtmgs 

Supply Voltage ±18V 

Signal Input Current (Note 1) ±20mA 

Logic Input Current (Note 2) ±50mA 

Output Short-Circuit Duration (Note 3) Continuous 

Specified Temperature Range (Note 4) 0°C to 70°C 



Operating Temperature Range -40°C to 85°C 

Storage Temperature Range -65°C to 150°C 

Junction Temperature (Note 5) 150°C 

Lead Temperature (Soldering, 10 sec) 300°C 



PflCKflG€/ORD€R IflFORmRTIOn 



VlNoU 
GND [7 
V|N1 LX 

v [T 



TOP VIEW 

— c — 



TJ v* 

hvout 

T] EN 
T| LOGIC 



N8 PACKAGE S8 PACKAGE 

i-LEAO PUSTIC DIP 8-LEAD PLASTIC SOIC 



TjMAX=150°C,ej, = 100°C/W(N) 
Tj„ JX = 150°C.ej« = 150°C/W(S) 



ORDER PART 
NUMBER 



LT1203CN8* 
LT1203CS8* 



S8 PART MARKING 



1203 




S PACKAGE 
16-LEAD PLASTIC SOIC 

TjMAX = 150"C,ej A =100"C/W 



ORDER PART 
NUMBER 



LT1205CS* 



•See Note 4 
Consult factory for 



Military grade parts. 



€l€CTRICfll CHARACTERISTICS 

0°C < T A < 70 C, ±5V < V s < +15V, R L = 1k, pulse tested, EN pin open or high, unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS 


MIN TYP MAX 


UNITS 


Vos 








10 30 


mV 


Output Offset Voltage 


Any Input Selected 






Output Offset Matching 


Between Outputs 




0.3 5 


mV 


M/ 0S /AT 


Output Offset Drift 







40 


u.W°C 


IN 


Input Current 






0.6 5 


uA 


R|N 


Input Resistance 


V S = ±5V, V| N = ±2V 
V S = +15V, V| N = +2V 




1 5 

2 5 


M£2 
MQ 


C|N 


Input Capacitance 


Input Selected 
Input Deselected 




2.6 
2.6 


PF 
PF 


CoUT 


Disabled Output Capacitance 


EN Pin Voltage < 0.8V 




2.8 


PF 


m 


Input Voltage (Note 1) 


V s = ±5V 
V S = ±15V 




±2 ±2.8 
±2 ±3.0 


V 
V 


PSRR 


Power Supply Rejection Ratio 


V s = ±4.5to±15V 




60 70 


dB 




Gain Error 


V S = +15V, V, N = ±2V, R L = 1k 
V S = ±15V, V| N = ±2V, R L = 400fi 
V S = ±5V, V| N = ±2V, R|_ = 1k 




2 4 
6 10 

3 6 


% 
% 
% 



XTUDfflB 



2-375 



LT1203/LT1205 



€l€CTMCfll CHRRRCT6RISTICS 



C < T fl < 70 C, ±5V < V s < +15V, R L = 1k, pulse tested, EN pin open or high, unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS 


MIN 


TYP 


MAX 


UNITS 


VOUT 


Output Voltage 


V s = ±1 5V, V| N = ±2V, R L = 400ii 
V S = ±5V, V| N = ±2V, R L = 1k 


• 
• 


±1.8 
±1.8 


±1.90 
±1.94 




V 
V 




Overload Swing (Note 1) 


V S = ±15V, V| N = ±5V 

V$ XOV, V|fJ - tav 


• 




±0.9 
±0.9 


±1.5 
±1.5 


V 

v 


'out 


Ontnnt Purrpnt 

UULLJUl UUI 1 CI IL 


Vs = ±1 JV, V||sj = ±£V, n[_ 4UUL2 
V S = ±5V, V| N = ±2V, R L = 1k 


— 


±4.5 
±1.8 


±4.75 
±2.00 




mA 
mA 


Rout 


Enabled Output Resistance 
Disabled Output Resistance 


EN Pin Voltage = 2V, V 0UT = ±2V. V s = +1 5V 
EN Pin Voltage = 0.5V, V 0UT = ±2V, V s = ±1 5V 




1 


20 
10 


42 


a 
Ma 


Is 


Supply Current (LT1203) 


EN Pin Voltage = 2V 
EN Pin Voltage = 0.5V 






10.0 
5.8 


14 
8 


mA 
mA 




Supply Current (LT1 205) 


EN Pin Voltage = 2V 
EN Pin Voltage = 0.5V 






20.0 
11.6 


28 
16 


mA 
mA 


VlL 


Logic Low 


Logic Pin 




0.8 


V 


VlH 


Logic High 


Logic Pin 




2 


V 




Enable Low 


EN Pin 




0.5 


V 




Enable High 


EN Pin 






2 


V 


In. 


Digital Input Current Low 


LT1203 Pin 5.LT1205 Pins 9,13 = 0V 






1.5 


6.5 


MA 


I|H 


Digital Input Current High 


LT1203 Pin 5, LT1205 Pins 9,13 = 5V 






10 


200 


nA 


•en 


Enable Pin Current 


LT1203 Pin6,LT1205 Pins 10, 14 






20 


80 


uA 


RC CHRRflCTCRISTICS T A = 25 C. V s = ±15V, R L = 1k, EN pin open or high, unless otherwise noted. 


SYMBOL 


PARAMETER 


CONDITIONS 


MIN 


TYP 


MAX 


UNITS 


SR 


Slew Rate (Note 6) 






180 


300 




V/us 


FPBW 


Full Power Bandwidth (Note 7) 


VouT = 2V P .p 




28.6 


47.7 




MHz 


tsEL 


Channel-to-Channel Select Time (Note 8) 


R L = 10k 






25 


35 


ns 




Enable Time (Note 9) 


Rl = 1k 






25 


35 


ns 




Disable Time (Note 9) 


R L = 1k 






20 


35 


ns 


tr, tf 


Small-Signal Rise and Fall Time 


Vout = 250mV P .p, 10% to 90% 




2.6 


ns 




Propagation Delay 


V 0U T = 250mVp. P 




2.9 


ns 




Overshoot 


Vout = 250mV P . P 




5 


% 




Crosstalk (Note 10) 


R s = 10n 




90 


dB 




Chip Disabled Crosstalk (Note 10) 


Rl = 1 0£2, EN Pin Voltages 0.8V 




110 


dB 




Channel Select Output Transient 


All V| N = 0V 




50 


mVp.p 


ts 


Settling Time 


1%.Vo UT = 1V 




30 


ns 




Differential Gain (Note 11) 


V s = ±1 5V, R L = 10k 




0.02 


% 




Differential Phase (Note 11) 


V S = ±15V, R L = 10k 




0.02 


DEG 




Insertion Loss 


R L = 100k, C L = 30pF, V 0UT = 500mV P . P , f = 1MHz 




0.02 


dB 



The • denotes specifications which apply over the specified For inputs <±2.8V the SCR will not fire. Voltages above 2.8V will fire the 

temperature range. SCR and the DC current should be limited to 20mA. To turn off the SCR 

Note 1: The analog inputs (pins 1 , 3 for the LT1203, pins 1, 3, 5, 7 for the the pin voltage must be reduced to less than 1V or the current reduced to 

LT1 205) are protected against ESD and overvoltage with internal SCRs. less than 600pA 



2-376 



LT1203/LT1205 



Nate 2: The digital inputs (pins 5, 6 for the LT1 203, pins 9, 1 0, 1 3, 14 for 
the LT1205) are protected against ESD and overvoltage with internal 
SCRs. For inputs <+6V the SCR will not fire. Voltages above 6V will fire 
the SCR and the DC current should be limited to 50mA. To turn off the 
SCR the pin voltage must be reduced to less than 2V or the current 
reduced to less than 10mA. 

Note 3: A heat sink may be required depending on the power supply 
voltage. 

Note 4: Commercial grade parts are designed to operate over the 
temperature range of-40°C to 85°C but are neither tested nor guaranteed 
beyond 0°C to 70°C. Industrial grade parts specified and tested over 
-40°C to 85°C are available on special request, consult factory. 
Note 5: Tj is calculated from the ambient temperature T A and the power 
dissipation Pq according to the following formulas: 

LT1203CN8: Tj = T A + (P D x 100°C/W) 

LT1203CS8:Tj = T A + (P D x150°C/W) 

LT1205CS:Tj = T A + (P D x100 o C/W) 
Note 6: Slew rate is measured at ±2.0V on a ±2.5V output signal while 
operating on +1 5V supplies, R L = 1 k. 
Note 7: Full power bandwidth is calculated from the slew rate 
measurement: 

FPBW = SR/2tcV peak 
Note 8: For the LT1203, apply 1VDC to pin 1 and measure the time for the 
appearance of 0.5V at pin 7 when pin 5 goes from 5V to 0V. Apply 1 VDC 



to pin 1 and measure the time for disappearance of 0.5V at pin 7 when 
pin 5 goes from 0V to 5V. Apply 1 VDC to pin 3 and measure the time for 
the appearance of 0.5V at pin 7 when pin 5 goes from 0V to 5V. Apply 
1VDC to pin 3 and measure the time for disappearance of 0.5V at pin 7 
when pin 5 goes from 5V to 0V. For the LT1 205 the same test is 
performed on both MUXs. 

Note 9: For the LT1203, apply 1VDC to pin 1 and measure the time for the 
appearance of 0.5V at pin 7 when pin 6 goes from 0V to 5V. Pin 5 voltage 
= 0V. Apply 1VDC to pin 1 and measure the time for disappearance of 0.2V 
at pin 7 when pin 6 goes from 5V to 0V. Pin 5 voltage = 0V. Apply 1VDC 
to pin 3 and measure the time for the appearance of 0.5V at pin 7 when 
pin 6 goes from 0V to 5V. Pin 5 voltage = 5V. Apply 1VDC to pin 3 and 
measure the time for disappearance of 0.2V at pin 7 when pin 5 goes from 
5V to 0V. Pin 5 voltage = 5V. For the LT1205 the same test is performed 
on both MUXs. 

Note 10: V| N = OdBm (0.223V RM s) at 10MHz on one input with the other 
input selected and R$ = 10Q. For disable crosstalk all inputs are driven 
simultaneously. In disable the output impedance is very high and signal 
couples across the package; the load impedance determines the crosstalk. 
Note 11: Differential gain and phase are measured using a Tektronix 
TSG120 YC/NTSC signal generator and a Tektronix 1 780R video 
measurement set. The resolution of this equipment is 0.1% and 0.1°. 
Ten identical MUXs were cascaded giving an effective resolution of 
0.01% and 0.01°. 



TRUTH TABIC 



LOGIC 


EN 


VoUT 





1 


V|N0 


1 


1 


V IN1 





0* 


HIGH Zout 


1 





HIGH Zqut 



•Must be <0.5V 




2-377 



LT1203/LT1205 



TYPICAL P€RFOfimfinC€ CHRRRCT€RISTICS 



-3dB Bandwidth 
vs Supply Voltage 



Frequency Response 
with Capacitive Loads 



Crosstalk Rejection 
vs Frequency 




2 4 6 8 10 12 14 
SUPPLY VOLTAGE (±V) 

LTia03*5-TPC03 



Crosstalk Rejection 
vs Frequency 



1-50 

Leo 

> 

| -70 

: -80 
> 

> -90 

> 

-100 
-110 



T A = 25°C 
n. - no 
























"i. - 
R L = 






















































































































\ 


's 






v^ 


Vs 




.1 































































10 

FREQUENCY (MHz) 



Disable Rejection 
vs Frequency 



-20 

-30 

_-40 
m 

2- -50 

|-60 
o 

a _7 ° 

uj -80 

1 -90 
o 

-100 
-110 
-120 



V s = t15V 


























5-C 


























































































































1 


_ = 1k 
























































? L = 100 


Q 
































1t 


C 































10 

FREQUENCY (MHz) 



Power Supply Rejection Ratio 
vs Frequency 




10 

FREQUENCY (MHz) 



Output Impedance (Enabled) Supply Current Supply Current 

vs Frequency vs Supply Voltage (Enabled) vs Supply Voltage (Disabled) 




10 I— I — — 1 M l I — LLU 76 I 1 1 1 1 1 1 1 1 1 4.4 I 1 1 1 1 1 1 1 1 1 

10k 100k 1M 10M 100M 2 4 6 8 10 12 14 16 18 2 4 6 8 10 12 14 16 18 

FREQUENCY (Hz) SUPPLY VOLTAGE (±V) SUPPLY VOLTAGE (±V) 

LTIZOaOS'TPCTO LT1ZKWS-TPC10 LT1203W TPC11 



2-378 



LT1203/LT1205 



TYPICAL P€RFORITinnC€ CHflRnCT€RISTICS 



Gain Error vs Temperature 



Input Bias Current vs Input Voltage 



Output Voltage vs Input Voltage 



V S = ±15V 

V,„. = -2VT0 2V 














R L = 


00!! 






















































R L = 1k 





































-50 -25 25 50 75 100 
TEMPERATURE (°C) 



1.2 

1.0 

1 0.8 

1 0-6 
rx 

0.4 

00 

< 

m 0.2 
1— 

1 o 

-0.2 
-0.4 ' 



1 

V S =±15V 


















125°C^ 
















25 


C/ 


















j5°C 































































3 

_ 2 



V S = ±15V 
t. 9=; o r 
















1 q 


= 11 











































































































































-3 -2 -1 1 2 3 4 -5 -4 -3 -2 -1 1 2 3 4 5 

INPUT VOLTAGE (V) INPUT VOLTAGE (V) 



Settling Time to 1mV and 10mV 
vs Output Step 





2.0 




1.5 




1.0 


> 

Q. 


05 


— 




t- 











-0.5 


O 






-1.0 




-1.5 




-2.0 



















V s = ±15V 




1 


)mV 


/I 


TlV 




































































































1 


)mV 




Jm 


/ 



































100 200 300 400 500 
SETTLING TIME (ns) 

LI1Z0M6.TTC15 



Vim to Vino Select Time 




VOUT 
(PIN 7) 



LTI20W5.TPC13 



V S -±15V Vino = 1 V 
R L = 10k V IN1 = OV 



Small-Signal Rise Time 




R L = 1k 

V| N0 to V| N i Select Time 



LOGIC 
(PIN 5) 

VOUT 
(PIN 7) 











2 




4"» 




3 


















J 


f 






_ 












~ 

m 


: 






— 


* 














■ 


















! 
















,' 




; 


5U 


10 






10ns 





V S = ±15V V m0 = 1V 
R L = 10k V| N1 = OV 



2-379 



LT1203/LT1205 



tvpichl pcRFonmnncc c 



Channel 1 Enable 



Channel 1 Disable 



(PIN 6 



v OUT 
(PIN 7) 





t 




_J 




1 










i 


r 






311 IV 


IDii 


V S = ±15V V, B0 = 1V 
R L =1k V,„,=OV 


lT1W05*TFClf 




V S = +15V V m0 = W 
Ri = 1k V 1N , = OV 







'.'.it ground plane to ensure high channel separation. For 
minimum peaking, maximum bandwidth and maximum 
gain flatness sockets are not recommended because they 
can add considerable stray inductance and capacitance. If 
a socket must be used, use a low profile, low capacitance 
socket such as the SamTec ISO-308. 

Switching Transients 

The LT1 203/LT1 205 use input buffers to ensure switching 
transients do not couple to othervideo equipment sharing 
the input line. Output switching transients are about 
50mVp. P with a 20ns duration and input transients are 

LT1203 Channel-to-Channel Switching Transient 



nppucmions inFORmnnon 

Input Protection 

The logic inputs have ESD protection (>2kV) and short- 
ing them to 12V or 15V will cause excessive current to 
flow. Limit the current to less than 50mA when driving 
the logic above 6V. The analog inputs are protected 
against ESD and overvoltage with internal SCRs. For 
inputs >+2.8V the SCRs will fire and the DC current 
should be limited to 20mA. 

Power Supplies 

The LT1203/LT1205 will operate from ±5V (10V total) to 
±15V (30V total) and is specified over this range. Charac- 
teristics change very little over this voltage range. It is not 
necessary to use equal value supplies however, the output 
offset voltage will change. The offset will change about 
300uV per volt of supply mismatch. The LT1 203/LT1 205 
have a very wide bandwidth yet are tolerant of power 
supply bypassing. The power supplies should be by- 
passed with a 0.1 ufor0.01 ufceramiccapacitor within 0.5 
inch of the part. 

Circuit Layout 

Use a ground plane to ensure a low impedance ground is 
available throughout the PCB layout. Separate the inputs 




LOGIC 
(PIN 5) 



R s = 50!2 



2-380 



LT1203/LT1205 



flppucmions infonmnTion 

CMOS MUX Channel-to-Channel Switching Transient 




R s = 50!i 

NOTE: 50 TIMES LARGER THAN LT1203 TRANSIENT 



LT1203 Switching Inputs 



LOGIC 
(PIN 5) 



OUTPUT 
(PIN 7) 













IH 














\ 


















IL 






w 










u 




_ 


20 


if 



CHANNEL 1 = 0V 

CHANNEL 2 = 2MHz SINEWAVE 



only 1 0mVp.p. A photo of the switching transients from a 
CMOS MUX shows glitches to be 50 times larger than on 
the LT1203. Also shown is the output of the LT1203 
switching on and off a 2MHz sinewave cleanly and without 
abnormalities. 

Pixel Switching 

The multiplexers are fabricated on LTC's Complementary 
Bipolar Process to attain fast switching speed, high band- 
width, and a wide supply voltage range compatible with 
traditional video systems. Channel-to-channel switching 
time and Enable time are both 25ns, therefore delay is the 
same when switching between channels or between ICs. 
To demonstrate the switching speed of the LT1 203/LT1 205 
the RGB MUX of Figure 1 is used to switch RGB Worksta- 
tion inputs with a 22ns pixel width. Figure 2a is a photo 
showing the Workstation output and RGB MUX output. 
The slight rise time degradation at the RGB MUX output is 
due to the bandwidth of the LT1260 current feedback 
amplifier used to drive the 75Q cable. In Figure 2b, the 
LT1 203 switches to an input at zero at the end of the first 
pixel and removes the following pixels. 




Figure 1. RGB MUX 



2-381 



LT1203/LT1205 



nppucnnons mFORmnnon 




LT1Ml/W'F02i 

Figure 2a. Workstation and RGB MUX Output 




Figure 2b. RGB MUX Output Switched to Ground 
After One Pixel 

Demonstration Board 

A Demonstration Board (#041 ) of the RGB MUX in Figure 
1 has been fabricated and its layout is shown in Figure 3. 
The small-signal bandwidth of the RGB MUX is set by the 
bandwidth of the LT1260. The stray capacitance of the 
surface mount feedback resistors Rp and Rg restricts the 
-3dB bandwidth to about 95MHz. The bandwidth can be 
improved by about 20% using the through-hole LT1 260 
and components. A frequency response plot in Figure 4 
shows that the R, G, and B amplifiers have slightly 
different frequency responses. The difference in the G 
amplifier is due to different output trace routing to 
feedback resistor R13. 



V S = ±15V 

o tcjln 
















"L 


= 1 


G 




! 3 


k 
























































R 


B 



















































































































1 10 100 1000 

FREQUENCY (MHz) 



Figure 4. RGB MUX Frequency Response of 
Demonstration Board #041 

Input Expansion 

The output impedance of the LT1203/LT1 205 is typically 
20Q when enabled and 10MQ when disabled or not 
selected. This high disabled output impedance allows the 
output of many LT1205s to be shorted together to form 
large crosspoint arrays. With their outputs shorted to- 
gether, shoot-through current is low because the "on" 
channel is disabled before the "off" channel is activated. 



Timing and Supply Current Waveforms 




5V/DIV 
5V/DIV 



Four LT1205s are used in Figure 5 to form a 16-to-1 
multiplexer which is very space efficient and uses only six 
SO packages. In this application 1 5 switches are turned off 
and only one is active. An attenuator is formed by the 15 
deselected switches and the active device which has an 



2-382 



LT1203/LT1205 



041A 




L1I!05TO'FQ3 



Figure 3. Demo Board #041 Layout 



XTUOS38 



— 



2-383 



LT1203/LT1205 



nppLicnTions inFonmrmon 




OUTPUT 



Figure 5. 16-to-1 Multiplexer and Truth Table 



2-384 



LT1203/LT1205 



nppucATions inFORmnnon 

output impedance of only 250. at 1 0MHz. This attenuator 
is responsible for the outstanding All Hostile Crosstalk 
Rejection of 90dB at 1 0MHz with 1 5 input signals. 

Several suggestions to attain this high rejection include: 

1 . Mount the feedback resistors for the surface mount 
LT1252 on the back side of the PC board. 

2. Keep the feedback trace (pin 3) of the LT1 252 as short 
as possible. 

3. Route V + and V" for the LT1 205s on the component 
(top) side and underthe devices (between inputs and 
outputs). 

4. Use the backside of the PC board as a solid ground 
plane. Connect the LT1205 device grounds and by- 
pass capacitors grounds as vias to the backside 
ground plane. 

16-10-1 MUX, Switching LT1205 Enable Lines 




16-to-1 Multiplexer All Hostile Crosstalk Rejection 



-120 



v s = 


i15V 






























"%= 


ion 
moo 
















































































































if 


y 


































































































y 






















































r 




\ 


i 

























16-to-1 MUX Response 



V s = t15V 
























-%- 


oon 

























































































































































































































































































10 

FREQUENCY (MHz) 



100 



10 100 
FREQUENCY (MHz) 

LTnw>NH 



Each "off" switch has 2.8pF of output capacitance and 15 
"off" switches tied together represent a 48pF load to the 
one active switch. In this case the active device will peak 
about 3dB at 50MHz. An attribute of current feedback 
amplifiers is that the bandwidth can easily be adjusted by 
changing the feedback resistors, and in this application 
the LT1 252's bandwidth is reduced to about 60MHz using 
1 .6k feedback resistors. This has the effect of reducing the 
peaking in the MUX to 0.25dB and flattening the response 
to 0.05dB at 30MHz. 

4x4 Crosspoint 

The compact high performance 4x4 crosspoint shown in 
Figure 6 uses four LT1 205s to route any input to any or all 
outputs. The complete crosspoint uses only six SO pack- 
ages and less than six square inches of PC board space. 
The LT1254 quad current feedback amplifier serves as a 
cable driver with a gain of 2. A±5Vsupply is used to ensure 
that the maximum 150°C junction temperature of the 
LT1254 is not exceeded in the SO package. With this 
supply voltage the crosspoint can operate at a 70°C 
ambient temperature and drive 2V (peak or DC) into a 
double-terminated 750 video cable. The feedback resis- 
tors of these output amplifiers have been optimized for 
this supply voltage. The-3dB bandwidth of the crosspoint 
is over 100MHz with only 0.8dB of peaking. All Hostile 
Crosstalk Rejection is 85dB at 10MHz when a shorted 
input is routed to all outputs. To obtain this level of 
performance it is necessary to followtechniques similarto 



XTffiAE) 



2-385 



LT1203/LT1205 



nppucnTions inFORmnnon 

-5V 5V GND 




SELECT LOGIC 


INPUT 


A 


B 


CHANNEL 


L 


L 


CHO 


L 


H 


CH1 


H 


L 


CH2 


H 


H 


CH3 



SELECT LOGIC SELECT LOGIC SELECT LOGIC SELECT LOGIC 
OUTPUT OUTPUT 1 OUTPUT 2 OUTPUT 3 



Figure 6.4x4 Crosspoint and Truth Table 



2-386 



LT1203/LT1205 



nppucmions inponmmion 

those used in the 1 6-to-1 crosspoint with one additional 
suggestion: SurroundtheLTI 205 outputtraces by ground 
plane and route them away from the (-) inputs of the 
other three LT1 254s. 

Each pair of logic inputs labeled Select Logic Output is 
used to select a particular output. The truth table is used 
to select the desired input and is applied to each pair of 
logic inputs. For example, to route Channel 1 Input to 



Output 3, the 4th pair of logic inputs labeled Select Logic 
Output 3 is coded A = Low and B = High. To route 
Channel 3 Input to all outputs, set all eight logic inputs 
High. Channel 3 is the default input with all logic inputs 
open. To shut off all channels a pair of LT1 259s can be 
substituted forthe LT1 254. The LT1 259 is a dual current 
feedback amplifier with a shutdown pin that reduces the 
supply current to OuA 




CHANNEL 0= 1V 
CHANNEL 2 = OV 



LT1203/LT1205 



simpuFicD scHcmnnc 



—Or 



ENABLE Q 

LOGIC □ 




i 



QlNO INl[~|— 11 




J— 2V 



-vw 



I «-|~~|0LlT 



J' 



-Qv- 




2-388 



TECHNOLOGY 



F€ATUR€S 

■ 0.1dB Gain Flatness > 30MHz 

■ Channel Separation at 10MHz: 90dB 

■ 40mV Switching Transient, Input Referred 

■ -3dB Bandwidth, A v = 2, R L = 150D: 75MHz 

■ Channel-to-Channel Switching Time: 120ns 

■ Easy to Expand for More Inputs 

■ Large Input Range: ±6V 

■ 0.04% Differential Gain, R L = 150ft 

■ 0.06° Differential Phase, R L = 150ft 

■ High Slew Rate: lOOOV/us 

■ Output Swing, R L = 400ft: ±1 3V 

■ Wide Supply Range: +5V to +15V 

nppucOTions 

■ Broadcast Quality Video Multiplexing 

■ Large Matrix Routing 

■ Medical Imaging 

■ Large Amplitude Signal Multiplexing 

■ Programmable Gain Amplifiers 



LT12Q4 

4-lnput Video Multiplexer 
with 75MHz Current 
Feedback Amplifier 

DCSCMPTIOn 

The LT1204 is a 4-input video multiplexer designed to 
drive 75ft cables and easily expand into larger routing 
systems. Wide bandwidth, high slew rate, and low differ- 
ential gain and phase make the LT1 204 ideal for broadcast 
quality signal routing. Channel separation and disable 
isolation are greater than 90dB up to 1 0MHz. The channel- 
to-channel output switching transient is only 40mV P -p, 
with a 50ns duration, making the transition imperceptible 
on high quality monitors. 

A unique feature of the LT1 204 is its ability to expand into 
larger routing matrices. This is accomplished by a patent 
pending circuit that bootstraps the feedback resistors in 
the disable condition, raising the true output impedance of 
the circuit. The effect of this feature is to eliminate cable 
misterminations in large systems. 

The large input and output signal levels supported by the 
LT1 204 when operated on ±1 5V supplies make it ideal for 
general purpose analog signal selection and multiplexing. 
A shutdown feature reduces the supply current to 1 .5mA. 




2-389 



LT1204 



absolute mnximum RRTinGs 

Supply Voltage ±18V 

-Input Current (Pin 13) ±15mA 

+lnput and Control/Logic Current (Note 1) +50mA 

Output Short-Circuit Duration (Note 2) Continuous 

Specified Temperature Range (Note 3) 0°C to 70°C 



Operating Temperature Range -40°C to 85°C 

Storage Temperature Range -65°C to 150°C 

Junction Temperature (Note 4) 150°C 

Lead Temperature (Soldering, 10 sec) 300°C 



PRCKRG€/ORD€R IflFORmflTIOn 





TOP VIEW 




ORDER PART 






TOP VIEW 




ORDER PART 


Vino LI 


— <u — 


Tji] V* 


NUMBER 


Vino EH 


TJ] V* 


NUMBER 


GND [T 




TH v 




GND [7 






H v 




VlN l LI 




u\ V 


LT1204CN* 


VlNl LI 






14] V" 


LT1204CS* 


GND [T 




13] FB 




GND [T 






TJ FB 




V| N2 U 




TJ] STD 




V|N2 LI 






12] s/d 




GND \T 




UJ ENABLE 




GND LI 






1lJ ENABLE 




V|N3 E 




To] A1 




Vin3 Li 






10] A1 




REF (T 




T] AO 




REF LI 






9] AO 






N PACKAGE 








_ 




S PACKAGE 






16-LEAD PLASTIC [ 


IP 




16-LEAD PLASTIC SOL 




Tj MAX = 150=C,6j A = 70-C/W 




Tjmax 


= 150"C,8j» = 90"C/W 





*See Note 3 

Consult factory for Industrial and Military grade parts. 



eiecTfiicni cHnnnacRisTics 

C < T A < 70 C, ±5V < V s < ±15V, V C M = 0V, Pin 8 grounded and pulse tested unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS 


MIN TYP MAX 


UNITS 


Vos 


Input Offset Voltage 


Any Positive Input, T A = 25°C 


• 


5 14 
16 


mV 
mV 




Offset Matching 


Between Any Positive Input, V s = ±15V 


• 


0.5 5 


mV 




Input Offset Voltage Drift 


Any Positive Input 


• 


40 


LlV/°C 


l|N + 


Positive Input Bias Current 



Any Positive Input, T A = 25°C 


• 


3 8 
10 


uA 
uA 


l|N~ 


Negative Input Bias Current 


T A = 25°C 


• 


±10 ±50 
±75 


uA 
uA 


e n 


Input Noise Voltage 


f = 1kHz, Rf = 1 k, R G = 10n, R s = on 




7 


nV/VRz 


+ in 


Noninverting Input Noise Current Density 


f = 1 kHz 




1.5 


pA/VHz 


-in 


Inverting Input Noise Current Density 


f = 1 kHz 




40 


pA/VHz 


C|N 


Input Capacitance 


Input Selected 
Input Deselected 




3.0 
3.5 


PF 
PF 


CoUT 


Output Capacitance 


Disabled, Pin 11 Voltage = 0V 




8 


PF 


RlN 


Positive Input Resistance, Any Positive Input 


V s = ±5V, V| N =-1.5V,2V,T A = 25°C 
V S = +15V, V| N = +5V 


• 


5 20 
4 20 


M£2 

un 



2-390 



LT1204 



Cl€CTRKfll CHRRRCT€RISTICS 

C < T A < 70 C, ±5V < V s < ±15V, V CM = 0V, Pin 8 grounded and pulse tested unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS 


MIN 


TYP 


MAX 


UNITS 




Input Voltage Range, Any Positive Input 


Vs = ±5V, Ta = 25°C 
Vs = ±1 5V 

V S = ±15V, Pin 8 Voltage = -5V 


• 


2.0 
-1.5 
±5.0 

3.75 


2.5 
-2.0 
±6.0 

4.0 




V 
V 
V 
V 


CMRR 


Common-Mode Rejection Ratio 


Vc - +5V v... - - 1 5V 2V Ta - 25°C 
V S = ±15V,V CM = ±5V 




OO CO 


55 
58 




dB 
dB 




Negative Input Current 
Common-Mode Rejection 


V s = ±5V, V CM = -1.5V, 2V, T A = 25°C 
V S = ±15V,V CM = ±5V 


• 




0.05 
0.05 


1 
1 


|WV 
uA/V 


PSRR 


Power Supply Rejection Ratio 


W l/1 EW +n -1-1 

VS - X4.0V lU X I Ov 




60 


76 




dB 




Wpnatiup Innut Hiirrpnt Pnwpr Rnnnlv Rpiprfinn 


V s = ±4.5Vto±15V 


• 




0.5 


5 


HA/V 


Avol 


Large-Signal Voltage Gain 


V S = ±15V, V 0UT = ±10V, R L = 1k 
V S = ±5V, V 0U T = ±2V, R L = 150Q 


* 


57 
57 


73 
66 




dB 
dB 


Rol 


Transresistance 


V S = ±15V,V OU T = ±10V, R L = 1k 
V s = +5V, Vqut = ±2V. Rl = 150Q 




115 
115 


310 
210 




kn 
k£J 


VOUT 


Output Voltage Swing 


V S = ±15V, R L = 400Q, T A = 25°C 


• 


±12 
±10 


±13.5 




V 
V 






V S = ±5V, R L = 150Q,T A = 25 o C 




±3.0 
±2.5 


±3.7 




V 
V 


I OUT 


Output Current 


R L = OH, T A = 25°C 




35 


55 


125 


mA 


Is 


Supply Current (Note 5) 


Pin 11 =5V 
Pin 11 = 0V 
Pin 12 = 0V 






19 
19 

1.5 


24 
24 
3.5 


mA 
mA 
mA 




Disabled Output Resistance 


V S = ±15V, Pin 1 1 = 0V, V = ±5V, 
R F = R G = 1k 




14 


25 




kfi 






V S = ±15V, Pin 11 =0V,V o = ±5V, 
R F = 2k, R G = 222JJ 




8 20 


kn 


DIGITAL IHPUT CHRRRCTCRISTICS 

0°C < T A < 70°C, V s = ±15V, Rp = 2k, R G = 220Q, R L = 400£2 unless otherwise noted. 












SYMBOL 


PARAMETER 


CONDITIONS 


MIN 


TYP 


MAX 


UNITS 


VlL 


Input Low Voltage 


Pins 9,10,11,12 




0.8 


V 


VlH 


Input High Voltage 


Pins 9,10,11,12 




2 


V 


IlL 


Input Low Current 


Pins 9, 1 Voltage = 0V 






1.5 


6 


uA 


l|H 


Input High Current 


Pins 9, 10 Voltage = 5V 






10 


150 


nA 




Enable Low Input Current 


Pin 1 1 Voltage = 0V 






4.5 


15 


MA 




Enable High Input Current 


Pin 11 Voltage = 5V 






200 


300 


uA 


IsTB 


Shutdown Input Current 


Pin 12 Voltage 0V<Vs7B<5V 






20 


80 


uA 


tsel 


Channel-to-Channel Select Time (Note 6) 


Pin 8 Voltage = -5V,T A = 25°C 






120 


240 


ns 


tdis 


Disable Time (Note 7) 


Pin 8 Voltage = -5V, T A = 25°C 






40 


100 


ns 


ten 


Enable Time (Note 8) 


Pin 8 Voltage = -5V, T A = 25°C 






110 


200 


ns 


tsTfj 


Shutdown Assert or Release Time (Note 9) 


Pin 8 Voltage = -5V,T A = 25°C 






1.4 


3.4 


MS 



2-391 



LT1204 



IK CHARflCTCRISTICS 



T A = 25°C, V s = +15V, Rp = Rq = 1k, unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS 


MIN TYP MAX 


UNITS 


tr.tf 


Small-Signal Rise and Fall Time 


R L = 150Q,V OU T = ±125mV 


5.6 


ns 


SR 


Slew Rate (Note 10) 


R L = 400Q 


500 1000 


V/us 




Channel Select Output Transient 


All V| N = 0V, R L = 400ft Input Referred 


40 


mV 


ts 


Settling Time 


0.1%, V 0UT = 10V, R L = 1k 


70 


ns 




All Hostile Crosstalk (Note 11) 


SO PCB #028, R L = 100ft R s = 1 On 


92 


dB 




Disable Crosstalk (Note 11) 


SO PCB #028, Pin 1 1 Voltage = OV, R L = 1 00ft R s = 50Q 


95 


dB 




Shutdown Crosstalk (Note 11) 


SO PCB #028, Pin 12 Voltage = 0V, R L = 100ft R s = 50S2 


92 


dB 




All Hostile Crosstalk (Note 11) 


P-DIP PCB #029, R L = 100ft R s = 10£2 


76 


dB 




Disable Crosstalk (Note 11) 


P-DIP PCB #029, Pin 1 1 Voltage = OV, R L = 1 00ft R s = 50Q 


81 


dB 




Shutdown Crosstalk (Note 11) 


P-DIP PCB #029, Pin 12 Voltage = OV, R L = 100ft R s = 50O 


76 


dB 




Differential Gain (Note 12) 


V S = ±15V, R L = 150£2 
V S = ±5V, R L = 150Q 


0.04 
0.04 


% 
% 




Differential Phase (Note 12) 


V S = ±15V, R L = 150n 
V S = ±5V, R L = 150a 


0.06 
0.12 


DEG 
DEG 



The • denotes specifications which apply over the specified operating 
temperature range. 

Note 1: Analog and digital inputs (Pins 1, 3, 5, 7, 9, 10, 11 and 12) are 
protected against ESD and overvoltage with internal SCRs. For inputs 
< ±6V the SCR will not fire, voltages above 6V will fire the SCRs and 
the DC current should be limited to 50mA. To turn off the SCR the pin 
voltage must be reduced to less than 2V or the current reduced to less 
than 10mA. 

Note 2: A heat sink may be required depending on the power supply 
voltage. 

Note 3: Commercial grade parts are designed to operate over the 
temperature range of -40°C to 85°C but are neither tested nor 
guaranteed beyond 0°C to 70°C. Industrial grade parts specified and 
tested over -40°C to 85°C are available on special request. Consult 
factory. 

Note 4: Tj is calculated from the ambient temperature T A and power 
dissipation Pp according to the following formulas: 

LT1204CN: Tj = T A + (P D x 70°C/W) 

LT1 204CS: Tj = T A + (P D x 90°C/W) 
Note 5: The supply current of the LT1204 has a negative temperature 
coefficient. For more information see Typical Performance 
Characteristics. 

Note 6: Apply 0.5V DC to Pin 1 and measure the time for the 
appearance of 5V at Pin 1 5 when Pin 9 goes from 5V to OV. Pin 1 
Voltage = OV. Apply 0.5V DC to Pin 3 and measure the time for the 
appearance of 5V at Pin 15 when Pin 9 goes from OV to 5V. Pin 10 
Voltage = OV. Apply 0.5V DC to Pin 5 and measure the time for the 



appearance of 5V at Pin 15 when Pin 9 goes from 5V to OV. Pin 10 
Voltage = 5V. Apply 0.5V DC to Pin 7 and measure the time for the 
appearance of 5V at Pin 15 when Pin 9 goes from 0V to 5V. Pin 1 
Voltage = 5V. 

Note 7: Apply 0.5V DC to Pin 1 and measure the time for the 
disappearance of 5V at Pin 15 when Pin 11 goes from 5V to 0V. 
Pins 9 and 10 are at 0V. 

Note 8: Apply 0.5V DC to Pin 1 and measure the time for the 
appearance of 5V at Pin 1 5 when Pin 1 1 goes from 0V to 5V. 
Pins 9 and 1 are at 0V. Above a 1 MHz toggle rate, t en reduces. 
Note 9: Apply 0.5V DC at Pin 1 and measure the time for the 
appearance of 5V at Pin 15 when Pin 1 2 goes from 0V to 5V. 
Pins 9 and 1 are at 0V. Then measure the time for the disappearance 
of 5V DC to 500m V at Pin 15 when Pin 12 goes from 5V to 0V. 
Note 10: Slew rate is measured at ±5V on a ±10V output signal while 
operating on ±15V supplies with R F = 2k, R G = 220£2 and R L = 400ii. 
Note 11: V| N = OdBm (0.223V RMS ) at 10MHz on any 3 inputs with the 
4th input selected. For Disable crosstalk and Shutdown crosstalk all 4 
inputs are driven simultaneously. A 6dB output attenuator is formed by 
a 50£i series output resistor and the 50£2 input impedance of the 
HP41 95A Network Analyzer. R F = R G = 1 k. 
Note 12: Differential Gain and Phase are measured using a Tektronix 
TSG120 YC/NTSC signal generator and a Tektronix 1780R Video 
Measurement Set. The resolution of this equipment is 0.1% and 0.1°. 
Five identical MUXs were cascaded giving an effective resolution of 
0.02% and 0.02°. 



2-392 



LT1204 



TVPICflL IK PCRFORffiRRCC Measurements taken from SO Demonstration Board #028. 













SMALL SIGNAL 


SMALL SIGNAL 


SMALL SIGNAL 


V S (V) 






RV(Q) 


Rg(") 


-3dB BW (MHz) 


0.1 dB BW (MHz) 


PEAKING (dB) 


±15 


1 


150 


1.1k 


None 


88.5 


48.3 


0.1 






1k 


1.6k 


None 


95.6 


65.8 





±12 


1 


150 


976 


None 


82.6 


49.1 


0.1 






1k 


1.3k 


None 


90.2 


63.6 


0.1 


±5 


1 


150 


665 


None 


65.5 


43.6 


0.1 






1k 


866 


None 


68.2 


42.1 


0.1 


±15 


2 


150 


787 


787 


75.7 


45.8 









1k 


887 


887 


82.2 


61.3 


0.1 


±12 


2 


150 


750 


750 


71.9 


45.0 









1k 


845 


845 


77.5 


52.1 





±5V 


2 


150 


590 


590 


58.0 


32.4 









1k 


649 


649 


62.1 


42.7 


0.1 


±15 


10 


150 


866 


95.3 


44.3 


28.7 


0.1 






1k 


1k 


110 


47.4 


30.9 


0.1 


±12 


10 


150 


825 


90.9 


43.5 


27.2 









1k 


931 


100 


46.3 


32.1 


0.1 


±5 


10 


150 


665 


73.2 


37.2 


22.1 









1k 


750 


82.5 


39.3 


27.8 


0.1 



TRUTH TRBl€ 











CHANNEL 


A1 


AO 


ENABLE 


SHUTDOWN 


SELECTED 








1 




V|N0 





1 


1 




V IN 1 


1 





1 




V|N2 


1 


1 


1 




V|N3 


X 


X 







High Z Output 


X 


X 


X 





Off 



2-393 



LT1204 



Tvpicnt p€RFORmnnc€ charactcristics 



±12V Frequency Response, A v = 1 



±5VFreque :y Response, Av = 1 




10M 100M 
FREQUENCY (Hz) 



±12V Frequency Response, Av = 2 




10M 100M 
FREQUENCY (Hz) 



LT1204 "TPCO? 



±12V Frequency Response, A v = 10 




10M 100M 
FREQUENCY (Hz) 



1G 























l 

= i5V 
= 150 
= fi<tf 


I 

) J 














AS 


: 




Rl 
-Rj 






































































r> 




N 


















































































\ 





































































10M 100M 
FREQUENCY (Hz) 



1G 



-20 
-40 
-60 
-80 j 

-ioo : 

-120 E 
-140 
-160 
-180 
-200 



i naw - wgm 



±5V Frequency Response, A v = 2 




10M 100M 
FREQUENCY (Hz) 



±5V Frequency Response, A v = 10 








24 


-20 




23 


-40 




22 


-60 




21 


-80 | 

m 

-100 ™ 
o 

-120 5 


s 

1 


20 
19 
18 


-140 




17 


-160 




16 


-180 




15 


-200 




14 







N 


















I I I f 1 1 1 1 
= ±5V 
= 1 5012 
= 665ii 
= 73 21! 






















Rl 

-Hp 














IS 








H 










































> 


c 


A 












































































































\ 







































10M 100M 
FREQUENCY (Hz) 





-20 
-40 
-60 

-80 | 
v> 

-100 ™ 
o 

-120 5 

-140 

-160 

-180 

-200 



LT12W • TPC06 



2-394 



LT1204 



TYPICni P€RFORfflRRC€ CHRRRCT€RISTICS 



Maximum Undistorted Output 
vs Frequency 




Maximum Capacitive Load 
vs Feedback Resistor 




1 2 
FEEDBACK RESISTOR (k£J) 



Total Harmonic Distortion 
vs Frequency 



=V s = t15V 
~R L = 40012 
R r = = 1k 














































































































V 


3 




































































































»0= ,V RMS 

































































100 1k 10k 
FREQUENCY (Hz) 



LTT20J-TPCM 



• 15V All Hostile Crosstalk 
vs Frequency 




±5V All Hostile Crosstalk 
vs Frequency 



All Hostile Crosstalk vs Frequency, 
Various Source Resistance 



-20 
-30 
-40 
-50 
-60 
-70 
-80 
-90 
-100 
-110 
-120 



V S =±5V 
~R L =10012 
_R F = R G = 1k 

R s = 0£i 


























































1 r L 


□ i 


U 




























































































'anyc 


HAN 


NE 































































































10 

FREQUENCY (MHz) 




LT12M-TPC12 



Disable and Shutdown Crosstalk 
vs Frequency 



V S = ±15V 
R L = 10012 
_R F = R G = 1k 
Rs = 5012 
DEMO PCB #028 
ALL CHANNELS DRIVEN 




10 

FREQUENCY (MHz) 



Spot Noise Voltage and Current 
vs Frequency 




100 1k 10k 

FREQUENCY (Hz) 



Amplifier Output Impedance 
vs Frequency 



V s -t1SV 






























































































































































































































Fi 


B = 


"g 




?/ 
























































































Hpg = Kq = '5012 






















1 Mil 1 







100k 1M 10M 
FREQUENCY (Hz) 



100M 



XTU) 



2-395 



LT1204 



TYPICAL P€RFORmnnC€ CHRRRCTCRISTICS 



Output Disable V-l Characteristic 





150 




100 








50 


DC 




cc 
=3 





O 




ZD 


-50 


ZD- 


100 


O 






150 




200 



I I I 
V S = ±15V 


















= 1» 




















































































/\ 




















SLC 


\ 
PE = 


1/1! 


k 





























































-5 -4 -3 -2 -1 1 2 3 4 5 
OUTPUT VOLTAGE (V) 

LT12M.TPC16 

Input Voltage Range 
vs Pin 8 Voltage 















-V 


= ±15V- 
= 1 














-A, 










































































































-55°C,25°C, 125°C 





























































































































-1 -2 -3 -4 -5 -6 -7 -8 -9 
VOLTAGE ON PIN 8 (V) 



Disabled Output Impedance 
vs Frequency 



Maximum Channel Switching 
Rate vs Pin 8 Voltage 




4 






V|N = 1V 0C 








I 


L = iuu 
FB = RC 


= 1k 











































































10k 100k 1M 10M 100M 
FREQUENCY (Hz) 

LT1804.TPC18 



1 1.5 2 2.5 3 3.5 4 
CHANNEL SWITCHING RATE (MHz) 

LT1HW-TPC17 



Input Voltage Range 
vs Supply Voltage 



Rejection 




2 4 6 8 10 12 14 16 
SUPPLY VOLTAGE (±V) 



100k 1M 10M 
FREQUENCY (Hz) 



LTC12M-TPC20 



Output Saturation Voltage 
vs Temperature 



v* 

£-0.5 
f -1.0 



R L = 













































































































-50 -25 25 50 75 100 125 
TEMPERATURE (°C) 

LT1Z04-TPG21 



Output Short-Circuit Current 
vs Temperature 




-50 -25 25 50 75 100 125 
TEMPERATURE (°C) 

LI1ZW-TPCK 



Settling Time to 10mV 
vs Output Step 



a 2 

£ o 

I -2 

° -4 



I I 

V S = ±15V 














Rf 


= Rc 


= 1 

















































































































































































40 50 60 70 80 
SETTLING TIME (ns) 

LT12M-TPCZ3 



2-396 



LT1204 



TYPICAL f>€RFORmnnC€ CHRRRCTCRISTICS 



Settling Time to 1mV 
vs Output Step 



I I 

V S = ±15V 














Rf 


= Rc 


= 1 

















































































































































































4 6 8 10 12 14 16 18 20 
SETTLING TIME {(is) 



Enabled Supply Current 
vs Supply Voltage 













































-5 


)=C 


































""25 


•c 




















































12 


•0 















































2 



4 6 8 10 12 14 16 18 
SUPPLY VOLTAGE (±V) 



Disabled and Shutdown Supply 
Current vs Supply Voltage 















































12 


V 


































-"25 


















-5 




53, 
















































-55 


C, 25 


°C, 1 


25"C 




-l£ 


ID 





















4 6 8 10 12 14 
SUPPLY VOLTAGE (±V) 



LTie«-TPCZ5 



RPPLICRTIOflS IRFORRIRTIOn 

Logic Inputs 

The logic inputs of the LT1 204 are compatible with all 5V 
logic. All pins have ESD protection (>2kV), and shorting 
them to 12V or 1 5V will cause excessive currents to flow. 
Limit the current to less than 50mA when driving the logic 
above 6V. 

Power Supplies 

The LT1204 will operate from +5V (10V total) to +15V 
(30V total) and is specified over this range. It is not 
necessary to use equal value supplies, however, the offset 
voltage and inverting input bias current will change. The 
offset voltage changes about 600llV per volt of supply 
mismatch. The inverting bias current changes about 2.5(iA 
per volt of supply mismatch. The power supplies should 
be bypassed with quality tantalum capacitors. 

Feedback Resistor Selection 

The small-signal bandwidth of the LT1204 is set by the 
external feedback resistors and internal junction capaci- 
tors. As a result the bandwidth is a function of the supply 
voltage, the value of the feedback resistor, the closed- 
loop gain and the load resistor. These effects are outlined 
in the resistor selection guide of the Typical AC Perfor- 
mance table. Bandwidths range as high as 95MHzand are 



specified over a very wide range of conditions. An advan- 
tage of the current feedback topology used in the LT1 204 
is well-controlled frequency response. In all cases of the 
performance table the peaking is 0.1 dB or less. If more 
peaking can be tolerated, larger bandwidths can be 
obtained by lowering the feedback resistor. For gains of 
2 or less, the 0.1 dB bandwidth is greater than 30MHz for 
all loads and supply voltages. 

At high gains (low values of Rq) the disabled output 
resistance drops slightly due to loading of the internal 
buffer amplifier as discussed in Multiplexer Expansion. 

Small-Signal Rise Time, Ay = 2 




V S = ±1SV R F = 1k 
R L =150£i R G = 1k 



XTffiAg 



2-397 



LT1204 



nppucRTions inFORmnnon 

Capacitance on the Inverting Input 

Current feedback amplifiers require resistive feedback 
from the output to the inverting input for stable operation. 
Take care to minimize the stray capacitance between the 
output and the inverting input. Capacitance on the invert- 
ing input to ground will cause peaking in the frequency 
response and overshoot in the transient response. 

Capacitive Loads 

The LT1 204 can drive capacitive loads directly when the 
proper value of feedback resistor is used. The graph of 
Maximum Capacitive Load vs Feedback Resistor should 
be used to select the appropriate value. The value shown 
is for 5dB peaking when driving a 1k load at a gain of 2. 
This is a worst case condition. The amplifier is more 
stable at higher gains and driving heavier loads. Alterna- 
tively, a small resistor (1 0£2 to 20D) can be put in series 
with the output to isolate the capacitive load from the 
amplifier output. This has the advantage that the ampli- 
fier bandwidth is only reduced when the capacitive load 
is present. The disadvantage is that the gain is a function 
of load resistance. 

Slew Rate 

The slew rate of the current feedback amplifier on the 
LT1204 is not independent of the amplifier gain the way 
slew rate is in a traditional op amp. This is because both the 
input and the output stage have slew rate limitations. In 
high gain settings the signal amplitude between the nega- 
tive input and any driven positive input is small and the 
overall slew rate is that of the output stage. For gains less 
than 1 0, the overall slew rate is limited by the input stage. 

The input slew rate of the LT1 204 is approximately 1 35V/ 
(js and is set by internal currents and capacitances. The 
output slew rate is set by the value of the feedback 
resistors and the internal capacitances. At a gain of 1 with 
a 1 k feedback resistor and ±1 5 supplies, the output slew 
rate is typically 1000V/ns. Larger feedback resistors will 
reduce the slew rate as will lower supply voltages, similar 
to the way the bandwidth is reduced. 

The graph, Maximum Undistorted Output vs Frequency, 
relates the slew rate limitations to sinusoidal inputs for 
various gain configurations. 



Large-Signal Transient Response 




V S = ±15V fl F =1k 
A v = 2 R 3 = 1k 
R L = «on 



Large-Signal Transient Response 
IIiMH 




Switching Characteristics and Pin 8 

Switching between channels is a "make-before-break" 
condition where both inputs are on momentarily. The 
buffers isolate the inputs when the "make-before-break" 
switching occurs. The input with the largest positive 
voltage determines the output level. If both inputs are 
equal, there is only a 40mV error at the input of the CFA 
during the transition. The reference adjust (pin 8) allows 
the user to trade off positive input voltage range for 
switching time. For example, on ±15V supplies, setting 
the voltage on pin 8 to -6.8V reduces the switching 
transient to a 50ns duration, and reduces the positive input 
range from 6V to 2.35V. The negative input range remains 
unchanged at-6V. When switching video "in picture," this 
short transient is imperceptible even on high quality 



2-398 



LT1204 



nppucOTions inFORmnnon 



monitors. The reference pin has no effect when the LT1 204 
is operating on ±5V, and should be grounded. On supply 
voltages above +8V, the range of voltages for pin 8 should 
be between -6.5V and -7.5V. Reducing pin 8 voltage 
below -7.5V turns "on" the "off" tee switch, and the 
isolation between channels is lost. 

Channel-to-Channel Switching 



Competitive MUXs 



Vout PIN 15 




V| N o AND V| N , CONNECTED TO 2MHz SINEWAVE 
PIN 8 VOLTAGE = -6.8V, Vs = ±1 5V 

Transient at Input Buffer 



V IB0 PIN1 




CMOS MUX 



BIPOLAR MUX 



SWITCHING BETWEEN V, N0 AND V, N1 
" =50aV HEF = -6.8V,Vs ±15V 



Competitive video multiplexers built in CMOS are bidirec- 
tional and suffer from poor output-to-input isolation and 
cause transients to feed to the inputs. CMOS MUXs have 
been built with "break-before-make" switches to eliminate 
the talking between channels, butthesesufferfrom output 
glitches large enough to interfere with sync circuitry. 
Multiplexers built on older bipolar processes that switch 
lateral PI\IP transistors take several us to settle and blur the 
transition between pictures. 




V| N o AND V| N , CONNECTED TO 2MHz SINEWAVE """""" 

Crosstalk 

The crosstalk, or more accurately all hostile crosstalk, is 
measured by driving a signal into any 3 of the 4 inputs and 
selecting the 4th input with the logic control. This 4th input 
is either shorted to ground orterminated in an impedance. 
All hostile crosstalk is defined as the ratio in dB of the 
signal at the output of the CFA to the signal on the 3 driven 
inputs, and is input referred. Disable crosstalk is mea- 
sured with all 4 inputs driven and the part disabled. 
Crosstalk is critical in many applications where video 
multiplexers are used. In professional video systems a 
crosstalk figure of-72dB is a desirable specification. 

The key to the outstanding crosstalk performance of the 
LT1 204 is the use of tee switches (see Figure 1 ). When the 
tee switch is on (Q2 off) Q1 and Q3 are a pair of emitter 
followers with excellent AC response for driving the CFA. 
When the decoder turns off the tee switch (Q2 on) the 



VOUT 




Figure 1 . Tee Switch 



2-399 



AppucATions inFORmnnon 

emitter base junctions of Q1 and Q3 become reverse 
biased while Q2 emitter absorbs current from 11 . Not only 
do the reverse biased emitter base junctions provide good 
isolation, but any signal at Vin o coupling to Q1 emitter is 
further attenuated by the shunt impedance of Q2 emitter. 
Current from 12 is routed to any on switch. 

Crosstalk performance is a strong function of the IC 
package, the PC board layout as well as the IC design. The 
die layout utilizes grounds between each input to isolate 
adjacent channels, while the output and feedback pins are 
on opposite sides of the die from the input. The layout of 
a PC board that is capable of providing -90dB all hostile 
crosstalk at 1 0MHz is not trivial. That level corresponds to 
a 3O41V output below a 1 V input at 1 0MHz. A demonstra- 
tion board has been fabricated to show the component and 
ground placement required to attain these crosstalk num- 
bers. A graph of all hostile crosstaikfor both the P-DIP and 

All Hostile Crosstalk 



-20 

ST -40 



V S = ±15V 
V| N0 = GND 
Vim i 11 = OdBm 


































R L = 


'160 


£1 
























1 1 


C 


P-DIP 


















D 


;» 





F 


#029,- 
























































/ SO 


. 

WO 




ill 






















t DE 























































1 10 100 

FREQUENCY (MHz) 



SO packages is shown. It has been found empirically from 
these PC boards that capacitive coupling across the pack- 
age of greater than 3fF (0.003pF) will diminish the rejec- 
tion, and it is recommended that this proven layout be 
copied into designs. The key to the success of the SOL PC 
board #028 is the use of a ground plane guard around pin 
13, the feedback pin. 



P-DIP PC Board #029, Component Side 




LTWt-W 



2-400 



UchnSloB 



LT1204 



nppucmrions mFORmmion 

SOL PC Board #028, Component Side 




VIN3 




(408)432-1900 
LT 1 204 VIDEO MUX 
DEMONSTRATION BOARD 









^^^r TECHNOLOGY 



2-401 



LT1204 



nppucnTions iriFonmnTion 



Vino < 



Vini 



V|N2< 



Vino 

GND 
V|N1 
GND 

I 

V|N2 
GND 
V|N3 



V* 
Vo 

\r 

FB 

204 _ 
S/D 

ENABLE 

A1 



■iJ — C1 



-C2 
■0.1(iF 



75£! 



_£-C3 

+TJ 4.7nF - 



T wv-0 

-C4 <R F JL 
■O.lliF >750n R G 
I 750!! 



5i0k 5- 



R2 

10k 



<]]SHU 
-<]] ENAl 

<[]ao 



RESISTORS R1 , R2 AND R3 ARE PULL-DOWN 
AND PULL-UP RESISTORS FOR THE LOGIC 
AND ENABLE PINS. THEY MAY BE OMITTED 
IF THE LT1204 IS DRIVEN FROM TTL LEVELS 
OR FROM 5V CMOS. 



All Hostile Crosstalk Test Setup* 



Alternate All Hostile Crosstalk Setup* 



HP4195A 
NETWORK ANALYZER 



OSC 



5on() 



REF V| N 

win a 



son 

SPLiTTER 



CI 



^50Q ' ~~ 



Vino 
GND 



Vini 
GND 



LT1204 _ 
ViN2 S/D 



GND 
V|N3 



ENABLE 
A1 
AO 



son 
_WV— I 



1k 

-VA—j^ 



•SEE PC BOARD LAYOUT 




•SEE PC BOARD LAYOUT 



2-402 



LT1204 



APPiicfiTions inFORmnnon 

Multiplexer Expansion Pin 11 and Pin 12 

To expand the number of MUX inputs, LT1204s can be 
paralleled by shorting their outputs together. The multi- 
plexer disable logic has been designed to prevent shoot- 
through current when two or more amplifiers have their 
outputs shorted together. (Shoot-through current is a 
spike of power supply current caused by both amplifiers 
being on at once.) 

Monitoring Supply Current Spikes 



5V 
0- 




'4HC04 ' ' I 

fa I 




Timing and Supply Current Waveforms 




The multiplexer uses a circuit to ensure the disabled 
amplifiers do not load or alter the cable termination. When 
the LT1204 is disabled (pin 11 low) the output stage is 
turned off and an active buffer senses the output and drives 
the feedback pin to the CFA (Figure 2). This bootstraps the 
feedback resistors and raises the true output impedance of 
the circuit. For the condition where R F = R G = 1k, the 
Disable Output Resistance is typically raised to 25k and 
drops to 20k for A v = 10, R F = 2k and R G = 222Q due to 
loading of the feedback buffer. Operating the Disablefeature 
with Rq < 100£2 is not recommended. 



TEE SWITCH -, 



V|«ioO{ 

V|N ! T E 



VlN 2 TEE SWITCH - ' 



V|N3Q" TEE SWITCH hi 





Figure 2. Active Buffer Drives FB Pin 13 

A shutdown feature (pin 12 low) reduces the supply 
current to 1.5mA and lowers the power dissipation 
when the LT1 204 is not in use. If the part is shut down, 
the bootstrapping is inoperative and the feedback resis- 
tors will load the output. If the CFA is operated at a gain 
of +1 , however, the feedback resistor will not load the 
output even in shutdown because there is no resistive 
path to ground, but there will be a -6dB loss through 
the cable system. 

A frequency response plot shows the effect of using the 
disable feature versus using the shutdown feature. In 
this example 4 LT1 204s were connected together at their 
outputs forming a 16-to-1 MUX. The plot shows the 
effect of the bootstrapping circuit that eliminates the 



2-403 



nppucRTions inFORmnnon 

improper cable termination due to feedback resistors 
loading the cable. 

The limit to the number of expanded inputs is set by the 
acceptable error budget of the system. 

16-10-1 MUX Response Using Disable vs Shutdown 




1 . 10 

FREQUENCY (MHz) 



LT1204-AI19 



16-to-l Multiplexer All Hostile Crosstalk 

-20 f 
£ -40 




1 10 

FREQUENCY (MHz) 



For a 64-to-1 MUX we need 1 6 LT1 204s. The equivalent 
load resistance due to the feedback resistor Req in 
Disable is 25k/15 = 1.67k. See Figure 3. 

V O- 75(7 5 7 + R 1 EQ 50R EQ - V O = °^V 

This voltage represents a 2.1% loading error. If the 
shutdown feature is used instead of the disable feature, 
then the LT1 204 could expand to only an 8-to-1 MUX for 
the same error. 

As a practical matter the gain error at frequency is also 
set by capacitive loading. The disabled output capaci- 
tance of the LT1 204 is about 8pF, and in the case of 1 6 
LT1 204s, it would represent a 1 28pF load. The combina- 
tion of 1.67k and 128pF correspond to about a 0.3dB 
roll-off at 5MHz. 



VOUT 




| "Reg 

~ ~ LT13M-A 

Figure 3. Equivalent Loading Schematic 



2-404 



LT1204 



TVPICRL flPPUCfiTIOflS 

Programable Gain Amplifier (PGA) 

Two LT1204s and seven resistors make a Programable 
Gain Amplifier with a 128-to-1 gain range. The gain is 
proportional to 2 N where N is the 3-bit binary value of the 
select logic. An input attenuator alters the input signal 

Programable Gain Amplifier Accepts Inputs 
from 62.5mV P .p to 8V P . P 



= 62.5mVp. P TO 8V P - P 




■ Vqut= 1Vp-P 



by 1 , 0.5, 0.25 and 0.1 25 to form an amplifier with a gain 
of 16, 8, 4, 2, when LT1204 #1 is selected. LT1204 #2 
is connected to the same attenuator. When enabled 
(LT1 204 #1 disabled), it results in gain of 1 , 0.5, 0.25 and 
0.125. The wide input common-mode range of the 
LT1204 is needed to accept inputs of 8Vp.p. 

4-lnput Differential Receiver 

LT1 204s can be connected inverting and noninverting as 
shown to make a 4-input differential receiver. The receiver 
can be used to convert differential signals sent over a low 
costtwisted-pairto a single-ended output or used in video 
loop-thru connections. The logic inputs AO and A1 are tied 
together because the same channels are selected on each 
LT1204. By using the Disable feature, the number of 
differential inputs can be increased by adding pairs of 
LT1 204sand tying the outputs of the noninverting LT1 204s 
(#1) together. Switching transients are reduced in this 
receiver because the transient from LT1 204 #2 subtracted 
from the transient of LT1 204 #1 . 



4-lnput Differential Receiver 



TWISTED PAIR 



xxxxxr~| 



CABLE 



1k' 
-Wr 



-VW-« IN 2 

1k * JL. -m 

-IN 4 




VOUT 



2-405 



LT1204 



TVPICflL RPPUCRTIOnS 

Differential Receiver Switching Waveforms 




Differential Receiver Response 




4-lnput Twisted-Pair Driver 

It is possible to send and receive color composite video 
signals appreciable distances on a low cost twisted-pair. 
The cost advantage of this technique is significant. Stan- 
dard 75£2 RG-59/U coaxial cable cost between 250 and 
500 per foot. PVC twisted-pair is only pennies per foot. 
Differential signal transmission resists noise because the 
interference is present as a common-mode signal. The 
LT1 204 can select one of four video cameras for instance, 
and drive the video signal on to the twisted-pair. The circuit 
uses an LT1227 current feedback amplifier connected 
with a gain of -2, and an LT1 204 with a gain of 2. The 47Q 
resistors back-terminate the low cost cable in its charac- 
teristic impedance to prevent reflections. The receiver for 
the differential signal is an LT1 1 93 connected for a gain of 
+2. Resistors R1, R2 and capacitors C1, C2 are used for 
cable compensation for loss through the twisted-pair. 
Alternately, a pair of LT1204s can be used to perform the 
differential to single-ended conversion. 



10k 100k 1M 10M 100M 

FREQUENCY (Hz) 



4-lnput Twisted-Pair Driver/Receiver 




1000 FT OF 
TWISTED-PAIR 




-fiflOnF 300nF ? 20041 



2-406 



^^^F TECH mUDGY 



LT1204 



TVPICRL RPPLICfiTIOnS 




J^^f TECHNOLOGY 



2-407 



2-408 



1.7™ 



secTion 3— insTRumenTflTion 

nmpiiFicRs 



3 



3-1 



TECHNOLOGY 



INDEX 



SECTION 3— INSTRUMENTATION AMPLIFIERS 

INDEX 3-2 

SELECTION GUIDE 3-3 

PROPRIETARY PRODUCTS 

LTC1043, Dual Instrumentation Switched Capacitor Building Block '90DB 11-15 

L TC1 100, Precision, Zero Drift Instrumentation Amplifier '92DB 3-4 

LT1 101, Precision, Micropower, Single Supply Instrumentation Amplifier (Fixed Gain =10 or 100) '92DB 3-1 1 

L T1102, High Speed, Precision, JFET Input Instrumentation Amplifier (Fixed Gain = 10 or 100) '92DB 3-23 

L 11193. Video Difference Amplifier, Adjustable Gain '92DB 2-1 59 

LT1 194, Video Difference Amplifier, Gain of 10 '92DB 2-1 71 



3-2 



INSTRUMENTATION AMPLIFIERS 



Complete Instrumentation Amplifiers in 8-Pin Packages 

■ LTC1100: Zero Offset, Drift; Gain of 100 

■ LT1 1 01 : Micropower, Single Supply; Gain of 1 or 1 00 

■ LT1102: High Speed JFET Input; Gain of 10 or 100 





LTC1100A 


LT1101A 


LT1102A 


PARAMETER 


V S = +5V 


V S = 5V 


V S = +15V 


Offset (Max) 


10uV 


160uV 


600nV 


Offset Drift (Max) 


100nV/°C 


2uV/°C 


8uV/°C 


Bias Current (Max) 


50pA 


8nA 


40pA 


Noise (0.1Hz to 10Hz) 


1 9|iV P .p Typ 


0.9nVp. P Typ 


2.8hV P -p Typ 


Gain 


100/10 (SOL PKG) 


10/100 


10/100 


Gain Error (Max) 


0.05% 


0.05% 


0.05% 


Gain Drift 


4ppm/°CTyp 


4ppm/°C Max 


18ppm/°C Max 


Gain Nonlinearity (Max) 


8ppm 


8ppm 


14ppm 


CMRR (G = 100)(Min) 


104dB 


95dB 


84dB 


Power Supply (Max) 


Single, Dual, 16V 


Single, Dual, 44V 


Dual, 44V 


Supply Current (Max) 


2.8mA 


130nA 


5niA 


Slew Rate 


1.5V/usTyp 


06V/us Mill 


21V/nsMin (6:10) 


Bandwidth (G = 10) 


18kHz Typ 


22kHz Min 


2MHz Min 



LTC1100 

TOP VIEW 



LT1101/LT1102 

TOP VIEW 



H OUTPUT 




N8 PACKAGE 
8-LEAD PLASTIC DIP 



J8 PACKAGE 
8-LEAD CERAMIC DIP 



R-9.2k (LT1101) 
R - 1.8k (LT1102) 
N8 PACKAGE J8 PACKAGE 

8-LEAD PLASTIC DIP 8-LEAD CERAMIC DIP 



Differential Voltage Amplification from a 
Resistance Bridge (Single 5V Powered) 



TRANSDUCER 
OR SENSOR 



MINIMUM VOLTAGE ACROSS BRIDGE = 20mV 
MINIMUM SUPPLY VOLTAGE . 1.8V 



Wideband Instrumentation Amplifier 
with +150mA Output Current 




V' = 15V 













+ ^ 




sJ-BIAS 


LT1102 




LT1010 
















-15V 



OUTPUT = ±10V INTO 75(1 TO 330kHz (R = 50(1) 
±1 0V INTO 200(1 TO 330kHz (R - 200(1) 
DRIVES 2.2nF CAP LOAD 

GAIN = 10. DEGRADED 0.01% DUE TO LT1010 



LTC1100CS 



NC [T 




2] NC 


GND REF |T 




m voui 


e = 10 |T 




14] G- 10 


+CMRR |T 




13] CfJMP 


NC |T 




12] NC 


-VinE 




11] W| B 


v- [T 




10] V* 


NC [F 




T] NC 



S PACKAGE 
16-LEAD PLASTIC SOL 



Dual Precision Instrumentation Switched Capacitor Building Block: LTC1043 



Upto120dBCMRR 

Adjustable Gain-Set by Output Op Amp 

Offset and Offset Drift as Low as Output Amp Specs 



Precise, Charge-Balanced Switching 
Up to 5MHz Clock Rate 
Internal or External Clock 





LTC1043 


PARAMETER 


(USING LTC1050 AMPLIFIER) 


Offset 


0.5uV 


Offset Drift 


50nV/°C 


Bias Current 


10pA 


Noise (0.1Hzk to 10Hz) 


1.6U.V 


Gain 


Resistor Programmable 


Gain Error 


Resistor Limited 0.001 % Possible 


Gain Drift 


Resistor Limited <1ppm/°C Possible 


Gain Nonlinearity 


Resistor Limited 1ppm Possible 


CMRR 


120dB 


Power Supply 


Single, Dual (18V, +9V Max) 


Supply Current 


2mA 


Slew Rate 


1 mV/ms 


Bandwidth 


10Hz 



Instrumentation Amplifier 




_c-nn 

F -r- : 



CMRR>120dBATDC 
CMRR > 120d8 AT 6OH2 
DUAL SUPPLY OR SINGLE 5V 
Vos.150pV.GABl.1tR2/R1 
aV 0S /AT.2pVrC 
COMMON-MODE INPUT VOLTAGE 
INCLUDES THE SUPPLIES 



CMRR vs Frequency 









min in 

Cs C, = lpE || 



































































































































FREQUENCY OF CON 
(LTC1W 



JON-MODE SIGNAL (F 
W/LT1013) 



rrum 

.^^r TECHNOLOGY 



3-3 




4-1 



TECHNOLOGY 



INDEX 



SECTION 4— POWER PRODUCTS 

INDEX 4-2 

SELECTION GUIDES 4-4 

PROPRIETARY PRODUCTS 

INDUCTORLESS DC TO DC CONVERTERS 4-15 

LTC1044A, 12V CMOS Voltage Converter 4-16 

LT1054, Switched-Capacitor Voltage Converter with Regulator 4-26 

LTC1144, Switched-Capacitor Wide Input Range Voltage Converter with Shutdown 4-38 

LINEAR REGULATORS 4-47 

LT1083AT1084AT1085, 7.5A, 5A, 3A Low Dropout Positive Adjustable Regulators 4-48 

LT1083AT1084AT1085 Fixed, 3A, SA, 7.5A Low Dropout Positive Fixed Regulators 4-61 

LT1086 Series, 1.5A Low Dropout Positive Regulators Adjustable and Fixed 2.85V, 3.3V, 3.6V, 5V, 12V 4-72 

LT1117/LT1117-2.85/LT1117-3.3/LT1117-5, 800mA Low Dropout Positive Regulators Adjustable and 

Fixed 2.85V, 3.3V, 5V 4-85 

LT1120, Micropower Regulator with Comparator and Shutdown 4-96 

L T1 120A, Micropower Regulator with Comparator and Shutdown 4-1 07 

L T1 121 A T1121-3.3A T1 121-5, Micropower Low Dropout Regulators with Shutdown 4-114 

LT1129/LT1129-3.3/LT1129-5, Micropower Low Dropout Regulators with Shutdown 4-125 

LT1585, 4A Low Dropout Fast Response Positive Regulator Adjustable and Fixed 13-136 

POWER AND MOTOR CONTROL 4-137 

LTC1153, Auto-Reset Electronic Circuit Breaker 4-138 

LTC1154, High-Side Micropower MOSFET Driver 4-152 

LTC1157, 3.3V Dual Micropower High-Side/Low-Side MOSFET Driver 4-167 

LT1161, Quad Protected High-Side MOSFET Driver 4-175 

LTC1163/LTC1165, Triple 1.8V to 6V High-Side MOSFET Drivers 4-186 

LT1248, Power Factor Controller 4-194 

LT1249, Power Factor Controller 4-205 

LTC1255, Dual 24V High-Side MOSFET Driver 4-215 

SWITCHING REGULATORS 4-231 

LT1072, 1.25A High Efficiency Switching Regulator 4-232 

LT1074AT1076, Step-Down Switching Regulator 4-243 

LT1082, 1A High Voltage, Efficiency Switching Voltage Regulator 4-257 

LT1103/LT1105, Offline Switching Regulator 4-267 

L T1107, Micropower DC/DC Converter Adjustable and Fixed 5V.12V 4-294 

LT1108, Micropower DC/DC Converter Adjustable and Fixed 5V, 12V 4-306 

LT1109, Micropower Low Cost DC/DC Converter Adjustable and Fixed 5V, 12V 4-318 

L T1 109A, Micropower DC/DC Converter Flash Memory VPP Generator Adjustable and Fixed 5V.12V 4-325 

LT1111, Micropower DC/DC Converter Adjustable and Fixed 5V, 12V 4-331 

L TC1 142/L TC1 142-ADJ, Dual High Efficiency Synchronous Step-Down Switching Regulators 4-346 

LTC1143, Dual High Efficiency Step-Down Switching Regulator Controller 4-365 

LTC1147-3.3/LTC1147-5, High Efficiency Step-Down Switching Regulator Controllers 4-380 

LTC1148/LTC1148-3.3/LTC1148-5, High Efficiency Synchronous Step-Down Switching Regulators 4-395 

LTC1 149 A TC1 149-3. 3 A TC1 149-5, High Efficiency Synchronous Step-Down Switching Regulators 4-41 4 

LTC1159ATC1159-3.3ATC1159-5, High Efficiency Synchronous Step-Down Switching Regulators 13-11 

LT1170AT1171AT1172, 100kHz, 5A, 2.5A, and 1.25A High Efficiency Switching Regulators 4-433 

LTC1174ATC1174-3.3ATC1174-5, High Efficiency Step-Down and Inverting DCA)C Converter 4-447 



4 - 2 fj^J UcHmLoB 



111176/111176-5, Step-Down Switching Regulator 4-462 

LT1182/IT1183, CCFL/LCD Contrast Dual Switching Regulator 13-27 

L11268BA11268, 7.5A, 150kHz Switching Regulators 4-466 

LT1270A/LT1270, 8A and 10A High Efficiency Switching Regulators 4-470 

LT1271/LT1269, 4 A High Efficiency Switching Regulators 4-474 

L T1300, Micropower High Efficiency 3. 3/SV Step-Up DC/DC Converter 4-478 

LT1301, Micropower High Efficiency 5V12V Step-Up DC/DC Converter with Flash Memory 4-486 

L T1302/L T1 302-5, Micropower High Outpu' Current Step-Up Adjustable and Fixed 5V DC/DC Converter 1 3-47 

LT1303/LT1303-5, Micropower High Efficiency DC/DC Converter with Low-Battery Detector Adjustable and 

Fixed 5V 13-51 

LT1309, 500kHz Micropower DC/DC Converter tor Flash Memory 13-55 

LT1372, 500kHz High Efficiency 1.5A Switching Regulator 13-120 

LT137S, 1.5A, 500kHz Step-Down Switching Regulator 13-121 

PCMCIA HOST AND CARD POWER MANAGEMENT DEVICES 4-497 

LT110B, Micropower Step-Up DC/DC Converter for PCMCIA Card Flash Memory 13-3 

LTC1262, 12V, 30mA Flash Memory Programming Supply 13-35 

LT1312, Single PCMCIA VPP Driver/Regulator 13-59 

LT1313, Dual PCMCIA VPP Driver/Regulator 13-71 

BATTERY MANAGEMENT CIRCUITS 4-499 

LTC1325, Microprocessor-Controlled Battery Charger 13-94 



XT TECHNOLOGY *T~d 



LINEAR REGULATORS 



Positive 



Low Dropout 



X 



Adjustable 



LT1083 
LT1084 
LT1085 
LT1086 
LT1020 
LT1117 
LT1120 
LT1121 
LT1129 



(7.5A) 
(5A) 
(3A)* 
(1.5A)* 
(0.1 25A) 
(0.8A)*' * 
(0.1 25A) 
(0.1 50A) 
(0.700A)* 



- 3V Dropout 



Fixed 3.6V 



LT1 085-3.6 (3A)* 
LT1 086-3.6 (1.5A)* 



Fixed 3.3V 



Fixed 12V 



LT1083-12 (7.5A) 
LT1084-12 (5A) 
LT1085-12 (3A) 
LT1086-12 (1.5A) 



Fixed 5V 



Fixed 2.85V 



LT1 084-3.3 (5A) 
LT1085-3.3 (3A)* 
LT1086-3.3 (1.5A)* 
LT1117-3.3 (0.8A)*'* 
LT1121-3.3 (0.15A)** 
LT1 129-3.3 (0.7A)*'* 



LT1 083-5 (7.5A) 
LT1084-5 (5A) 
LT1 085-5 (3A) 
LT1 086-5 (1.5A) 
LT1 117-5 (0.8A)*'** 
LT1 121-5 (0.15A)" 
LT1123 (pnp Driver)" 
LT1129-5 (0.7A)*'** 



LT1 11 7-2.85 (0.8A)* 
LT1 086-2.85 (1.5A) 







Adjustable 



Fixed 5V 



Logic Controlled 



I%Vref 



4% V REF 



LT1003 (5A) 
LT123A/323A (3A) 
LM 123/323 (3A) 



LT1005 (5V, 1A) 
LT1035 (5V, 3A) 
LT1036 (12V, 3A) 



LT1 083 (1 OA) 
LT138A/338A (5A) 
LT117A/317A (1.5) 



LM1 38/338 (5V) 
LM1 50/350 (3A) 
LM117/317 (1.5A) 



" Available in surface-mount DD package 
** Available in surface-mount S0T223 package 



Low Dropout 
w/Remote Sense 



LT1087 (3A) 



Negative 






Low Dropout 




Adjustable 




3V Dropout 


LT1185 (3A) 



Adjustable 



1%V REF 



4% Vref 



LT1033 (3A) LM1 37/337 (1.5A) 

LT137A/337A (1.5A) 



4-4 



SWITCHING REGULATOR SELECTION GUIDE 



.ATOR 

IENCY — > 


OPTIMIZED FOR STEP-UP 
OR FLYBACK CONFIGURATIONS 


OPTIMIZED FOR 
STEP-DOWN OR 

ItltlCDTItIP ADD! IPATinMC 

INVtnlINu ArrLIUAMUNa 


OFF-LINE 
AND/OR 
PWM CONTROLLERS 


40kHz 


60kHz 


100kHz 


150kHz 


1 00kHz 


200kHz 


500kHz 


1MHz 


10A 




LT1270A 














8A 




LT1270 














7.5A 








LT1268 










5A 


LT1070 




LT1170 




LT1074 








4A 




LT1271 


LT1269 












2.5A 


LT1071 




LT1171 












2A 










LT1076* 


LT1103 






1.25A 


LT1072 




LT1172 




LT1176* 








1A 




LT1082 














External 












LT1105 


LT124X 


LT1246 





INPUT VOLTAGE (V) 
MIN MAX 


MAXIMUM 
SWITCH VOLTAGE (V) 


MAX RATED 
SWITCH CURRENT (A) 


PACKAGES 
AVAILABLE 


LT1070 


3 


40 


65 


5 


K,T 


LT1070HV 


3 


60 


75 


5 


K, T 


LT1071 


3 


40 


65 


2.5 


K,T 


LT1071HV 


3 


60 


75 


2.5 


K, T 


LT1072 


3 


40 


65 


1.25 


K, T, N8, S8, S16 


LT1072HV 


3 


60 


75 


1.25 


K,T 


LT1074 


8 


40 


65 


5 


K, Q,T 


LT1074HV 


8 60 


75 


5 


K, T 


LT1076* 


8 40 


65 


2 


K, R, T, Y 


LT1076HV 


8 60 


75 


2 


K, R, T, Y 


LT1082 


3 


75 


100 


1 


J8, N8, S, T 


LT1170 


3 


40 


65 


5 


K, T, Q 


LT1170HV 


3 60 


75 


5 


K, T 


LT1171 


3 


40 


65 


2.5 


K, Q,T 


LT1171HV 


3 60 


75 


2.5 


K, T 


LT1172 


3 


40 


65 


1.25 


K, T, N8, S8, S16, Q 


LT1172HV 


3 


60 


75 


1.25 


K, T 


LT1176* 


8 38 


38 


1.25 


N,S 


LT1268 


3 


30 


60 


7.5 


T, Q 


LT1269 


3 


30 


60 


4 


S, T, Q 


LT1270A 


3 


30 


60 


10 


T 


LT1270 


3 


30 


60 


8 


T 


LT1271 


3 


30 


60 


4 


T, Q 



'Fixed 5V output version available 



XTTJDBS 



POWER SUPPLY PRODUCTS SELECTION GUIDE 



Commercial Temperature 



CURRENT 
(AMPS) 


POSITIVE 

OR 
NEGATIVE 
OUTPUT 


PART NUMBER 


PACKAGE 
TYPE 


Win/ 
«diff 
MAX 
(V) 


V NOMINAL 
REGULATED 

OUTPUT 
VOLTAGE (V) 


MIL/ 
IND 
TEMP 


FEATURE/COMMENTS 


10.0 


Pos Adj 


LT1038CK 


Steel TO-3 


35 


1.210 33 


M 


2% Vout Tol. Plug In Compatible with 317, 350, 338 Types 




Switching 


LT1270ACT 


TO-220 


30 


Adjustable 




Selt-Contained 60kHz PWM and 10 Amp Switch in a 5-Pin Package 


8.0 


Switching 


LT1270CT 


TO-220 


30 


Adjustable 




Self-Contained 60kHz PWM and 8 Amp Switch in a 5-Pin Package 


7.5 


Pos Fixed 


LT1083CK-5 
LT1083CP-5 
LT1083CK-12 
LT1083CP-12 


Steel TO-3 
Plastic T0-3P 
Steel TO-3 
Plastic T0-3P 


30 
30 
30 
30 


5 
5 
12 
12 


M 
M 


Low Dropout (1.2V), 17. Vout Tol 




Pos Adj 


LT1083CK 
LT1083CP 


Steel TO-3 
Plastic T0-3P 


30 
30 


1 2 to 29 
1.2 to 29 


M, I 


Low Dropout (1.2V), Pin Compatible with 317, 350, 338 Types 




Switching 


LT1268CQ 
LT1268CT 


Plastic DD 
TO-220 


30 
30 


Adjustable 
Adjustable 




Selt-Contained 150kHz PWM and 7.5A Switch in 5-Pin Package 


5.0 


Pos Fixed 


LT1003CK 
LT1003CP 


Steel TO-3 
Plastic T0-3P 


20 
20 


5 
5 


M 


2% Vni it Tol 






LT1084CT-3.3 

LT1084CK-5 

LT1084CP-5 

LT1084CT-5 

U1084CK-12 

LT1084CP-12 

I TinR4PT-19 
L I I UO-+U I 1 1 


TO-220 
Steel T0-3 
Plastic T0-3P 
TO-220 
Steel T0-3 
Plastic TO-3P 
TO-220 


30 
30 
30 
30 
30 
30 
30 


3.3 
5 
5 
5 

12 
12 
12 


M 

M 


Low Dropout (1.2V), 1%V uT Tol 




Pos Adj 


LT338AK LM338K 

L 1 ojDnr LlVIOOOr 


Steel TO-3 

PlaQtir Tft-IP 
ridMiL i u or 


35 
35 


1.2 to 32 
1 2 to 32 


M 


LT338AHas1%V BEF Tol 






L 1 1 UOHUrX 

LT1084CP 
LT1084CT 


Glttl 1 U O 

Plastic T0-3P 
TO-220 


30 
30 
30 


1 2 to 29 
12 to 29 
Adjustable 


M I 


1 nw nrnnnut M Pin rnmnatihlp with 11 7 l^fi lit! Tunpi 

LUW Ul ULJUUl [ 1 .£</), rill OUIMJJallUlC Willi O 1 /, OJU, OOO 1 ypco 






LT1087CT 


TO-220 


30 


1 2 to 29 




Low Dropout (1.2V) with Kelvin Sense 




Switching 


LT1070CK 
LT1070CT 
LT1 070HVCK 
LI \ U/UnVU I 


Steel TO-3 
TO-220 
Steel TO-3 
TO-220 


40 
40 
60 
60 


Adjustable 
Adjustable 
Adjustable 
Adjustable 


M I 

1 

M 

1 


Self-Contained 40kHz PWM and 5A Switch in a 5-Pin Package 






LT1074CT 


oieei i u-j 
TO-220 


45 
45 


Adjustable 
Adjustable 


M 
1 


oen-L-oniaineo iuukmz rWM ana oa owiicn in a o-rin racKage 






L I I U/ 40 1 


7 1 nsri TCI OOrt 

/ Leao i u 


°>Xi 


Adjustable 




beii-uoniainen iuukhz rwivi ana om owiicn in a /-rin racKage 






LT1074HVCK 


Steel TO-3 
TO-220 


64 
64 


Adjustable 
Adjustable 


1 


Self-Contained 100kHz PWM and 5A Switch in a 5-Pin Package 






I Tin7iH\/PV 


7-1 earl TTI-99n 


64 


Adjustable 




Qolf.nnnOinnn" 1flni/Ui D1A/M inH ^fl Cmitnh in 3 7. Din Danlr^no 

oeit uonidineo iuukhz rwivi ano oh owiicn in a r-rin racKage 






LT1170CK 


Steel TO-3 


40 


Adjustable 


M 


Self-Containad lOOkH: PWM ana 5A S.vitch in a 5-Pn Package 






LT1170CQ 


Plastic DD 


30 


Adjustable 




Selt-Contained 100kHz PWM and 5A Switch ir a 5-Pin Package 






LT1170CT 
LT1170HVCT 


TO-220 
TO-220 


40 
60 


Adjustable 
Adjustable 


1 


Self-Contained 100kHz PWM and 5A Switch in a 5-Pin Package 


4.0 


Switching 


LT1269CQ 
LT1 269CT 


Plastic DD 
TO-220 


30 
30 


Adjustable 

Arlii Klihlp 

riUJUdLdUIG 




Self-Contained 100kHz PWM and 4A Switch in 5-Pin Package 






LT1269CS 


20-Lead SOIC 


30 


Adjustable 




Self-Contained 100kHz PWM and 4A Switch in 20-Lead SOIC Pkg 






LT1271CQ 
LT1271CT 


Plastic DD 
TO-220 


30 
30 


Adjustable 
Adjustable 




Self-Contained 60kHz PWM and 4A Switch in 5-Pin Package 


3.0 


Pos Fixed 


LT323AK LM323K 
LT323AT 


Steel TO-3 
TO-220 


20 
20 


5 
5 


M 


LT323A Has 1% Vout Tol 
LT323A Has 1% Vout Tol 






LT1085CT-3.3 


TO-220 


30 


3.3 




Low Dropout (1.2V), 1% V 0UT Tol 






LT1 085CM-3.3 
LT1085CM-3.6 


Plastic DD 
Plastic DO 


30 
30 


3.3 
3.6 




Low Dropout (1.2V), 1% V ut Tol 3-Pin Surface Mount Package 






LT1085CT-3.6 

LT1085CK-5 

LT1085CT-5 

U1085CK-12 

LT1085CT-12 


TO-220 
Steel TO-3 
TO-220 
Steel TO-3 
TO-220 


30 
30 
30 
30 
30 


3.6 

5 

5 
12 
12 


M.I 
1 

M.I 
1 


Low Dropout (1.2V), 1% Vout Tol 




Pos Adj 


LT350AK LM350K 
LT350AT LM350T 
LT350AP LM350P 


Steel TO-3 
TO-220 
Plastic TO-3P 


35 
35 
35 


1.2 to 33 
1.2 to 33 
1.2 to 33 


M 


LT350AHas1%V REF Tol 






LT1085CK 
LT1085CT 


Steel TO-3 
TO-220 


30 
30 


1.2 to 29 
1.2 to 29 


M.l 
1 


Low Dropout (1.2V), Pin Compatible with 317, 350 Types 



4-6 



POWER SUPPLY PRODUCTS SELECTION GUIDE 



Commercial Temperature 



CURRENT 
(AMPS) 


POSITIVE 

OR 
NEGATIVE 
OUTPUT 


PART NUMBER 


PACKAGE 
TYPE 


Vdiff 
MAX 
(V) 


V NOMINAL 
REGULATED 

OUTPUT 
VOLTAGE (V) 


MIL/ 
IND 
TEMP 


FEATURE/COMMENTS 


3.0 


Neg Adj 


LT1033CK 
LT1033CT 


Steel TO-3 

Dlne-tir Tf"l TD 

naSIlC I U-«5r 

TO-220 


35 
35 
35 


-1.2 to -32 
—1 .2 to —32 
-1.2 to -32 


M 


2%V REF Tol 


LT1185CT 


TO-220 


35 


-2.5 to -25 


M.I 


Low Dropout (0.75V) Witt Prog Current Limit and Shutdown 


Dual Pos 
Fixed 


LT1035CK 
LT1035CT 


Steel TO-3 
TO-220 


20 
20 


Two 5V Outputs 
Two 5V Outputs 


M 


Logic Controlled Main Outpul Voltage, 75mA Auxiliary Output 




Positive 


LT1036CK 
LT1036CT 


Steel TO-3 
TO-220 


30 
30 


12.5 
12,5 


M 


Logic Controlled 1 2V, 3A Output. 5V, 75mA Auxiliary Output 
Logic Controlled 12V, 3A Output. 5V, 75mA Auxiliary Output 


2.5 


Switching 


LT1071CK 
LT1071CT 
LT1071HVCK 
LT1071HVCT 


Steel TO-3 
TO-220 
Steel TO-3 
TO-220 


40 
40 
60 
60 


Adjustable 
Adjustable 
Adjustable 
Adjustable 


M 
I 

M 
I 


Self-Contained 40kHz PWM and 2.5A Switch in a 5-Pin Package 


LT1171CK 
LT1171CT 
LT1171 HVCT 


Steel TO-3 

TO-220 

TO-220 


40 
40 
60 


Adjustable 
Adjustable 
Adjustable 


M 
I 


Self-Contained 100kHz PWM and 2.5A Switch in a 5-Pin Package 


LT1171CQ 


Plastic DD 


40 


Adjustable 




Self-Contained 100kHz PWM and 2.5A Switch in a 5-Pin Sur Mt Pack 


2.0 


Switching 


LT1076CK 


Steel TO-3 


45 


Adjustable 


M 


Self-Contained 100kHz PWM and 2A Switch 


LT1076CR 


Plastic DO 


45 


Adjustable 




Self-Contained 100kHz PWM and 2A Switch in a 7-Pin Sur Ml Pack 


LT1076CT 
LT1076HVCK 


TO-220 
Steel TO-3 


45 
64 


Adjustable 
Adjustable 


I 


Self-Contained 100kHz PWM and 2A Switch 


LT1076HVCT 


TO-220 


64 


Adjustable 


I 


Self-Contained 100kHz PWM and 2A Switch in a 5-Pin Package 


LT1076CY-5 
LT1076HVCY-5 


7-Lead TO-220 
Mead TO-220 


45 
64 


5 
5 




100kHz PWM and 2A Switch in 7-Pin Package with Shutdown 
and Fixed 5V Output 


LT1076CR-5 


Plastic DD 


45 


5 




Self-Contained 100kHz PWM and 2A Switch in a 7-Pin Sur Mt Pack 


LT1076CY 
LT1076HVCY 


7-Lead TO-220 
7-Lead TO-220 


45 
64 


Adjustable 
Adjustable 




Self-Contained 100kHz PWM and 2A Switch in a 7-Pin Package 


LT1103CY 


7-Lead TO-220 


30 


Adjustable 


I 


Designed for AC Line Powered Applications. Minimum External 
Components Required for 75W Isolated Power Supply 


LT1302CN8 
LT1302CS8 


8-Pin Plastic DIP 
8-Pin Plastic SOIC 


10 
10 


Adjustable 
Adjustable 




Micropower Switching Regulator Works Down to 2V Input and 
Produces 5V at 600mA 


1.5 


Pos Fixed 


LT1086CT-2.85 


TO-220 


30 


2 85 




Intended for SCSI-2 Active Termination 


0.5 to 1.5 


Pos Fixed 


LT1086CT-3.3 
LT1086CM-3.3 


TO-220 
Plastic DD 


30 
30 


3.3 
3.3 




Low Dropout (1.2V), 1 % Volt Tol 


LT1086CT-3.6 
LT1086CM-3.6 


TO-220 
Plastic DD 


30 
30 


3.6 
3.6 




Low Dropout (1.2V) 1% VoutToI 


LT1086CK-5 
LT1086CT-5 
LT1086CK-12 
LT1086CT-12 


Steel TO-3 
TO-220 
Steel TO-3 
TO-220 


30 
30 
30 
30 


5 
5 
12 
12 


M.I 

I 

M I 
I 


Low Dropout (1.2V). 1%V 0U t Tol 


Pos Adj 


LT317AK LM317K 
LT317AH LM317H 
LT317AT LM317T 


Steel TO-3 

T0-39 

TO-220 


40 
40 
40 


1.2 to 37 
1.2 to 37 
1.2 to 37 


M 
M 


LT31 7A Has 1% Vn EF Tol 


LT1086CK 

L 1 1 UObL 1 

LT1086CH 


Steel TO-3 

TO-220 

TO-39 


30 
30 
30 


1.2 to 29 
1.2 to 29 
1.2 to 29 


M.I 

1 

M 


Low Dropout (1.2V).1% V REF Tol Pin-Compatible with 317 Types 


LT1086CM 


Plastic DO 


30 


1.2 to 29 




Low Dropout (1.2V), 1% V REF Tol 3-Pin Surface Mount Package 


Neg Adj 


LT337AK LM337K 
LT337AH LM337H 
LT337AT LM337H 


Steel TO-3 

TO-39 

TO-220 


40 
40 
40 


-1.210-37 
-1.2 to -37 
-1.2 to -37 


M 
M 


LT337AHas1%V REF Tol 


Pos Adj 
High Voltage 


LT317AHVK LM317HVK 
LT317AHVH LM317HVH 


Steel TO-3 
TO-39 


60 
60 


1.2 to 57 
1.2 to 57 


M 
M 


LT317AHV Has 1% V RFF Tol 


Neg Adj 
High Voltage 


LT337AHVK LM337HVK 
LT337AHVH LM337HVH 


Steel TO-3 
TO-39 


50 
50 


-1 22 to -47 
-1.2 to -47 


M 
M 


LT337AHV Has 1% Vr FF Tol 


1.25 


Switching 


LT1072CK 
LT1072CT 
LT1072HVCK 
LT1072HVCT 


Steel TO-3 
TO-220 
Steel TO-3 
TO-220 


40 
40 
60 
60 


Adjustable 
Adjustable 
Adjustable 
Adjustable 


M. 1 
1 

M, 1 
1 


Self-Contained 40kHz PWM and 1 .25A Switch in a 5-Pin Package 


LT1072CJ8 
LT1072CN8 
LT1072CS8 


8-Pin CERDIP 
8-Pin Plastic DIP 
8-Pin Plastic SOIC 


40 
40 
40 


Adjustable 
Adjustable 
Adjustable 


M 


Self-Contained 40kHz PWM and 1 .25A Switch 



POWER SUPPLY PRODUCTS SELECTION GUIDE 



Commercial Temperature 





POSITIVE 






Vin/ 


V NOMINAL 








OR 






Vqiff 


REGULATED 


MIL/ 




CURRENT 


NEGATIVE 




PACKAGE 


MAX 


OUTPUT 


IND 


FEATURE/COMMENTS 


(AMPS) 


OUTPUT 


PART NUMBER 


TYPE 


(V) 


VOLTAGE (V) 


TEMP 


1 25 


owitcmng 


I III/ c\j r\ 


OLCcI 1 U 


40 


fl j-f i H c i-j |,l 
nUJUoLdUIG 


M 


Self-Contained 100kHz PWM and 1 .25A Switch 






LI 1 1 1.1 


T0-220 


40 


Adjustable 










LT1172HV0T 


TO-220 


60 


Adjustable 










LT1172CJ8 


8-Pin CERDIP 


40 


Adjustable 


M 








L I I I r tljl»0 


O rill rldollL Ulr 


40 




■ 








LT1172CQ 


Plastic DD 


40 


Adjustable 










LT1172CS8 


8-Pin Plastic SOIC 


40 


Adjustable 


I 








LT1176CN8 


8-Pin Plastic DIP 


38 


Adjustable 




Self-Contained 100kHz PWM and 1.2A Switch in 8-Pin DIP Package 






LT1176CN8-5 


8-Pin Plastic DIP 


38 


5 










LT1176CS 


20-Lead SOIC 


38 


Adjustable 




Self-Contained 100kHz PWM and 1.2A Switch in 20-Lead SOIC 






LT1176CS-5 


20-Lead SOIC 


38 


5 






1.0 


Dual Pos 


LT1005CK 


Steel TO-3 


20 


Two 5V Outputs 


M 


Logic Controlled Main Output Voltage 




Fixed 


LT1005CT 


TO-220 


20 


Two 5V Outputs 






Switching 


LT1073CN8 


8-Pin Plastic DIP 


15 


Adjustable 




Micropower Switching Regulator Works Down to 1V Input. Requires 






LT1073CS8 


8-Pin Plastic SOIC 


15 


Adjustable 




Only 3 External Components (-5, -12 Versions) 






LT1073CN8-5 


8-Pin Plastic DIP 


15 


5 








LT1073CS8-5 


8-Pin Plastic SOIC 


15 


5 










LT1073CN8-12 


8-Pin Plastic DIP 


15 


12 










LT1073CS8-12 


8-Pin Plastic SOIC 


15 


12 










LT1082CN8 


8-Pin Plastic DIP 


75 


Adjustable 


I 


60kHz PWM and 1A. 100V Switch 






LT1082CT 


TO-220 


75 




I 


60kHz PWM and 1A, 100V Switch 






LT1107CN8 


8-Pin Plastic DIP 


36 


Adjustable 


M 


Micropower Switching Regulator Works Down to 2V Input. Requires 






LT1107CS8 


8-Pin Plastic SOIC 


36 


Adjustable 




Only 3 External Components (-5, -12 Versions). Optimized 






I T1 in7rMH.R 

LI I I u/ UIIO 


rill rldbllC Ulr 


36 


i 


M 


tor Vin > 2V, Allows Use of Surface Mount Inductors. 






LT1107CS8-5 


8-Pin Plastic SOIC 


36 


5 








LT1107CN8-12 


8-Pin Plastic DIP 


36 


12 


M 








LT1107CS8-12 


8-Pin Plastic SOIC 


36 


12 










LT1108CN 


8-Pin Plastic DIP 


36 


Adjustable 




Micropower Switching Regulator Works Down to 2V Input. Requires 






LT1108CS 


8-Pin Plastic SOIC 


36 


Adjustable 




Only 3 External Components (-5, -12 Versions) Optimized 






L I I I UOUIY J 


8-Pin Plastic DIP 


36 


5 




fnr \/n. > OM 

IUI ^ £V 






LT1108CS-5 


8-Pin Plastic SOIC 


36 


5 








LT1108CN-12 


8-Pin Plastic DIP 


36 


12 










LT1108CS-12 


8-Pin Plastic SOIC 


36 


12 










LT1 1 09CZ-5 


3-Pin T0-92 


36 


5 




Micropower Switching Regulator Works Down to 2V Input. Requires 






LT1109CZ-12 


3-Pin T0-92 


36 


12 




Only 3 External Components (-5, -12 Versions). Optimized for 






LT1109CN8-5 


8-Pin Plastic DIP 


36 


5 




\/in > 9\/ Availahlp in T-Pin TO-Q9 Parkanp Mfi/CJR Vprsinni Akn 
Vj^j iV MVrtlklUlt III J rill 1 U ^JL rdl.Kiiyi.. nlu/OO Vt>l*>IUIIS HISU 






LT1109CS8-12 


8-Pin Plastic SOIC 


36 


5 




Offer Shutdown Feature. 1 2V Version Ideal for Flash Memory Vpp 






LT1109CN8-5 


8-Pin Plastic DIP 


36 


12 




Pulse Generation from 5V or 3V 






LT1109CS8-12 


8-Pin Plastic SOIC 


36 


12 










LT1109ACN 


8-Pin Plastic DIP 


36 


Adjustable 




Micropower Switching Regulator Works Down to 2V Input. Requires 






LT1109ACS 


8-Pin Plastic SOIC 


36 


Adjustable 




Only 3 External Components (-5, -12 Versions). Optimized for 






LT1109ACN-5 


R-Pin Pla^tir pi 1 P 
nil rlaMlL Ulr 


36 


g 




V|n 5 2V. 12V Version Ideal for Flash Memory Vpp Pulse Generation 






LT1109ACS-5 


8-Pin Plastic SOIC 


36 


5 




from 5V or 2V. Includes Shutdown Feature. 






LT1109ACN-12 


8-Pin Plastic DIP 


36 


12 










LT1109ACS-12 


8-Pin Plastic SOIC 


36 


12 










LT1110CN8 


8-Pin Plastic DIP 


15 


Adjustable 




Micropower Switching Regulator Works Down to 1V Input. Requires 






LT1 1 1 0CS8 


8-Pin Plastic SOIC 


15 


Adjustable 




Only 3 External Components (-5, -12 Versions). 60kHz Oscillator 






LT1110CN8-5 


8-Pin Plastic DIP 


15 


5 




nuVV/b Uoc Ul OUIIdLc IvIUUIIL IIIUULlula 






LT1110CS8-5 


8-Pin Plastic SOIC 


15 


5 










LT1110CN8-12 


8-Pin Plastic DIP 


15 


12 










LT1 1 10CS8-12 


8-Pin Plastic SOIC 


15 


12 










LT1111CN8 


8-Pin Plastic DIP 


36 


Adjustable 


M 


Micropower Switching Regulator Works Down to 2V Input. Requires 






LT1111CS8 


8-Pin Plastic SOIC 


36 


Adjustable 


I 


Only 3 External Components (-5, -12 Versions). Optimized 






LT1111CN8-5 


8-Pin Plastic DIP 


36 


5 


M 


for V| N > 2V. 70kHz Oscillator Allows Use of Surface Mount 






LT1111CS8-5 


8-Pin Plastic SOIC 


36 


5 




Inductors 






LT1111CN8-12 


8-Pin Plastic DIP 


36 


12 


M 








LT1111CS8-12 


8-Pin Plastic SOIC 


36 


12 










LT1173CN8 


8-Pin Plastic DIP 


36 


Adjustable 




Micropower Switching Regulator Works Down to 2V Input. Requires 






LT1173CS8 


8-Pin Plastic SOIC 


36 


Adjustable 




Only 3 External Components (-5. -12 Versions). Optimized 






LT1173CN8-5 


8-Pin Plastic DIP 


36 


5 




forV| N >2V 






LT1173CS8-5 


8-Pin Plastic SOIC 


36 


5 








LT1173CN8-12 


8-Pin Plastic DIP 


36 


12 










LT1173CS8-12 


8-Pin Plastic SOIC 


36 


12 










LT1300CN8 


8-Pin Plastic DIP 


7 


3.3/5 




Micropower Switching Regulator Works Down to 1 .8V Input. Includes 






LT1300CS8 


8-Pin Plastic SOIC 


7 


3.3/5 




Selectable 3.3V or 5V Output and Shutdown 



4-8 



m / TECHNOLOGY 



POWER SUPPLY PRODUCTS SELECTION GUIDE 



Commercial Temperature 



CURRENT 
(AMPS) 


POSITIVE 

OR 
NEGATIVE 
OUTPUT 


PART NUMBER 


PACKAGE 
TYPE 


Vih/ 
Vdiff 
MAX 

(V) 


V NOMINAL 
REGULATED 

OUTPUT 
VOLTAGE (V) 


MIL/ 
IND 
TEMP 


FEATURE/COMMENTS 


1.0 


Switching 


LT1301CN8 
LT1301CS8 


8-Pin Plastic DIP 
8-Pin Plastic SOIC 


10 
10 


5/12 
5/12 


I 
I 


Micropower Switching Regulator Works Down to 1 .8V Input. 
Optimized for Flash Memory VPP Generation from 5V or 2V 






LT1303CW8 
LT1303CS8 


8-Pin Plastic DIP 
8-Pin Plastic SOIC 


7 
7 


Adjustable 
Adjustable 




Micropower Switching Regulator Works Down ot 1 .8V Input. 
Includes Low-Battery Detector 


800mA 


Pos Fixed 


U1117CST 
LT1 1 1 7CST-2.85 
LT1117CST-3.3 
LT1117CST-5 


3-Pin SOT-223 
3-Pin SOT-223 
3-Pin SOT-223 
3-Pin SOT-223 


15 
12 
10 
10 


Adjustable 
2.85 
3.3 
5 




Adjustable Low Dropout Regulator, SOT-223 Package 
Active SCSI-2 Terminator, SOT-223 Package 
3.3 Low Dropout Regulator, SOT-223 Package 
5V Low Dropout Regulator, SOT-223 Package 


700mA 


Pos 


LT1129CS8 
i T1 1 ^Qr^fl-i ? 

L i 1 1 £9030 O.O 

LT1 1 29CS8-5 


8-Lead SOIC 

fl-l pari ^niP 

8-Lead SOIC 


30 
30 
30 


Adjustable 
3 3 
5 


I 
I 


Micropower Regulator With Shutdown, Dropout Voltage = 0.4V, 
Reverse Battery Protection in Low Thermal Resistance SO-8 Package 






LT1129CT 

LT1129CT-3.3 

LT1129CST-3.3 

LT1129CQ-3.3 

LT1129CT-5 

LT1129CST-5 

LT1129CQ-5 


5-Pin TO-220 

Plactir ("in 

5-Pin TO-220 
3-Pin SOT-223 
5-Pin DD 
5-Pin TO-220 
3-Pin SOT-223 
5-Pin DD 


30 
30 
30 
30 
30 
30 
30 
30 


Adjustable 

AH i 1 1 c t/n hlo 

HUjUMdulC 

3.3 
3.3 
3.3 

5 

5 

5 


I 
1 

1 
1 
1 
1 
1 
1 


Micropower Regulator With Shutdown, Dropout Voltage = 0.4V, 

Rpuprcp Rattprv Prntprtinn 


400mA 


Switching 


LTC1174CN8 

I TP117^rMfi.T T 
L I U I I /40No 0. J 

LTC1174CN8-5 
LTC1174CS8 
LTC1174CS8-3.3 
LTC1174CS8-5 


8-Lead DIP 

SI earl niP 
O LcdU uir 

8-Lead DIP 
8-Lead SOIC 
8-Lead SOIC 
8-Lead SOIC 


13.5 
13 5 
13^5 
13.5 
13.5 
13.5 


Adjustable 
3 3 
5 

Adjustable 

3.3 
5 


1 
1 


Micropower Step-Down Switching Regulator With 90% Efficiency. 

OClcOLdUIC iUUIIIM Ul twNIH VjUl Iclll LlfllU. IMLcMuCU IUI Ov JV 

Battery Applications 


150mA 


Pos 


LT1121ACS8 
LT1121ACS8-3.3 
LT1 121 ACS8-5 


8-Lead SOIC 
8-Lead SOIC 
8-Lead SOIC 


30 
30 
30 


Adjustable 

3.3 
5 


1 
1 
1 


Micropower Regulator With Shutdown, Dropout Voltage = 0,4V, 
Reverse Battery Protection in Low Thermal Resistance SO-8 Package 






LT1121CN8 

LT1121CS8 

LT1121CN8-3.3 

LT1121CS8-3.3 

U1121CST-3.3 

LT1121CN8-5 

I T1 101 CCB H 
LI I I L l Ubt5-J 

^T1121CST-5 


8-Pin Plastic DIP 
8-Pin Plastic SOIC 
8-Pin Plastic DIP 
8-Pin Plastic SOIC 
3-Pin SOT-223 
8-Pin Plastic DIP 

S Din Dlnotir CHIP 

3-Pin SOT-223 


30 
30 
30 
30 
30 
30 
30 
30 


Adjustable 
Adjustable 
3.3 
3.3 
3.3 
5 
5 
5 


1 
1 
1 
1 
1 
1 


Micropower Regulator With Shutdown, Dropout Voltage = 0.4V, 
Reverse Battery Protection 


125mA 


Pos Adj 


LT1020CJ 
LT1020CN 
LT1020CS 


14-Pin CERDIP 
14-Pin Plastic 
16-Pin Plastic SOL 


36 
36 
36 


4 to 30 
4 to 30 
4 to 30 


M.I 

1 
1 


Dropout Voltage = 0.4V, 40pA l Q . Reference and Comparator 






LT1120CJ8 
LT1120CN8 
LT1120CH 


8-Pin CERDIP 
8-Pin Plastic DIP 
8-Pin T0-5 


36 
36 
36 


4 to 30 
4 to 30 
4 to 30 


M 

1 


Dropout Voltage = 0,4V, 40p.A l , Reference, Comparator, Shutdown, 
8-Pin Package 


100mA 


Pos Adj 


LT1431CJ8 
LT1431CN8 
LT1431CS8 
LT1431CZ 


8-Pin CERDIP 
8-Pin Plastic DIP 
8-Pin Plastic SOIC 
T0-92 


36 
36 
36 
36 


2.5 to 36 
2.5 to 36 
2.5 to 36 
2.5 to 36 


M 
1 
1 
1 


0.4% Initial Tolerance, 1% Over Temperature 


20mA to 
100mA 


Switched 
Capacitor 


LT1026CJ8 
LT1026CN8 
LT1026CH 


8-Pin CERDIP 
8-Pin Plastic DIP 
8-Pin T0-5 Can 


10 
10 
10 


• 


M 
M 


Dual Voltage Converter, 1 0mA Output, 5V| N , ±10V O ut 






LTC1044CJ8 

LTC1044CN8 

LTC1044CH 

LTC1044CS8 

LTC1044ACN8 

LTC1 044ACS8 


8-Pin CERDIP 
8-Pin Plastic DIP 
8-Pin TO-5 Can 
8-Pin Plastic SOIC 
8-Pin Piastic DIP 
8-Pin Plastic SOIC 


9.5 
9.5 
9.5 
9.5 
13 
13 




M 

M 

1 
1 


Voltage Converter, 20mA Output 






LTC1046CN8 
LTC1046CS8 


8-Pin Plastic DIP 
8-Pin Plastic SOIC 


6 
6 




1 
1 


50mA Output Current, 165nA Supply Current, 35£2 Max Output 
Impedance 






LT1054CJ8 
LT1054CN8 
LT1054CH 
LT1054CS 


8-Pin CERDIP 
8-Pin Plastic DIP 
8-Pin TO-5 Can 
16-Pin Plastic SOL 


16 
16 
16 
16 


t 
t 
t 
t 


M 

1 

M 

1 


Voltage Converter and Regulator, 100mA Output, 
25kHz Switching Rate 






LTC1144CN8 
LTC1144CS8 


8-Pin Plastic DIP 
8-Pin Plastic SOIC 


20 
20 




1 
1 


Voltage Converter, 20mA Output, Up to 18V Operation 



* These devices are non-regulating converters, 

f The available output voltage range is dependent upon the mode of operation selected, 



4-9 



POWER SUPPLY PRODUCTS SELECTION GUIDE 



Power Factor Correction Controllers 



PART NUMBER 


DESCRIPTION 


PACKAGE OPTIONS 


FEATURES 


LT1248 


Average Current-Mode Power Factor Corrector 


N16, S16 


Low Line Current Distortion, >0 99 Power Factor, Synchronization. 
Overvoltage Protection 


LT1249 


Average Current-Mode Power Factor Corrector 




N8, S8 


Low Parts Count, Full Feature Power Factor Correction 


Regulating Pulse- Width Modulators 


PART NUMBER 


DESCRIPTION 


PACKAGE OPTIONS 


FEATURES 


LT1105 


Off-Line Regulating Pulse Width Modulator 


N8, N14 


Designed for AC Line Powered Applications 


LT1241 Series 


500kHz Regulating Pulse Width Modulators 


J8, N8, S8 


Improved Replacements tor UC1842, 1843, 1844, 1845 


LT1 246 


1MHz Regulating Pulse Width Modulator 


J8, N8, S8 


1MHz Current Mode PWM, 1.5% V REf 


LT1524/LT3524 


Regulating Pulse Width Modulator 


J.N.S 


Improved SG1524, 2% V REF , Guaranteed Oscillator Accuracy 


LT1 525A/LT352SA 
LT1527A/LT3527A 


Regulating Pulse Width Modulator 


J,N 


Improved SG1525A/1527A Switching Regulator with Undervoltage 
Lockout, Guaranteed Long Term Stability 


LT1526/LT3526 


Regulating Pulse Width Modulator 


J, N 


Switching Regulator Control with Soft Start, Current Limit, Metering 
Logic, Undervoltage Lockout, Guaranteed Long Term Stability 


SG1524/SG3524 


Regulating Pulse Width Modulator 


J,N 


Industry Standard Switching Power Supply Control Circuit 


SG1525A/SG3525A 


Regulating Pulse Width Modulator 


J,N 


More Features Than 1524 Series, 100mA Source/Sink Outputs 


SG1527A/SG3527A 


Regulating Pulse Width Modulator 


J.N 


Same as SG1525A with Inverted Output Logic 


LT1 846/3846 
LT1 847/3847 


Current Mode Regulating Pulse Width Modulator 


J.N 


Current Mode PWM with UV Lockout, Soft Start, 1% V REF . 500kHz 
Operation, 200mA Totem Pole Outputs 



Ultra-High Efficiency Switching Regulator Controllers 



PART NUMBER 


DESCRIPTION 


PACKAGE OPTIONS 


FEATURES 


LTC1142 


Dual Step-Down Switching Regulator Controller 


SSOP 


Dual Synchronous Switching Regulator Controllers with both 3.3V 
and 5V Outputs 


LTC1142HV 


Dual Step-Down Switching Regulator Controller 


SS0P 


20V Max Input Voltage Dual 3.3V and 5V Output Synchronous 
Switching Regulator 


LTC1143 


Dual Step-Down Switching Regulator Controller 


S16 


Dual Switching Regulator Controller with Low Parts Count and 
both 3.3V and 5V Outputs 


LTC1147 


Step-Down Switching Regulator Controller 


N8. S8 


Low Parts Count, 90% Efficiency Using a Single External 
P-Channel MOSFET 


LTC1148 


Step-Down Switching Regulator Controller 


N,S 


Synchronized Switching Regulator Controller Using Two External 
MOSFETs for 95% Efficiency. Up to 1 6V Inputs. 


LTC1148HV 


Step-Down Switching Regulator Controller 


N.S 


Synchronized Switching Regulator Controller Using Two External 
MOSFETs for 95% Efficiency. Up to 20V Inputs. 


LTC1149 


Step-Down Switching Regulator Controller 


N.S 


Synchronized Switching Regulator Controller Using Two External 
MOSFETs for 95% Efficiency. Up to 48V Inputs. 


LTC1159 


Step-Down Switching Regulator Controller 


N,S 


Synchronized Switching Regulator Controller Using Two External 
MOSFETs for 95% Efficiency. Up to 40V Inputs. 


LT1432 


Step-Down Switching Regulator Controller 


N8, S8 


Provides High Efficiency 5V Output Using LT1170 Series Regulator 
and Minimum External Parts 


LT1 432-3.3 


Step-Down Switching Regulator Controller 


N8, S8 


Provides High Efficiency 5V Output Using LT1 170 Series Regulator 
and Minimum External Parts 



LT11 03/1 1 05 Off-Line Switching Regulators Regulator Drivers 



APPLICATION 


LT1105 


LT1103 
(Internal Sense 
Resistor) 


Universal Off-Line 


10WtoOver100W 


10Wto 50W 


Battery Charger, Isolated Off-Line 


OK 


OK 


Telecom, -48V Input Isolated 


OK 


OK 


Low Voltage Isolated DC/DC (<24V) 


Reguires External 
MOSFET 


Needs No 
MOSFET 


High Voltage Isolated DC/DC 


OK 


OK 



BASE 
DRIVE 
CURRENT 


PART 
NUMBER 


PACKAGE 
TYPE 


VlN 

MAX 

(V) 


V NOMINAL 
REGULATED 
OUTPUT 
VOLTAGE 


FEATURES/ 
COMMENTS 


150mA 


LT1123CZ 


TO-92 


30 


5.0 


Requires External 
PNP.1% Output 
Tolerance, 600|jA 
Quiescent Current 



4-10 



rrunm 

A-/ TECHNOLOGY 



BATTERY-POWERED DC/DC CONVERSION SOLUTIONS 



The following tables form a shortform component selection guide for a collection of commonly used battery- 
powered DC/DC conversion applications. No design is required since inductor, capacitor and resistor values are 
completely specified. Choose the appropriate LTC DC/DC converter for your application from the following tables. 
The LT1073, LT1107, LT1108, LT1110, LT1111, LT1173, LTC1174, and LT1303 all have low-battery detection 
capability. 

Step-Up From One Cell (1V) 



VOUT 


'out 




Iq 


L 


c 


R 






(V) 


(mA) 


DEVICE 


(MA) 


m 


(Mf) 


w 


FIG 


COMMENTS 


5 


40 


LT1 073-5 


95 


82 


100 





1 


Lowest l Q 




40 


LT1110-5 


350 


27 


33 





1 


Best For Surface Mount 


12 


15 


LT1073-12 


95 


82 


100 





1 


Lowest Iq 




15 


LT1110-12 


350 


27 


33 





1 


Best For Surface Mount 



Adjustable versions also available for Vou T up to 50V 

Step-Up From Two Cells (2V) 



VoUT 


•out 




Iq 


L 


c 


R 






(V) 


(mA) 


DEVICE 


(mA) 


(MH) 


(MF) 


(fi) 


FIG 


COMMENTS 


3.3 


400 


LT1300" 


120 


10 


100 




2 


Selectable 3.3V/5V Out 


5 


90 


LT1 173-5 


110 


47 


100 


47 


1 


Lowest Iq 






LT1111-5 


300 


18 


33 


47 


1 


Surface Mount 




150 


LT1 107-5 


300 


33 


33 


47 


1 


Surface Mount 






LT1 108-5 


110 


100 


100 


47 


1 


Lowest Iq 




220 


LT1300** 


120 


10 


100 




2 


Selectable 3.3V/5V Out 






LT1301" 


120 


10 


100 




2 


Selectable 5V/12V Out 




600 


LT1302 


200 


10 


100 






Higbest Power Output 


12 


20 


LT1173-12 


110 


47 


47 


47 


1 


Lowest Iq 






LT1111-12 


300 


18 


22 


47 


1 


Surface Mount 




40 


LT1107-12 


300 


27 


33 


47 


1 


Surface Mount 






LT1108-12 


110 


82 


100 


47 


1 


Lowest Iq 




50 


LT1301" 


120 


10 


100 




2 


Selectable 5V/12V Out 




120 


LT1302 


200 


3.3 


66 






Highest Power Output 



"See LT1302 data sheet **For low-battery detection use LT1303 

Step-Up From 5VTo 12V 



VOUT 


'out 




Iq 


L 


C 


R 






(V) 


(mA) 


DEVICE 


(MA) 


(M«) 


(MF) 


(") 


FIG 


COMMENTS 


12 


90 


LT1173-12 


110 


120 


100 







Lowest Iq 






LT1111-12 


300 


47 


33 







Surface Mount 




175 


LT1107-12 


300 


60 


32 







Surface Mount 






LT1108-12 


110 


180 


100 







Lowest Iq 




200 


LT1301" 


120 


33 


47. 




2 


True Shutdown 



**For low-battery detection use LT1303 

Flash Memory VPP (12V) Generation 



Vim 


V OUT 


■out 




Iq 


L 


C 






(V) 


(V) 


(mA) 


DEVICE 


(M*) 


(MH) 


(Mf) 


FIG 


COMMENTS 


5 


12 


60 


LT1109-12 


320 


33 


22 


3 


Small, SMT 






120 


LT1109A-12 


320 


27 


47 


3 


Small, SMT 






200 


LT1301** 


120 


27 


47 


2 


True Shutdown 


2 Cells 


12 


60 


LT1109A-12 


320 


10 


22 


1 


All Surface Mount 






80 


LT1301" 


120 


10 


47 


2 


True Shutdown 



Basic Step-Up Converters 

1N5818 

VOUT 



Ilim 


V|N 




. SW1 




SENSE 


GND 


SW2 



4=t 



Figure 1 



ioomFZ Z 



DOWN 



VlN 


SW 






SELECT 


SENSE 






SO 




+ 


PGND 


GND 







•SEE TABLES FOR RECOMMENDED PART, 
INDUCTOR. CAPACITOR. AND RESISTOR VALUES 

Figure 2 



Flash Memory VPP Generator 

1N4933 

. I . , V UT 

" I 12V 



VlN 




LT1109 


SW 


SENSE 


GND 





+ l 

_c 



•SEE TABLE FOR RECOMMENDED INDUCTOR 
AND CAPACITOR VALUES 



Figure 3 



**For low-battery detection use LT1303 



rr\im 

.^^f TECHNOLOGY 



4-11 



BATTERY-POWERED DC/DC CONVERSION SOLUTIONS 



Step-Down Conversion to 3.3V 



V|H 
(V) 


'out 
(mA) 


DEVICE 


Iq 

(MA) 


L 

(M«) 


c 

(MF) 


'PGM 


Fig 


COMMENTS 


4.5 to 
12.5 


200 
425 


LTC1 174-3.3 
LTC1 174-3.3 


450 
450 


50 
50 


2x33 
2x33 


ToGND 

To V| N 


5 
5 


Low Dropout, 
Surface Mount 


5 to 
16 


2A 


LTC1 148-3.3 


160 










See Ultra-High 
Efficiency Regs - Pg 4 


12 to 
60 


2A 


LTC1 149-3.3 


600 










See Ultra-High 
Efficiency Regs - Pg 4 


Step-Down Conversion to 5V 


V|N 

(Max) 


■out 
(mA) 


DEVICE 


■a 

m 


L 

(MH) 


c 

(MF) 


R/ 

'PGM 


Fig 


COMMENTS 


5.5 to 
12 


200 
400 


LTC1 174-5 
LTC1 174-5 


450 
450 


100 
100 


2x33 
2x33 


ToGND 
To V| N 


5 
5 


Low Dropout, 
Surface Mount 


12 to 
20 


300 
300 


LT1 107-5 
LT1 108-5 


300 
110 


60 
180 


100 
330 


100 
100 


4 
4 


Surface Mount 
Lowest l Q 


20 to 
30 


300 
300 


LT1 173-5 
LT1111-5 


110 
300 


470 
180 


470 
220 


100 
100 


4 
4 


Lowest Iq 
Surface Mount 


6 to 
16 


2A+ 


LTC1 147/8-5 


160 










See Ultra-High 
Efficiency Regs - Pg 4 


12 to 
60 


2A+ 


LTC1 149-5 


600 










See Ultra-High 
Efficiency Regs - Pg 4 



Adjustable output voltages up to 6.2V can be obtained with the adjustable versions of 
LT1 1 73, LT1 1 1 1 , LT1 1 07, LT1 1 08, or LT1 1 1 0. 



Positive-to-Negative Voltage Conversion 



Vi« 


Vout 


'out 




■q 


L 


c 


R 






(V) 


(V) 


(mA) 


DEVICE 


(MA) 


(MH) 


(MF) 


(«) 


Fig 


COMMENTS 


5 


-5 


75 


LT1 108-5 


110 


100 


100 


100 


6 


Lowest Iq 








LT1 107-5 


300 


33 


33 


100 


6 


Surface Mount 






150 


LTC1 174-5 


450 


50 


2x33 




7 


Surface Mount 


12 


-5 


250 


LT1 173-5 


110 


470 


220 


100 


6 


Lowest l Q 






250 


LT1111-5 


300 


180 


82 


100 


6 


Surface Mount 



280k 
(-5V). 
220k 
(-3.3V) 



Step-Down Converters 



V|N- 



lUM V| N SW1 
. SENSE 




"VoUT 



'SEE TABLES FOR RECOMMENDED PART, 
INDUCTOR CAPACITOR, AND RESISTOR VALUES 

Figure 4 



V|M h Te ~" sx +| 

.OW , SD -r- 1 itN - 
ERY— LB 0UT v 0UT 2 [ 1 

SEE- Ipgm SW % j " yy >~4-Vout 
BLE LTC1174 ±J_. 

gnd ti-, -r- 

I -g '^>5818 | 



Figure 5 



Positive-to-Negative Converters 




v 0UT 



•SEE TABLES FOR RECOMMENDED PART, 
INDUCTOR, CAPACITOR, AND RESISTOR VALUES 



Figure 6 



LOW ' 
BATTERY 1 
INDICATOR " 



j 'PGM 




Figure 7 



4-12 



rruum 

-^^F TECHNOLOGY 



POWER AND MOTOR CONTROL CIRCUITS 



High-Side Switch Drivers 



LTC1 153- Electronic Circuit Breaker w/ Programmable Trip, Reset, Current Level 

LTC1 154 -Single N-Ch FET Switch Driver w/ Short-Circuit Protection 

LTC1 155 - Dual N-Ch FET Switch Drivers w/ Short-Circuit Protection 

LTC1156-Quad N-Ch FET Switch Drivers w/ Short-Circuit Protection 

LTC1 1 57 - Dual N-Ch FET Switch Drivers for 3.3V Operation (Also for Low Cost 5V Applications) 

LT1 1 61 - Quad High Voltage N-Channel FET Switch Drivers with Reset and Short-Circuit Portection 

LTC1 1 63 - Triple N-Ch FET Switch Drivers for 1 .8V Operation (and up to 5V Applications) 

LTC1 165 -Triple N-Ch FET Switch Drivers for 1 .8V Operation (and up to 5V Applications) 

LTC1255 - Dual N-Ch FET Switch Drivers w/ Short Circuit Protection, 24V Operation 



Integrated High-Side Switches 



LT1188 - 1.5A HSS, Output Protected Against Inductive Kickback 
Controlled Slew Rate/Low RF Noise 
STATUS Line for Diagnostics 
Protected Against Overtemp, Load Faults 



LT1 089 - 7.5A HSS Low Loss, Only 1.5V at 7.5A 
Protected Against Overtemp, Overcurrent 
Low Quiescent Current 



Half Bridge N-Ch MOSFET Drivers 



LT1158- 5Vto 30V Operation, Drives DC Motors and Switching Power 
Supply N-Ch MOSFET Switch Gates, On-Chip Charge Pump, 
Adaptive Anti-Shoot-Through, Fully Protected, 150ns Transition 
Times Driving 3000pF 



PRODUCT 


PACKAGES 


FUNCTION 


MIN 

VsuPPLY 


MAX 

VlN 


COMMENTS 


LT1089 


TO-220, T0-3 


7.5A High-Side Switch 


4V 


20V 


Low loss, Low Iq 


LTC1153 


8-Pin DIP, SO 


Electronic Circuit Breaker 


4.5V 


22V 


Has Adjustable Reset Time 


LTC1154 


8-Pin DIP, SO 


Single High-Side Driver 


4.5V 


22V 


Single Version of LTC1 155 


LTC1155 


8-Pin DIP, SO 


Dual High-Side Driver 


4.5V 


22V 


Good for Power Management 


LTC1156 


16-Pin DIP, SO 


Quad High-Side Driver 


4.5V 


22V 


Good for Multiple Supply Switching 


LTC1157 


8-Pin DIP, SO 


Dual 3.3V High-Side Driver 


2.7V 


7V 


Good for 3.3V Power Management 


LT1158 


16-Pin DIP, SO 


Half-Bridge Driver 


4.5V 


36V 


Synchronous Switching Regulators Too 


LT1161 


20-Pin DIP, SO 


Quad High-Side Driver 


8V 


60V 


Good for Industrial (48V) Applications 


LTC1163 


8-Pin DIP, SO 


Triple High-Side Driver 


1.8V 


6V 


Good for Two-Cell Power Management 


LTC1165 


8-Pin DIP, SO 


Triple High-Side Driver 


1.8V 


6v 


Inverted Logic Version of LTC1163 


LT1188 


TO-220, TO-3 


1.5A High-Side Switch 


5V 


30V 


Good for Automotive 


LTC1255 


8-Pin DIP SO 


Dual Hiah-Side Driver 




30V 


Good for Industrial (24V) Applications 



UchnSioB 



4-13 



NOTES 



4-14 



LineAE INDEX 

TECHNOLOGY IINUtA 
— ^— ^— — — — 

SECTION 4— POWER PRODUCTS 

INDUCTORLESS DC TO DC CONVERTERS 

LTC1044A, 12V CMOS Voltage Converter 4-16 

LT1054, Switched-Capacitor Voltage Converter with Regulator 4-26 

LTC1144, Switched-Capacitor Wide Input Range Voltage Converter with Shutdown 4-38 



rrum 

-^^r TECHNOLOGY 



4-15 





TECHNOLOGY 



LTC1044A 



1 2V CMOS 
Voltage Converter 



F€RTUR€S 

■ 1.5V to 12V Operating Supply Voltage Range 

■ 13V Absolute Maximum Rating 

■ 200uA Maximum No Load Supply Current at 5V 

■ Boost Pin (Pin 1) for Higher Switching Frequency 

■ 97% Minimum Open Circuit Voltage Conversion 
Efficiency 

■ 95% Minimum Power Conversion Efficiency 

■ l s = 1 .5uA with 5V Supply When OSC Pin = OV or V + 

■ High Voltage Upgrade to ICL7660/LTC1 044 



nppucOTions 

■ Conversion of 10V to ±10V Supplies 

■ Conversion of 5V to ±5V Supplies 

■ Precise Voltage Division: Vout = Vjn/2 +20ppm 

■ Voltage Multiplication: Vout = ±nV iN 

■ Supply Splitter: V 0l it = ± Vs/2 

■ Automotive Applications 

■ Battery Systems with 9V Wall Adapters/Chargers 



DcscniPTion 

The LTC1044A is a monolithic CMOS switched-capacitor 
voltage converter. It plugs in for ICL7660/LTC1044 in 
applications where higher input voltage (up to 12V) is 
needed. The LTC1 044A provides several conversion func- 
tions without using inductors. The input voltage can be 
inverted (V ut = -Vin), doubled (V ut = 2V !N ), divided 
(Vout = V2) or multiplied (V 0U t = ±nV| N ). 

To optimize performance in specific applications, a boost 
function is available to raise the internal oscillator fre- 
quency by a factor of 7. Smaller external capacitors can be 
used in higher frequency operation to save board space. 
The internal oscillator can also be disabled to save power. 
The supply current drops to 1.5nA at 5V input when the 
OSC pin is tied to GND or V + . 



TVPicm nppucfflion 



Generating -10V from 10V 

LTC1044A 



2 


BOOST V* 
CAP* OSC 
GND LV 
CAP" Voot 


8 


7 
6 




3 
•1 









Output Voltage vs Load Current, V + = 10V 



[ I 
T s = 25-C 














CI 


-cs 


= 1 






































































































s 




= 4 


Si 





































































10 20 30 40 50 60 70 80 90 100 
LOAD CURRENT (mA) 



4-16 



TECH nSIoB 



LTC1044A 



ni)soiuT€ mnximum Rnnnos 

(Natal) 

Supply Voltage 13V 

Input Voltage on Pins 1,6 and 7 

(Note 2) -0.3V <V| N <V + + 0.3V 

Current into Pin 6 20uA 

Output Short-Circuit Duration 

V + <6.5V Continuous 

Operating Temperature Range 

LTC1044AC 0°Cto70°C 

LTC1044AI -40°Cto85°C 

Storage Temperature Range -65°C to 150°C 

Lead Temperature (Soldering, 10 sec) 300°C 



BOOST fT 
CAP* [2 
GND |T 
CAP" [T 



TOP VIEW 
C7 



T| V* 

7] osc 

H LV 
UVout 



N8 PACKAGE 
8-LEAD PLASTIC DIP 

TjMAX = 110"C,8jA=100°C/W 




8j V* 
T] OSC 
T| LV 

a vour 



S8 PACKAGE 
8-LEAD PLASTIC SOIC 
TjMAX = 110°C,ejA=130°C/W 



1 



ORDER PART 
NUMBER 



LTC1044ACN8 
LTC1044AIN8 



ORDER PART 
NUMBER 



LTC1044ACS8 
LTC1044AIS8 



S8 PART MARKING 



1044A 
1044AI 



Consult factory for Military grade parts 



€l€CTMCni CHflRnCTCMSTICS V + = 5V. Cqsc = OpF. T fl = 25 C, See Test Circuit, unless otherwise noted. 



SYMBOL 


PARAMETER 


CONDITIONS 


LTC1044AC 
MIN TYP MAX 


LTC1044AI 
MIN TYP MAX 


UNITS 


Is 


Supply Current 


Rl = °=, Pins 1 and 7, No Connection 
Rl = °°, Pins 1 and 7, No Connection, 
V* = 3V 




60 200 
15 


60 200 
15 


MA 

ma 




Minimum Supply Voltage 


R L = 10k 


• 


1.5 


1,5 


V 




Maximum Supply Voltage 


R L = 10k 


• 


12 


12 


V 


Rout 


Output Resistance 


l L = 20mA, f osc = 5kHz 

V + = 2V,I L = 3mA, f osc = 1kHz 


• 
• 


100 
120 
310 


100 
130 
325 


a 

Q 

n 


f osc 


Oscillator Frequency 


V + = 5V, (Note 3) 
V+ = 2V 


• 
• 


5 
1 


5 
1 


kHz 
kHz 


Peff 


Power Efficiency 


R L = 5k, f osc = 5kHz 




95 98 


95 98 


% 




Voltage Conversion Efficiency 


R L = ~ 




97 99.9 


97 99.9 


% 




Oscillator Sink or Source 
Current 


Vosc^VorV* 
Pin 1 (BOOST) = 0V 
Pin 1 (BOOST) = V + 


• 
• 


3 

20 


3 

20 


MA 
uA 



The • denotes specifications which apply over the full operating 
temperature range; all other limits and typicals Ta i 25°C. 
Note 1: Absolute maximum ratings are those values beyond which the life 
of a device may be impaired. 

Note 2: Connecting any input terminal to voltages greater than V + or less 
than ground may cause destructive latch-up. It is recommended that no 



inputs from sources operating from external supplies be applied prior to 
power-up of the LTC1044A. 

Note 3: f sc is tested with C sc « 1 0OpF to minimize the effects of test 
fixture capacitance loading. The OpF frequency is correlated to this 100pF 
test point, and is intended to simulate the capacitance at pin 7 when the 
device is plugged into a test socket and no external capacitor is used. 



4-17 



LTC1044A 



TVPICRL P€RFORff)RnC€ CHflRflCT€RISTICS Using the Test Circuit 



Operating Voltage Range 
vs Temperature 



Power Efficiency vs 
Oscillator Frequency, V + = 5V 



— 












































































_ 








- 


- 




















-55 -25 25 50 75 100 125 
AMBIENT TEMPERATURE CO 

LTC1044A.TPC01 

Output Resistance vs 
Oscillator Frequency, V = 5V 



100 1k 10k 

OSCILLATOR FREQUENCY (Hz) 



Output Resistance vs 
Oscillator Frequency, V* = 10V 




Power Efficiency vs 
Oscillator Frequency, V + = 10V 





100 




98 
96 




94 


>- 




. ' 


92 


o 


90 






CC 


88 


s 

o 


86 








8-1 




82 
80 









L 








T A = 25°C 


J 00 


'F 


A 






A 








01 


= I 


1 ' 
































10 


F 
s 










10 


F^ 


lOOjtF 


15 


mA* 


/ 




















-1— 
1 




































\ 

\- 










































1 


MF 


'J 






Mm 














\l 






i 


I 







1k 10k 100k 

0SCILUT0R FREQUENCY (Hz) 

LTC10MA.TPCO3 



Power Conversion Efficiency 
vsLoad Current, V + = 2V 



100 1k 10k 100k 

OSCILLATOR FREQUENCY (Hz) 

LTC10MA-TPCC* 



100 1k 10k 

OSCILLATOR FREQUENCY (! 



100k 



100 

90 











Ta 


= 25°C 

= C2= 10mF 

~ = 1kHz 










C1 
<- <os 
























V- 










is/ 




1 














1 

1 . 














1 

















































2 3 4 5 
LOAD CURRENT (mA) 



Power Conversion Efficiency 
vs Load Current, V + = 5V 



Power Conversion Efficiency 
vs Load Current, V + = 10V 





100 




90 






>- 

o 


80 


z 






70 




60 






o 


50 


CO 




> 


40 


. 


30 


DC 




3 


20 


o 


10 
















Ta 


= 25"C 

= C2 = 1 0iiF 






^EFF 




C1 
w 'os 


































is/ 




\ 

\ 














\ 































































10 20 30 40 50 60 
LOAD CURRENT (mA) 



100 




90 




so 








70 


1= 

-a 






60 






o 


50 


a 




3D 


40 


—1 


30 


3 


20 




10 










100 
90 
' 80 
70 
60 
50 
40 
30 
20 
10 


















r 




































Is/ 


















rl 

1 




















































T A 
C1 


-25°C 

= C2 = 10nF 

; = 20kHz 










•os 



40 60 80 100 120 140 
LOAD CURRENT (mA) 



300 




270 




240 






C/l 


210 


c= 
-o 


180 


T> 




o 


150 


C 
X 




^ 


120 


H 


90 


I 
> 


60 




30 










4-18 



LTC1044A 



TVPICfiL P€RFORmnnC€ CHnRnCT€RISTICS Using the Test Circuit 



Output Resistance Output Voltage Output Voltage 

vs Supply Voltage vs Load Current, V + = 2V vs Load Current, V + = 5V 




Output Voltage 
vs Load Current, V + 



:10V 















I I 
Tft = 25°C 














f 


DSC 


20k 


Hz 


























































































































SLC 


PE = 


45S 

































10 20 30 40 50 60 70 80 90 100 
LOAD CURRENT (mA) 

LTC1M4A-TPC12 

Oscillator Frequency as a 
Function of Cose- V + = 10V 



3 

4 100 































V* 


= 10V 






























































H 


Ta 


= 2 


5° 


C 


































r 


































1 = 


V* 






























































































PIN 1 


OPEN 















































































































































































































































































































































































































1 10 100 1000 10000 

EXTERNAL CAPACITOR (PIN 7 TO GN0)(pF) 

ITC1CW«-TPC15 



Output Resistance 
vs Temperature 



400 

360 

_ 320 

■Z 280 
o 

? 240 
i— 

1 200 
| 160 
I 120 
° 80 
40 












C1 =C2= 10pF 




















v» = 


2V,f 0! 




Hz 


















































C = 5k 










v* = 


5V, f« 


Hz 




















V* = 10V, lose = 20kHz 





-25 25 50 75 100 125 
AMBIENT TEMPERATURE (°C) 

LTCI«4A>TPCt3 



Oscillator Frequency 
vs Supply Voltage 



3 1k 



















— T. ^ ?s°r. 1 




















osc = 0pF: 













































































































































































































































1 2 3 4 5 6 7 8 9 10 11 12 
SUPPLY VOLTAGE (V) 



Oscillator Frequency as a 
Function of C sc. V + = 5V 



3 

3 100 





























= 25°C : 


























'A 


















































PIN 


1 = 


V 








































































































































































PIN 1 


= OPEN N 















































































































































































1 10 100 1000 10000 

EXTERNAL CAPACITOR (PIN 7 TO GNO)(pF) 



Oscillator Frequency 
vs Temperature 













Cose 


= 0pF 
























10V 






































v* = 


5V 























LTCtOMA • G16 



-55 -25 25 50 75 100 125 
AMBIENT TEMPERATURE CO 



4-19 



LI^IU44A 



T€ST CIRCUIT 



±1_ CI 3 

I 10pF 



V + (5V) 





8 




7 


_ 1 .. EXTERNAL 


LTC1044A 


6 
5 


T ^ """^ OSCILLATOR R < 

t4— — i 


l_ _J 







C2 



• VoUT 



flpPLicnnons inFORmnTion 



Theory of Operation 

To understand the theory of operation of the LTC1 044A, a 
review of a basic switched-capacitor building block is 
helpful. 

In Figure 1 , when the switch is in the left position, capacitor 
C1 will charge to voltage V1 . The total charge on C1 will be 
q1 = C1V1. The switch then moves to the right, discharg- 
ing C1 to voltage V2. After this discharge time, the charge 
on C1 is q2 = C1V2. Note that charge has been transferred 
from the source, V1, to the output, V2. The amount of 
charge transferred is: 

Aq = q1 -q2 = C1(V1 -V2) 

If the switch is cycled f times per second, the charge 
transfer per unit time (i.e., current) is: 

l=fxAq = fxC1(V1-V2) 



Requiv 
-Wv- 




/TXI 



x c1 x C2 



LIC1Q44A" F01 



Figure 1. Switched-Capacitor Building Block 

Rewriting in terms of voltage and impedance equivalence, 

I = V1 -V2 = VI -V2 
l/(fxd) R EQU | V 

A new variable, Requiv, has been defined such that Requiv 
= 1/(f x C1 ). Thus, the equivalent circuit for the switched- 
capacitor network is as shown in Figure 2. 



Requiv = 



-V2 



(xC1 = 



Figure 2. Switched-Capacitor Equivalent Circuit 

Examination of Figure 3 shows that the LTC1 044A has the 
same switching action as the basic switched-capacitor 
building block. With the addition of finite switch-on resis- 
tance and output voltage ripple, the simple theory al- 
though not exact, provides an intuitive feel for how the 
device works. 

For example, if you examine power conversion efficiency 
as a function of frequency (see typical curve), this simple 
theory will explain how the LTC1044A behaves. The loss, 
and hence the efficiency, is set by the output impedance. 
As frequency is decreased, the output impedance will 
eventually be dominated by the 1/(f x C1 ) term, and power 
efficiency will drop. The typical curves for Power Effi- 
ciency vs Frequency show this effect for various capacitor 
values. 

Note also that power efficiency decreases as frequency 
goes up. This is caused by internal switching losses which 
occur due to some finite charge being lost on each 
switching cycle. This charge loss per unit cycle, when 
multiplied by the switching frequency, becomes a current 
loss. At high frequency this loss becomes significant and 
the power efficiency starts to decrease. 



4-20 



» 



LTC1044A 



nppLicnnons inFORmmion 



osc 

(7) 



CLOSED WHEN 
V*>3V 



X 



VoUT 
(5) 



GND 
(3) 



Figure 3. LTC1044A Switched-Capacitor Voltage Converter Block Diagram 



LV (Pin 6) 

The internal logic of the LTC1044A runs between V + and 
LV {pin 6). For V + greater than or equal to 3V, an internal 
switch shorts LV to GND (pin 3). For V + less than 3V, the 
LV pin should be tied to GND. For V + greater than or equal 
to 3V, the LV pin can be tied to GND or left floating. 

OSC (Pin 7) and Boost (Pin 1) 

The switching frequency can be raised, lowered, or driven 
from an external source. Figure 4 shows a functional 
diagram of the oscillator circuit. 

By connecting the boost pin (pin 1) to V + , the charge and 
discharge current is increased and hence, the frequency is 
increased by approximately 7 times. Increasing the 




frequency will decrease output impedance and ripple for 
higher load currents. 

Loading pin 7 with more capacitance will lower the fre- 
quency. Using the boost (pin 1) in conjunction with exter- 
nal capacitance on pin 7 allows user selection of the 
frequency over a wide range. 

Driving the LTC1 044A from an external frequency source 
can be easily achieved by driving pin 7 and leaving the 
boost pin open as shown in Figure 5. The output current 
from pin 7 is small (typically 0.5uA) so a logic gate is 
capable of driving this current. The choice of using a 
CMOS logic gate is best because it can operate over a wide 
supply voltage range (3V to 1 5V) and has enough voltage 
swing to drive the internal Schmitt trigger shown in Figure 
4. For 5V applications, a TTL logic gate can be used by 
simply adding an external pull-up resistor (see Figure 5). 







i, 100k 

> REQUIRED FOR 
V TTL LOGIC 




-<V) 



Figure 4. Oscillator 



Figure 5. External Clocking 



4-21 



LTC1044A 



nppucmions inFORmnnon 

Capacitor Selection 

External capacitors C1 and C2 are not critical. Matching 
is not required, nor do they have to be high quality or 
tight tolerance. Aluminum or tantalum electrolytics are 
excellent choices with cost and size being the only 
consideration. 

Negative Voltage Converter 

Figure 6 shows a typical connection which will provide a 
negative supply from an available positive supply. This 
circuit operates over full temperature and power supply 
ranges without the need of any external diodes. The LV 
pin (pin 6) is shown grounded, but for V + > 3V it may be 
"floated", since LV is internally switched to ground (pin 3) 
forV + >3V. 

The output voltage (pin 5) characteristics of the circuit are 
those of a nearly ideal voltage source in series with an 80Q 
resistor. The 80Q. output impedance is composed of two 
terms: 

1. The equivalent switched-capacitor resistance (see 
Theory of Operation). 

2. A term related to the on-resistance of the MOS 
switches. 

At an oscillator frequency of 1 0kHz and C1 = 1 0uf , the first 
term is: 



REQUIV= (f0SG/2)xC1 

1 

5 x10 3 x 10x10- 6 " 



20Q 



Notice that the above equation for Requiv is wo/a capaci- 
tive reactance equation (X c = 1/coC) and does not contain 
a 27i term. 



V* (1.5V TO 12V) 




~± REQUIRED FOR V*<3V 

" V 0U T = -V 



Tmnst a <t max 

Figure 6. Negative Voltage Converter 



The exact expression for output resistance is extremely 
complex, but the dominant effect of the capacitor is clearly 
shown on the typical curves of Output Resistance and 
Power Efficiency vs Frequency. For C1 = C2 = 10uF, the 
output impedance goes from 60H at f sc = 1 0kHz to 200Q 
at fosc = "I kHz. As the 1/(f x C) term becomes large 
compared to the switch-on resistance term, the output 
resistance is determined by 1/(f x C) only. 

Voltage Doubling 

Figure 7 shows a two-diode capacitive voltage doubler. 
With a 5V input, the output is 9.93V with no load and 9.13V 
with a 10mA load. With a 10V input, the output is 19.93V 
with no load and 19.28V with a 10mA load. 

VlN 



1 






2 




t — d 

6 1N5817 X 


3 


LTC1044A 






5 ! REQUIRED t 
— i FOR V* < 3V _U 







1N5817 



:iomf 



-VouT=2(V IN -1) 



:mnF 



Figure 7. Voltage Doubler 



Ultra-Precision Voltage Divider 

An ultra-precision voltage divider is shown in Figure 8. To 
achieve the 0.0002% accuracy indicated, the load current 
should be kept below 100nA. However, with a slight loss 
in accuracy the load current can be increased. 



-C1 
-10|iF 



Tmin s t a < TmaX 
l L <100nA 



LTC1044A 



-V*(3VT0 24V) 



EF1 



REQUIRED FOR 
-C2 V <6V 



Figure 8. Ultra-Precision Voltage Divider 



4-22 



.^Cl^^ TECH WUDCT 



LTC1044A 



nppucOTions inFORmnnon 

Battery Splitter 

A common need in many systems is to obtain (+) and 
(-) supplies from a single battery or single power supply 
system. Where current requirements are small, the circuit 
shown in Figure 9 is a simple solution. It provides sym- 
metrical ± output voltages, both equal to one half input 
voltage. The output voltages are both referenced to pin 3 



+Vb/2 (6V) 




♦Vb/2 (-6V) 



Figure 9. Battery Splitter 



(output common). If the input voltage between pin 8 and 
pin 5 is less than 6V, pin 6 should also be connected to 
pin 3 as shown by the dashed line. 

Paralleling for Lower Output Resistance 

Additional flexibility of the LTC1 044A is shown in Figures 
1 and 1 1 . 

Figure 10 shows two LTC1044AS connected in parallel to 
provide a lower effective output resistance. If, however, 
the output resistance is dominated by 1/(f x C1 ), increas- 
ing the capacitor size (C1 ) or increasing the frequency will 
be of more benefit than the paralleling circuit shown. 

Figure 11 makes use of "stacking" two LTC1044As to 
provide even higher voltages. A negative voltage doubler 
ortripler can be achieved, depending upon how pin 8 of the 
second LTC1044A is connected, as shown schematically 
by the switch. The available output current will be dictated/ 
decreased by the product of the individual power conver- 
sion efficiencies and the voltage step-up ratio. 




VOUT = "(V) 



" LTC1D4U-FIO ~ 



•THE EXCLUSIVE NOR GATE SYNCHRONIZES BOTH LTC1044AS TO MINIMIZE RIPPLE 

Figure 10. Paralleling for Lower Output Resistance 



FORV OU T = -3V FORV UT = -2V* 
O /o— 




VOUT 



Figure 11. Stacking tor Higher Voltage 



4-23 



LTC1044A 



TVPICRL flPPUCRTIOnS 



Low Output Impedance Voltage Converter 




10nF 



-V IN > I-VoutI +0 5V 
LOAD REGULATION ±0.02%, OmA TO 15mA 



Single 5V Strain Gauge Bridge Signal Conditioner 



1.2V REFERENCE TO 
A/D CONVERTER FOR . 
RATIOMETRIC OPERATION 
(1mA MAX) 



,,-.,„.. 10k L 301k' 
r i?V^° A ZERO>^WV 
^ TRIM^ 



*1% FILM RESISTOR 

PRESSURE TRANSDUCER BLH/DHF-350 

(CIRCLED LETTER IS PIN NUMBER) 




ETCIWM-F13 



4-24 



rruum 

-^^P TECHNOLOGY 



LTC1044A 



typical nppiicmrions 



Regulated Output 3V to 5V Converter 



-±- EVEREADY 
EXP-30 



200ii 1 

2 



:iomf 



r. 
i 



OOnF 



1k 
_WV- 



1k 
_WV- 




150k luul > 

-vw — y/v- 



" OUTPUT 



Low Dropout 5V Regulator 



200S2 £ ! 

2 



100k 
-W»- 



6_ ^10mF 
5 



— 6V 
^ 4 EVEREADY 
E-91 CELLS 



0.0U! 

-wv- 



SHORT-CIRCUIT 
PROTECTION 




5 FEEDBACK AMP 



1N914 

-w- 




100Q >120k 



J 



V UT = 5V 



LOAD , , 



►30k 
/50k 
OUTPUT 
ADJUST 



VDR0P0UT*T1mA = 1mV 
VoROPOUTAT10mA= 15mV 
Vdropout AT 100mA = 95mV 



XTUPBSB 



4-25 




TECHNOLOGY 



LT1054 

Switched-Capacitor Voltage 
Converter with Regulator 



F€flTUR€S 

■ Available in Space Saving SO-8 Package 

■ Output Current: 100mA 

■ Low Loss: 1.1V at 100mA 

■ Operating Range: 3.5V to 1 5V 

■ Reference and Error Amplifier for Regulation 

■ External Shutdown 

■ External Oscillator Synchronization 

■ Can Be Paralleled 

■ Pin Compatible with the LTC1044/LTC7660 



ns 



nppucOTio 



Voltage Inverter 
Voltage Regulator 
Negative Voltage Doubler 
Positive Voltage Doubler 



D€SCRIPTIOn 

The LT1054 is a monolithic, bipolar, switched-capacitor 
voltage converter and regulator. The LT1054 provides 
higher output current than previously available converters 
with significantly lower voltage losses. An adaptive switch 
driver scheme optimizes efficiency over a wide range of 
output currents. Total voltage loss at 1 00mA output current 
is typically 1.1V. This holds true over the full supply voltage 
range of 3.5V to 1 5V. Quiescent current is typically 2.5mA. 

The LT1054 also provides regulation, a feature not previ- 
ously available in switched-capacitor voltage converters. 
By adding an external resistive divider a regulated output 
can be obtained. This output will be regulated against 
changes in both input voltage and output current. The 
LT1 054 can also be shut down by grounding the feedback 
pin. Supply current in shutdown is less than 100uA. 

The internal oscillator of the LT1054 runs at a nominal 
frequency of 25kHz. The oscillator pin can be used to adjust 
the switching frequency or to externally synchronize the 
LT1054. 

The LT1054 is pin compatible with previous converters 
such the LTC1044/LTC7660. 



BLOCK DlflGRflm 

Vref 



FEEDBACK/ 
SHUTDOWN 




r-M OSC Q_ 



•EXTERNAL CAPACITORS 




DRIVE -JT 



GND 

Cqut' 



0]-V0UT 

J ITIOM'SG 



Voltage Loss 



3.5V<V| N <15V 
'C|N = CouT=100(iF 

. • INDICATES GUARANTEED TEST POINT _ 




10 20 30 40 50 60 70 80 90 100 
OUTPUT CURRENT (mA) 



4-26 



LT1054 



fiGsoiuT€ maximum imtiiigs 

Supply Voltage (Note 1) 16V 

Input Voltage 

Pin 1 0V<Vp, N1 <V + 

Pin 3 (S Package) OV < V P | N3 < V + 

Pin 7 OV < V P | N7 < V REF 

Pin 13 (S Package) OV < V P | N13 < V REF 

Operating Temperature Range 

LT1054C 0°Cto70°C 

LT1054I -40°Cto85°C 

LT1054M -55°Cto125°C 



Junction Temperature Range (Note 2) 

LT1054C 125°C 

LT10541 125°C 

LT1054M 150°C 

Storage Temperature Range 

H, J8, N8 and S8 Packages -55°C to 150°C 

S Package -65°Cto150°C 

Lead Temperature (Soldering, 10 sec) 300°C 



PflCKfiG€/ORD€R MFORmRTIOn ( N.te6) 




GND (31 0) V 0UI 

CASE ^-© , 
IS CAP" 
V ° 0T H PACKAGE 

8-LEAO TO-5 METAL CAN 

T JM «-i5(«;,ej A .i50°c,eiic.45-c/w 



FB/SHDN [T 
CAP* \z_ 
GND \J 
CAP" \J 



TOP VIEW 




30 v* 
7] osc 

hvout 



J8 PACKAGE 
8-LEAO CERAMIC DIP 



N8 PACKAGE 
8-LEAD PLASTIC DIP 



Tjwa-150"C,ej A =100=C/W(J8) 
TjMAX=125°C,ej A =130°C/W(N8) 



ORDER PART 
NUMBER 



LT1054CH 
LT1054MH 



ORDER PART 
NUMBER 



LT1054CJ8 
LT1054CN8 
LT1054IN8 
LT1054MJ8 




S8 PACKAGE 
8-LEAD PLASTIC SO 

TjM«x = XXX°C,e JJ = XXX''C/W 

SEE REGULATION AND CAPACITOR SELECTION SECTIONS 
IN THE APPLICATIONS INFORMATION FOR IMPORTANT 
INFORMATION ON THE S8 DEVICE 



NC 

NC |T 
FB/SHDN [T 
CAP* [T 
GND |T 
CAP" |T 

NC [T 

NC |T 



TOP VIEW 
— 



16] NC 
TU NC 
U\ V* 

]D osc 

HI Vref 
33 VOUT 

To] NC 

]0 NC 



S PACKAGE 
16-LEAD PLASTIC SOL 

TjMAX=125°C,ejA=150°C/W 



ORDER PART 
NUMBER 



LT1054CS8 



S8 PART 
MARKING 



1054 



ORDER PART 
NUMBER 



LT1054CS 
LT1054IS 



4-27 



LT1054 



LT1054 



€l€CTRICfll CHRRRCT€RISTICS (No.ee) 



PARAMETER 


CONDITIONS 


MIN TYP MAX 


UNITS 


Supply Current 


l L o A rj = OmA 
V| N = 3.5V 
V|fj = 15V 


• 
• 




2.5 
3.0 


4.0 
5.0 


mA 
mA 


Supply Voltage Range 




• 


3.5 




15 


it 
V 


vuiidge loss tV|N ivout'J 


Cin = Cout = 100uf Tantalum (Note 3) 
Iout = 10mA 
Iout = 100mA 


• 
• 




0.35 
1.10 


0.55 
1.60 


V 
V 


Output Resistance 


AlnuT = 10mA to 100mA (Note 4) 


• 




10 


15 


n 


Oscillator Frequency 


3.5V < Vim < 15V 


• 


15 


25 


35 


kHz 


Reference Voltage 


Iref = 60uA, Tj = 25°C 


• 


2.35 
2.25 


2.50 


2.65 
2.75 


V 
V 


Regulated Voltage 


V, N = 7V, Tj = 25°C, R L = 500£2 (Note 5) 




-4.70 


-5.00 


-5.20 


V 


Line Regulation 


7V<V| N <12V, R L = 500Q (Note 5) 


• 




5 


25 


mV 


Load Regulation 


V| N = 7V, 1 00n < R L < 500Q (Note 5) 


• 




10 


50 


mV 


Maximum Switch Current 






300 


mA 


Supply Current in Shutdown 


V PIN 1=0V 


• 




100 


200 


uA 



The • denotes specifications which apply over the full operating 
temperature range. For C grade parts these specifications also apply up to 
a junction temperature of 100°C. 

Note 1: The absolute maximum supply voltage rating of 16V is for 
unregulated circuits. For regulation mode circuits with V ut s 15V at 
pin 5, (pin 1 1 S package) this rating may be increased to 20V. 
Note 2: The devices are guaranteed by design to be functional up to the 
absolute maximum junction temperature. 
Note 3: For voltage loss tests, the device is connected as a voltage 
inverter, with pins 1, 6, and 7 (3, 12, and 13 S package) unconnected. 
The voltage losses may be higher in other configurations. 



Note 4: Output resistance is defined as the slope of the curve, (aV utvs 
A'out), for output currents of 10mA to 100mA. This represents the linear 
portion of the curve. The incremental slope of the curve will be higher at 
currents < 10mA due to the characteristics of the switch transistors. 
Note 5: All regulation specifications are for a device connected as a 
positive-to-negative converter/regulator with R1 = 20k, R2 = 102.5k, 
C1 = 0.002uF, (C1 = 0.05uf S package) C| N = 1 0uf tantalum, 
Cout = 100|oF tantalum. 

Note 6: The S8 package uses a different die than the H, J8, IMS and S 
packages. The S8 device will meet all the existing data sheet r. 
See Regulation and Capacitor Selection sections in Applications 
Information for differences in application requirements. 



TWICfll P€RFORmnnC€ CHRRRCT6RISTICS 



Shutdown Threshold 



Supply Current 



0.6 

_ 0.5 

Q 

o 0.4 

</) 

tr 

p 0.3 
. ■ 
S 

p 0.2 























^Vp 


N1 































































-50 -25 25 50 75 
TEMPERATURE CC) 



t-0 



Oscillator Frequency 













































































'|N = 


5V 










= 35 











































































5 10 
INPUT VOLTAGE (V) 



-70 -50 -25 25 50 75 100 125 
TEMPERATURE (X) 



4-28 



rrwm 



LT1054 



tvpicrl p€RFonmnnc€ cHflRnaemsTics 



Supply Current in Shutdown 



120 
100 



83 40 

B 
a 

20 
























IN1 « "\ 


1 



















































5 10 
INPUT VOLTAGE (V) 



Average Input Current 




LT10S* • TPtW 



20 40 60 80 
OUTPUT CURRENT (mA) 

LT1050-TPC05 



Output Voltage Loss 





1.4 




1.2 




1.0 










c 


0.8 






< 


0.6 






o 
> 


0.4 




02 








































'OUT = 


00mA 


















































'OUT = 50mA 






























'0 


JT = 


0m 


I 


IN 


'ERT 


ERC 


ONF 


GUF 


ATIC 


N 








COUT = 100^r TANTALUM 
lose = 25kHz 











10 20 30 40 50 60 70 80 90 100 
INPUT CAPACITANCE (jjF) 

||UM<1FM 



Output Voltage Loss 



Output Voltage Loss 



INVERTER CONFIGURATION 
C| N = 10|jF TANTALUM 
C OU T=100nF TANTALUM 




1 10 100 

OSCILLATOR FREQUENCY (kHz) 

LTIOB* • TPC07 



Regulated Output Voltage 




-50 -25 25 50 75 100 125 
TEMPERATURE CC) 

LT10H • TPC09 



INVERTER CONFIGURATION 
C| N = 100nF TANTALUM 
C UT = 100nF TANTALUM 




1 10 100 

OSCILLATOR FREQUENCY (kHz) 

LT10S4 • TPCOfl 

Reference Voltage Temperature 
Coefficient 





100 




80 


E 


60 


HANGf 


40 


o 


20 


CD 




| 





o 

> 


-20 




-40 


CC 






-60 




30 




100 



V REF AT = 2.500V 







































































































































-50 -25 25 50 75 100 125 
TEMPERATURE (X) 

LT1054-TPCI0 



4-29 



LT1054 



pin Funcnons 



V + (Pin 8): Input Supply. The LT1054 alternately charges 
C|n to the input voltage when Cin is switched in parallel with 
the input supply and then transfers charge to Cout when 
Cin is switched in parallel with Cout- Switching occurs at 
the oscillator frequency. During the time that Cin is charg- 
ing, the peak supply current will be approximately equal to 
2.2 times the output current. During the time that Cin is 
delivering charge to Cout the supply current drops to 
approximately 0.2 times the output current. An input 
supply bypass capacitor will supply part of the peak input 
current drawn by the LT1 054 and average out the current 
drawn from the supply. A minimum input supply bypass 
capacitor of 2uf, preferably tantalum or some other low 
ESR type is recommended. A larger capacitor may be 
desirable in some cases.forexample, when theactual input 
supply is connected to the LT1 054 through long leads, or 
when the pulse current drawn by the LT1054 might affect 
other circuitry through supply coupling. 

Vout (Pin 5): In addition to being the output pin the pin is 
also tied to the substrate of the device. Special care must 
be taken in LT1054 circuits to avoid pulling this pin 
positive with respect to any of the other pins. Pulling pin 
5 positive with respect to pin 3 (GND) will forward bias the 
substrate diode which will prevent the device from starting. 
This condition can occur when the output load driven by the 
LT1 054 is referred to its positive supply (or to some other 
positive voltage). Note that most opamps present justsuch 
a load since their supply currents flow from their V + 
terminals to their V" terminals. To prevent start-up prob- 
lems with this type of load an external transistor must be 
added as shown in Figure 1 . This will prevent Vout (pin 5) 
from being pulled above the ground pin (pin 3) during start- 
up. Any small, general purpose transistor such as 2N2222 
or 2N2219 can be used. Rx should be chosen to provide 
enough base drive to the external transistor so that it is 
saturated under nominal output voltage and maximum 
output current conditions. In some cases an N-channel 
enhancement mode MOSFET can be used in place of the 
transistor. 





CAP* OSC 



LT1054 R x 
GND V REf — j-VW 

cap- :x^-\ 

__CoUT 



Rx< 



(IVqutI)P 

'OUT 



tr 



Figure 1 

Vref (Pin 6): Reference Output. This pin provides a 2.5V 
reference point for use in LT1054-based regulator circuits. 
The temperature coefficient of the reference voltage has 
been adjusted so that the temperature coefficient of the 
regulated output voltage is close to zero. This requires the 
reference output to have a positive temperature coefficient 
as can be seen in the typical performance curves. This 
nonzero drift is necessary to offset a drift term inherent in 
the internal reference divider and comparator network tied 
to thefeedback pin. The overall result of these drift terms is 
a regulated output which has a slight positive temperature 
coefficient atoutputvoltagesbelow5V and aslight negative 
TC at output voltages above 5V. Reference output current 
should be limited, for regulator feedback networks, to 
approximately 60liA. The reference pin will draw 
=100uA when shorted to ground and will not affect the 
internal reference/regulator, so that this pin can also be 
used as a pull-up for LT1 054 circuits that require synchro- 
nization. 

CAP7CAP - (Pin 2/Pin 4): Pin 2, the positive side of the 
input capacitor (Cin), is alternately driven between V + and 
ground. When driven to V + , pin 2 sources current from V + . 
When driven to ground pin 2 sinks current to ground. Pin 
4, the negative side of the input capacitor, is driven alter- 
nately between ground the Vout- When driven to ground, 
pin 4 sinks current to ground. When driven to Vout P in 4 
sources current from Cout- In all cases current flow in the 
switches is unidirectional as should be expected using 
bipolar switches. 



4-30 



LT1054 



pin Funaions 

OSC (Pin 7): Oscillator Pin. This pin can be used to raise or 
lowerthe oscillator frequency or to synchronize the device 
to an external clock. Internally pin 7 is connected to the 
oscillatortiming capacitor (C t =150pF) which is alternately 
charged and discharged by current sources of ±7uA so that 
the duty cycle is =50%. The LT1054 oscillator is designed 
to run in the frequency band where switching losses are 
minimized. However the frequency can be raised, lowered, 
or synchronized to an external system clock if necessary. 

The frequency can be lowered by adding an external 
capacitor (C1, Figure 2) from pin 7 to ground. This will 
increase the charge and discharge times which lowers the 
oscillator frequency. The frequency can be increased by 
adding an external capacitor (C2, Figure 2, in the range of 
5pF to 20pF) from pin 2 to pin 7. This capacitor will couple 
charge into C t at the switch transitions, which will shorten 
the charge and discharge time, raising the oscillator fre- 
quency. Synchronization can be accomplished by adding 
an external resistive pull-up from pin 7 to the reference pin 
(pin 6). A 20k pull-up is recommended. An open collector 
gate or an NPN transistor can then be used to drive the 
oscillator pin at the external clock frequency as shown in 
Figure 2. Pulling up pin 7 to an external voltage is 
not recommended. For circuits that require both fre- 




quency synchronization and regulation, an external refer- 
ence can be used as the reference point for the top of the 
R1/R2 divider allowing pin 6 to be used as a pull-up point 
for pin 7. 

FB/SHDN (Pin 1): Feedback/Shutdown Pin. This pin has 
two functions. Pulling pin 1 below the shutdown threshold 
(=0.45V) puts the device into shutdown. In shutdown the 
reference/regulator is turned off and switching stops. The 
switches are set such that both Cjm and Cout are dis- 
charged through the output load. Quiescent current in 
shutdown drops to approximately 100uA (see Typical 
Performance Characteristics). Any open-collector gate can 
be used to put the LT1054 into shutdown. For normal 
(unregulated) operation the device will start back up when 
the external gate is shut off. In LT1054 circuits that use the 
regulation feature, the external resistor divider can provide 
enough pull-down to keep the device in shutdown until the 
output capacitor (Cout) has fully discharged. For most 
applications where the LT1054 would be run intermittently, 
this does not present a problem because thedischarge time 
of the output capacitor will be short compared to the off- 
time of the device. In applications where the device has to 
start up before the output capacitor (Cout) has fully dis- 
charged, a restart pulse must be applied to pin 1 of the 
LT1054. Using the circuit of Figure 5, the restart signal can 
be eithera pulse (t p > 1 00ns) or a logic high. Diode coupling 
the restart signal into pin 1 will allow the output voltage to 
come up and regulate without overshoot. The resistor 
divider R3/R4 in Figure 5 should be chosen to provide a 
signal level at pin 1 of 0.7V to 1.1V. 

Pin 1 is also the inverting input of the LT1054's error 
amplifier and as such can be used to obtain a regulated 
output voltage. 



APPiicATions inFORmfflion 

Theory of Operation 

To understand the theory of operation of the LT1054, a 
review of a basic switched-capacitor building block is 
helpful. 

In Figure 3 when the switch is in the left position, capacitor 
C1 will charge to voltage V1 . The total charge on C1 will be 
q1 = C1 V1 . The switch then moves to the right, discharging 



C1 to voltage V2. Afterthis discharge time the charge on C1 
is q2 = C1V2. Note that charge has been transferred from 
the source V1 to the output V2. The amount of charge 
transferred is: 

Aq = q1 -q2 = C1(V1 -V2) 



XTUSflB 



4-31 



LT1054 



AppucATions inFonmnTion 

If the switch is cycled f times per second, the charge 
transfer per unit time (i.e., current) is: 

l=fxAq = fxC1(V1-V2) 

To obtain an equivalent resistance forthe switched-capaci- 
tor network we can rewrite this equation in terms of voltage 
and impedance equivalence: 



I 



V1 -V2 = V1 -V2 
(1/fC1 ) Requiv 



Figure 3. Switched-Capacitor Building Block 

A new variable Requiv is defined such that Requiv = 1/fC1 . 
Thus the equivalent circuit for the switched-capacitor 
network is as shown in Figure 4. The LT1 054 has the same 
switching action as the basic switched-capacitor building 
block. Even though this simplification doesn't include finite 
switch on-resistance and output voltage ripple, it provides 
an intuitive feel for how the device works. 

These simplified circuits explain voltage loss as a function 
of frequency (see Typical Performance Characteristics). As 
frequency is decreased, the output impedance will eventu- 
ally be dominated by the 1/fC1 term and voltage losses will 
rise. 

Requiv 
V1 VW— 



Requiv = 



— T T V2 



Figure 4. Switched-Capacitor Equivalent Circuit 

Note that losses also rise as frequency increases. This is 
caused by internal switching losses which occur due to 
some finite charge being lost on each switching cycle. This 
charge loss per-unit-cycle, when multiplied by the switch- 
ing frequency, becomes a current loss. At high frequency 
this loss becomes significant and voltage losses again rise. 

The oscillator of the LT1054 is designed to run in the 
frequency band where voltage losses are at a minimum. 



Regulation 

The error amplifier of the LT1 054 servos the drive to the 
PN P switch to control the voltage across the input capaci- 
tor (Cin) which in turn will determine the output voltage. 
Using the reference and error amplifier of the LT1 054, an 
external resistive divider is all that is needed to set the 
regulated output voltage. Figure 5 shows the basic regu- 
lator configuration and the formula for calculating the 
appropriate resistor values. R1 should be chosen to be 
20k or greater because the reference output current is 
limited to <u 1 0OuA R2 should be chosen to be in the range 
of 1 00k to 300k. For optimum results the ratio of Cin/Cout 
is recommended to be 1/10. C1, required for good load 
regulation at light load currents, should be 0.002(jF for all 
output voltages. 

A new die layout was required to fit into the physical 
dimensions of the S8 package. Although the new die of the 
LT1 054CS8 will meet all the specifications of the existing 
LT1054 data sheet, subtle differences in the layout of the 
new die require consideration in some application cir- 
cuits. In regulating mode circuits using the LT1054CS8 
the nominal values of the capacitors, Cin and Cout, must 
be approximately equal for proper operation at elevated 
junction temperatures. This is different from the earlier 
part. Mismatches within normal production tolerances 
for the capacitors are acceptable. Making the nominal 

Jl" 



Sin 

10hF_ 
TANTALUM i 



R2_ 

R1-IVREF 



restart shutdown 
ivqutI 



FB/SHDN 



VlN 2.2nF 

Mb 



V UT 



40mV +1 )"(^ + 1 ) 



WHERE V REF = 2.5V NOMINAL 

FOR EXAMPLE: TO GET V 0UT = -5V REFERRED TO THE GROUND 
PIN OF THE LT1054, CHOOSE R1 = 20k, THEN 



I-5VI 



R1 

-WV ! 

R2 

-VW — i 

C1 

IH 

Cout 

00hF 
+ TANTALUM 

LTIQH.fM 



If -40mV 
•CHOOSE THE CLOSEST 1% VALUE 



Figure 5 



4-32 



LT1054 



nppucflTions inFORmnnon 

capacitor values equal will ensure proper operation at 
elevated junction temperatures at the cost of a small 
degradation in the transient response of regulator cir- 
cuits. For unregulated circuits the values of Cin and Cout 
are normally equal for all packages. For S8 applications 
assistance in unusual applications circuits, please consult 
the factory. 

It can be seen from the circuit block diagram that the 
maximum regulated output voltage is limited by the supply 
voltage. For the basic configuration, IVout' referred to the 
ground pin of the LT1 054 must be less than the total of the 
supply voltage minus the voltage loss due to the switches. 
The voltage loss versus output current due to the switches 
can be found in Typical Performance Characteristics. Other 
configurations such as the negative doubler can provide 
higher output voltages at reduced output currents (see 
Typical Applications). 

Capacitor Selection 

For unregulated circuits the nominal values of C^and Cout 
should be equal. For regulated circuits see the section on 
Regulation. While the exact values of Cin and Cout are 
noncritical, good quality, low ESR capacitors such as solid 
tantalum are necessary to minimize voltage losses at high 
currents. For Cin the effect of the ESR of the capacitor will 
be multiplied by four due to the fact that switch currents are 
approximately two times higher than output current and 
losses will occur on both the charge and discharge cycle. 
This means that using a capacitor with 1 Q. of ESR for Cim 
will have the same effect as increasing the output imped- 
ance of the LT1054 by 4£X This represents a significant 
increase in the voltage losses. For Cout the affect of ESR is 
less dramatic. Cout is alternately charged and discharged 
at a current approximately equal to the output current and 
the ESR of the capacitor will cause a step function to occur 
in the output ripple at the switch transitions. This step 
function will degrade the output regulation for changes in 
output load current and should be avoided. Realizing that 
large value tantalum capacitors can be expensive, a tech- 
nique that can be used is to parallel a smaller tantalum 
capacitor with a large aluminum electrolytic capacitor to 
gain both low ESR and reasonable cost. Where physical 
size is a concern some of the newer chip type surface 
mount tantalum capacitors can be used. These capacitors 



are normally rated at working voltages in the 10V to 20V 
range and exhibit very low ESR (in the range of 0.1 £2). 

Output Ripple 

The peak-to-peak output ripple is determined by the value 
of the output capacitor and the output current. Peak-to- 
peak output ripple may be approximated by the formula: 



where dV = peak-to-peak ripple and f = oscillatorfrequency. 

For output capacitors with significant ESR a second term 
must be added to account for the voltage step at the switch 
transitions. This step is approximately equal to: 

(2I 0UT )(ESR of Cout) 
Power Dissipation 

The power dissipation of any LT1054 circuit must be 
limited such that the junction temperature of the device 
does not exceed the maximum junction temperature rat- 
ings. The total power dissipation must be calculated from 
two components, the power loss due to voltage drops in the 
switches and the power loss due to drive current losses. 
The total power dissipated by the LT1 054 can be calculated 
from: 

P «= (Vin - Iv utI)(Iout) + (V| N )(Iout)(0-2) 

where both Vin and Vout are referred to the ground pin (pin 
3) of the LT1 054. For LT1 054 regulator circuits, the power 
dissipation will be equivalent to that of a linear regulator. 
Due to the limited power handling capability of the LT1 054 
packages, the user will have to limit output current require- 
ments ortake steps to dissipate some power external to the 
LT1054 for large input/output differentials. This can be 
accomplished by placing a resistor in series with Cim as 
shown in Figure 6. A portion of the input voltage will then 
bedropped across this resistorwithout affecting the output 
regulation. Because switch current is approximately 2.2 
times the output current and the resistor will cause a 
voltage drop when C| N is both charging and discharging, 
the resistor should be chosen as: 

Rx = V x /(4.4 Iqut) 



4-33 



LT1054 



APPLICATION lAFOAmATIOn 




Figure 6 

where 

Vx * Vin - [(LT1054 Voltage Loss)(1 .3) + IV 0U tI] 

and l 0UT = maximum required output current. The factor of 
1.3 will allow some operating margin for the LT1054. 

For example: assume a 12V to -5V converter at 100mA 
output current. First calculate the power dissipation with- 
out an external resistor: 

P = (12V- l-5Vl)(100mA) + (12V)(100mA)(0.2) 
P = 700mW + 240mW = 940mW 

At 9ja of 130°C/W for a commercial plastic device this 
would cause a junction temperature rise of 122°C so that 
the device would exceed the maximum junction tempera- 
ture at an ambient temperature of 25°C. Now calculate the 



power dissipation with an external resistor (Fix). First find 
how much voltage can be dropped across Fix. The maxi- 
mum voltage loss of the LT1054 in the standard regulator 
configuration at 100mA output current is 1.6V, so 

V x = 1 2V - [(1 .6V)(1 .3) + I-5VI] = 4.9V and 
R x = 4.9V/(4.4)(1 00mA) = 1in 

This resistor will reduce the power dissipated by the 
LT1054 by (4.9V)(100mA) = 490mW. The total power 
dissipated by the LT1054 would then be = (940mW - 
490mW) = 450mW. The junction temperature rise would 
now be only 58°C. Although commercial devices are 
guaranteed to be functional up to a junction temperature 
of 125°C, the specifications are only guaranteed up to a 
junction temperature of 1 00°C, so ideally you should limit 
the junction temperature to 1 00°C. For the above example 
this would mean limiting the ambienttemperatureto42°C. 
Other steps can betaken to allow higherambienttempera- 
tures. The thermal resistance numbers for the LT1054 
packages represent worst case numbers with no heat 
sinking and still air. Small clip-on type heat sinks can be 
used to lower the thermal resistance of the LT1054 pack- 
age. In some systems there may be some available airflow 
which will help to lower the thermal resistance. Wide PC 
board traces from the LT1054 leads can also help to 
remove heat from the device. This is especially true for 
plastic packages. 



TYPICAL APPUCATIOAS 



Basic Voltage Inverter 



Basic Voltage Inverter/Regulator 



100mF 



FB/SHDN V* 

CAP* OSC 

LT10S4 
GNO Vref 



-Vin 



— =^ 2 ^ F 



-VoilT 



100(iF 



10>F 



R2_ IVqutI ,, IVoutI , . 
m "^-40mV 1 
REFER TO FIGURE 5 




4-34 



LT1054 



TVPicm nppucnTions 

Negative Voltage Doubler 



100nF= p ^ 2>lF V | N -i- 



FB/SHDN V* 



CAP* OSC — 

LT1054 
GND V BE f 



VOUT 



100nF 

H 



V| N = -3.5VT0-15V 

Vout = 2V|N * (LT1054 VOLTAGE LOSS) * (Q x SATURATI 
■SEE FIGURE 3 



VlN 



Positive Doubler 



VjM 

1N4001 3.5VT015V 



VOUT 



10|iF 



- FB/SHDN V* 

CAP* OSC 
LT1054 

V IN = 3.5VT015V XT-lGND V REF 

VouT-2V| N -(V l + 2V D iooe) CA p- Vn|lT 

Vl = LT1054 VOLTAGE LOSS "OUT 



!2nF 



~ LT105* 'TAGS 




Dual Output Voltage Doubler 




V| N = 3.5VT015V 



Wout»2V| N -(V l + 2V D i OOE ) 

-Vout— 2V| N + (V L t2V D ,oDE) 

V L = LT1054 VOLTAGE LOSS 
-f4- = 1N4001 



100jjF 



-Vout 



4-35 



LT1054 



TVPICRL APPLICATION 



5Vto±12V Converter 



V|N = 5V 



:5mf 



10|iF: 



FB/SHON V* 



CAP* OSC 

LT1054#1 
GND V nEF - 



CAP" Vqut 



V UT-12V 
l0UT=25mA 



— c _10uF I 




Strain Gage Bridge Signal Conditioner 




VlN 

3.5V TO 5.5V 



3.5V to 5V Regulator 







1N914 

-M- 



1N914 
10nF~ ^ 



FB/SHDN V 

CAP* OSC 

LT1054 
GND V REF 







R1 
20k 
— Wv 



:5(iF 



VlN = 3.5V TO 5.5V 
V 0U T = 5V 
IQUT(MAX) = 50mA 



T 
T 



0.002^iF 



R2 
125k 
-WAr 



:r2 

►125k 



1 8 

2 7 
LT1044 

3 6 



100(iF <3k 




■V 0U T = 5V 



1|iF 



4-36 



LT1054 



nppucnnons 



Regulating 200mA, 12V to -5V Converter 

5nF 12V 

jr\\r 




_| A HP5082-2810 



1/2WS 10mF_ 

Lijl-^JcAP- 



REFER TO FIGURE 5 



— IquT = to 200mA 



Digitally Programmable Negative Supply 

15V 



:5|iF 



iohf: 



FB/SHON V* — I 



CAP* OSC 

LT1054 
GND Vftff — 



>20k 



ILL 



20k 
-Wv- 



AD558 — 



■ LT1 004-2.5 
2.5V 



DIGITAL 
INPUT 



" V UT - -V|N (PROGRAMMED) 



;i00>iF 



Positive Doubler with Regulation 
(5V to 8V Converter) 



V| N = 5V 



X T 50k 

8"cS_ 10uF L VW 




:o.inF 



Negative Doubler with Regulator